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---------------------------------------------------------------------------
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-- (c) 2020 mark watson
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-- I am happy for anyone to use this for non-commercial use.
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-- If my vhdl files are used commercially or otherwise sold,
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-- please contact me for explicit permission at scrameta (gmail).
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-- This applies for source and binary form and derived works.
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---------------------------------------------------------------------------
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LIBRARY ieee;
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USE ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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use IEEE.STD_LOGIC_MISC.all;
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ENTITY SID_envelope_tapmatch IS
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PORT
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(
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CLK : IN STD_LOGIC;
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RESET_N : IN STD_LOGIC;
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DELAY_LFSR1 : IN STD_LOGIC_VECTOR(14 downto 0);
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DELAY_LFSR2 : IN STD_LOGIC_VECTOR(14 downto 0);
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DELAY_LFSR3 : IN STD_LOGIC_VECTOR(14 downto 0);
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TAPKEY1 : IN STD_LOGIC_VECTOR(3 downto 0);
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TAPKEY2 : IN STD_LOGIC_VECTOR(3 downto 0);
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TAPKEY3 : IN STD_LOGIC_VECTOR(3 downto 0);
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TAPMATCHES : OUT STD_LOGIC_VECTOR(2 downto 0)
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);
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END SID_envelope_tapmatch;
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ARCHITECTURE vhdl OF SID_envelope_tapmatch IS
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signal tapmatches_reg : std_logic_vector(2 downto 0);
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signal tapmatches_next : std_logic_vector(2 downto 0);
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signal state_reg : std_logic_vector(1 downto 0);
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signal state_next : std_logic_vector(1 downto 0);
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signal delay_lfsr_sel : std_logic_vector(14 downto 0);
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signal tapkey_sel : std_logic_vector(3 downto 0);
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signal tapmatch : std_logic;
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BEGIN
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process(clk,reset_n)
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begin
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if (reset_n='0') then
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tapmatches_reg <= (others=>'0');
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state_reg <= (others=>'0');
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elsif (clk'event and clk='1') then
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tapmatches_reg <= tapmatches_next;
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state_reg <= state_next;
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end if;
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end process;
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process(
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tapkey1,tapkey2,tapkey3,
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delay_lfsr1,delay_lfsr2,delay_lfsr3,
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state_reg,
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tapmatches_reg,
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tapmatch
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)
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begin
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tapmatches_next <= tapmatches_reg;
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state_next <= state_reg;
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delay_lfsr_sel <= (others=>'0');
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tapkey_sel <= (others=>'0');
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case state_reg is
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when "00" =>
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state_next <= "01";
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tapmatches_next(0) <= tapmatch;
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delay_lfsr_sel <= delay_lfsr1;
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tapkey_sel <= tapkey1;
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when "01" =>
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state_next <= "10";
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tapmatches_next(1) <= tapmatch;
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delay_lfsr_sel <= delay_lfsr2;
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tapkey_sel <= tapkey2;
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when others =>
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state_next <= "00";
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tapmatches_next(2) <= tapmatch;
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delay_lfsr_sel <= delay_lfsr3;
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tapkey_sel <= tapkey3;
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end case;
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end process;
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process(tapkey_sel, delay_lfsr_sel)
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variable tomatch : std_logic_Vector(14 downto 0);
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begin
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tapmatch <= '0';
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tomatch := (others=>'0');
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case tapkey_sel is
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when "0000" =>
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tomatch := "111111100000000"; --8
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when "0001" =>
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tomatch := "000000000000110"; --31
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when "0010" =>
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tomatch := "000000000111100"; --62
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when "0011" =>
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tomatch := "000001100110000"; --94
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when "0100" =>
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tomatch := "010000011000000"; --148
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when "0101" =>
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tomatch := "110011101010101"; --219
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when "0110" =>
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tomatch := "011100000000000"; --266
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when "0111" =>
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tomatch := "101000000001110"; --312
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when "1000" =>
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tomatch := "001001000010010"; --391
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when "1001" =>
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tomatch := "000001000100010"; --976
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when "1010" =>
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tomatch := "001100001001000"; --1953
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when "1011" =>
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tomatch := "101100110111000"; --3125
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when "1100" =>
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tomatch := "011100001000000"; --3906
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when "1101" =>
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tomatch := "111011111100010"; --11719
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when "1110" =>
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tomatch := "111011000100101"; --19531
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when "1111" =>
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tomatch := "000101010010011"; --31250
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when others=>
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end case;
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if (tomatch = delay_lfsr_sel) then
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tapmatch <= '1';
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end if;
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end process;
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TAPMATCHES <= tapmatches_reg;
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end vhdl;
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