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---------------------------------------------------------------------------
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-- (c) 2020 mark watson
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-- I am happy for anyone to use this for non-commercial use.
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-- If my vhdl files are used commercially or otherwise sold,
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-- please contact me for explicit permission at scrameta (gmail).
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-- This applies for source and binary form and derived works.
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---------------------------------------------------------------------------
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LIBRARY ieee;
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USE ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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use IEEE.STD_LOGIC_MISC.all;
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ENTITY SID_envelope IS
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PORT
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(
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CLK : IN STD_LOGIC;
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RESET_N : IN STD_LOGIC;
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ENABLE : IN STD_LOGIC;
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TAPMATCH : IN STD_LOGIC;
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ATTACK : IN STD_LOGIC_VECTOR(3 downto 0);
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SUSTAIN : IN STD_LOGIC_VECTOR(3 downto 0);
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DECAY : IN STD_LOGIC_VECTOR(3 downto 0);
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RELEASE_IN : IN STD_LOGIC_VECTOR(3 downto 0);
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GATE : IN STD_LOGIC;
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ENVELOPE : OUT STD_LOGIC_VECTOR(7 downto 0);
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delay_lfsr : OUT std_logic_vector(14 downto 0);
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tapkey : OUT std_logic_vector(3 downto 0)
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);
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END SID_envelope;
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ARCHITECTURE vhdl OF SID_envelope IS
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signal envelope_reg: unsigned(7 downto 0);
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signal envelope_next:unsigned(7 downto 0);
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signal delay_lfsr_reg : std_logic_vector(14 downto 0);
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signal delay_lfsr_next : std_logic_vector(14 downto 0);
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signal expdelay_lfsr_reg : std_logic_vector(4 downto 0);
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signal expdelay_lfsr_next : std_logic_vector(4 downto 0);
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signal exptapmatch_reg : std_logic_vector(2 downto 0);
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signal exptapmatch_next : std_logic_vector(2 downto 0);
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signal tapkey_next : std_logic_vector(3 downto 0);
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signal tapkey_reg : std_logic_vector(3 downto 0);
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signal tapkey_del1_next : std_logic_vector(3 downto 0);
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signal tapkey_del1_reg : std_logic_vector(3 downto 0);
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signal tapkey_del2_next : std_logic_vector(3 downto 0);
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signal tapkey_del2_reg : std_logic_vector(3 downto 0);
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signal tapkey_del3_next : std_logic_vector(3 downto 0);
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signal tapkey_del3_reg : std_logic_vector(3 downto 0);
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signal exptap : std_logic_vector(2 downto 0);
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signal exptapmatching : std_logic;
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signal state_reg : std_logic_vector(1 downto 0);
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signal state_next : std_logic_vector(1 downto 0);
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constant state_attack : std_logic_vector(1 downto 0) := "00";
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constant state_decay : std_logic_vector(1 downto 0) := "10";
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constant state_release : std_logic_vector(1 downto 0) := "11";
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signal count_state_reg : std_logic_vector(1 downto 0);
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signal count_state_next : std_logic_vector(1 downto 0);
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constant count_state_up : std_logic_vector(1 downto 0) := "00";
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constant count_state_down : std_logic_vector(1 downto 0) := "10";
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constant count_state_stopped : std_logic_vector(1 downto 0) := "11";
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signal gate_changed : std_logic;
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signal hold_counter : std_logic;
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signal gatedel : std_logic;
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signal gateshift_reg : std_logic_vector(1 downto 0);
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signal gateshift_next : std_logic_vector(1 downto 0);
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signal r0_next : std_logic;
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signal r0_reg : std_logic;
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signal adrmux_next : std_logic_vector(1 downto 0);
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signal adrmux_reg : std_logic_vector(1 downto 0);
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signal adrmux_del1_next : std_logic_vector(1 downto 0);
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signal adrmux_del1_reg : std_logic_vector(1 downto 0);
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signal adrmux_del2_next : std_logic_vector(1 downto 0);
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signal adrmux_del2_reg : std_logic_vector(1 downto 0);
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signal attack_del1_reg : std_logic_vector(3 downto 0);
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signal attack_del2_reg : std_logic_vector(3 downto 0);
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signal attack_del3_reg : std_logic_vector(3 downto 0);
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signal attack_del1_next : std_logic_vector(3 downto 0);
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signal attack_del2_next : std_logic_vector(3 downto 0);
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signal attack_del3_next : std_logic_vector(3 downto 0);
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signal attack_delayed : std_logic_vector(3 downto 0);
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signal decay_del1_reg : std_logic_vector(3 downto 0);
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signal decay_del2_reg : std_logic_vector(3 downto 0);
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signal decay_del3_reg : std_logic_vector(3 downto 0);
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signal decay_del1_next : std_logic_vector(3 downto 0);
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signal decay_del2_next : std_logic_vector(3 downto 0);
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signal decay_del3_next : std_logic_vector(3 downto 0);
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signal decay_delayed : std_logic_vector(3 downto 0);
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signal release_del1_reg : std_logic_vector(3 downto 0);
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signal release_del2_reg : std_logic_vector(3 downto 0);
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signal release_del3_reg : std_logic_vector(3 downto 0);
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signal release_del1_next : std_logic_vector(3 downto 0);
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signal release_del2_next : std_logic_vector(3 downto 0);
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signal release_del3_next : std_logic_vector(3 downto 0);
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signal release_delayed : std_logic_vector(3 downto 0);
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signal sustain_del1_reg : std_logic_vector(3 downto 0);
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signal sustain_del2_reg : std_logic_vector(3 downto 0);
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signal sustain_del3_reg : std_logic_vector(3 downto 0);
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signal sustain_del1_next : std_logic_vector(3 downto 0);
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signal sustain_del2_next : std_logic_vector(3 downto 0);
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signal sustain_del3_next : std_logic_vector(3 downto 0);
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signal sustain_delayed : std_logic_vector(3 downto 0);
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BEGIN
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-- register
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process(clk, reset_n)
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begin
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if (reset_n = '0') then
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envelope_reg <= (others=>'0');
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delay_lfsr_reg <= (others=>'1');
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expdelay_lfsr_reg <= (others=>'1');
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exptapmatch_reg <= (others=>'0');
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state_reg <= state_release;
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count_state_reg <= count_state_stopped;
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tapkey_reg <= (others=>'0');
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tapkey_del1_reg <= (others=>'0');
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tapkey_del2_reg <= (others=>'0');
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tapkey_del3_reg <= (others=>'0');
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gateshift_reg <= (others=>'0');
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r0_reg <= '0';
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adrmux_reg <= (others=>'0');
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adrmux_del1_reg <= (others=>'0');
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adrmux_del2_reg <= (others=>'0');
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attack_del1_reg <= (others=>'0');
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attack_del2_reg <= (others=>'0');
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attack_del3_reg <= (others=>'0');
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decay_del1_reg <= (others=>'0');
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decay_del2_reg <= (others=>'0');
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decay_del3_reg <= (others=>'0');
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release_del1_reg <= (others=>'0');
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release_del2_reg <= (others=>'0');
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release_del3_reg <= (others=>'0');
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sustain_del1_reg <= (others=>'0');
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sustain_del2_reg <= (others=>'0');
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sustain_del3_reg <= (others=>'0');
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elsif (clk'event and clk='1') then
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envelope_reg <= envelope_next;
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delay_lfsr_reg <= delay_lfsr_next;
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expdelay_lfsr_reg <= expdelay_lfsr_next;
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exptapmatch_reg <= exptapmatch_next;
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state_reg <= state_next;
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count_state_reg <= count_state_next;
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tapkey_reg <= tapkey_next;
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tapkey_del1_reg <= tapkey_del1_next;
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tapkey_del2_reg <= tapkey_del2_next;
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tapkey_del3_reg <= tapkey_del3_next;
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gateshift_reg <= gateshift_next;
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r0_reg <= r0_next;
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adrmux_reg <= adrmux_next;
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adrmux_del1_reg <= adrmux_del1_next;
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adrmux_del2_reg <= adrmux_del2_next;
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attack_del1_reg <= attack_del1_next;
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attack_del2_reg <= attack_del2_next;
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attack_del3_reg <= attack_del3_next;
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decay_del1_reg <= decay_del1_next;
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decay_del2_reg <= decay_del2_next;
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decay_del3_reg <= decay_del3_next;
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release_del1_reg <= release_del1_next;
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release_del2_reg <= release_del2_next;
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release_del3_reg <= release_del3_next;
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sustain_del1_reg <= sustain_del1_next;
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sustain_del2_reg <= sustain_del2_next;
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sustain_del3_reg <= sustain_del3_next;
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end if;
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end process;
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process(gateshift_reg,gate,enable)
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begin
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gateshift_next <= gateshift_reg;
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if (enable='1') then
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gateshift_next(1) <= gate;
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gateshift_next(0) <= gateshift_reg(1);
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end if;
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end process;
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gatedel <= gateshift_reg(0);
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process(attack_del1_reg,attack_del2_reg,attack_del3_reg,attack,enable)
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begin
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attack_del1_next <= attack_del1_reg;
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attack_del2_next <= attack_del2_reg;
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attack_del3_next <= attack_del3_reg;
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if (enable='1') then
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attack_del1_next <= attack;
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attack_del2_next <= attack_del1_reg;
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attack_del3_next <= attack_del2_reg;
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end if;
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end process;
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attack_delayed <= attack_del3_reg;
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process(decay_del1_reg,decay_del2_reg,decay_del3_reg,decay,enable)
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begin
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decay_del1_next <= decay_del1_reg;
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decay_del2_next <= decay_del2_reg;
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decay_del3_next <= decay_del3_reg;
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if (enable='1') then
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decay_del1_next <= decay;
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decay_del2_next <= decay_del1_reg;
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decay_del3_next <= decay_del2_reg;
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end if;
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end process;
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decay_delayed <= decay_del3_reg;
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process(release_del1_reg,release_del2_reg,release_del3_reg,release_in,enable)
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begin
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release_del1_next <= release_del1_reg;
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release_del2_next <= release_del2_reg;
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release_del3_next <= release_del3_reg;
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if (enable='1') then
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release_del1_next <= release_in;
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release_del2_next <= release_del1_reg;
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release_del3_next <= release_del2_reg;
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end if;
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end process;
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release_delayed <= release_del3_reg;
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process(sustain_del1_reg,sustain_del2_reg,sustain_del3_reg,sustain,enable)
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begin
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sustain_del1_next <= sustain_del1_reg;
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sustain_del2_next <= sustain_del2_reg;
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sustain_del3_next <= sustain_del3_reg;
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if (enable='1') then
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sustain_del1_next <= sustain;
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sustain_del2_next <= sustain_del1_reg;
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sustain_del3_next <= sustain_del2_reg;
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end if;
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end process;
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sustain_delayed <= sustain_del2_reg;
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-- next state
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--VALUE ATTACK RATE DECAY/RELEASE RATE
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-- Time/Cycle Time/Cycle
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--- ------------------------------------------
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-- 0 2 ms 6 ms
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-- 1 8 ms 24 ms
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-- 2 16 ms 48 ms
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-- 3 24 ms 72 ms
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-- 4 38 ms 114 ms
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-- 5 56 ms 168 ms
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-- 6 68 ms 204 ms
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-- 7 80 ms 240 ms
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-- 8 100 ms 300 ms
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-- 9 240 ms 750 ms
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--10 500 ms 1.5 s
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--11 800 ms 2.4 s
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--12 1 s 3 s
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--13 3 s 9 s
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--14 5 s 15 s
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--15 8 s 24 s
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--
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--
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--
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--ref1: https://www.codebase64.org/doku.php?id=base:classic_hard-restart_and_about_adsr_in_generally
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--ref2: https://sourceforge.net/p/sidplay-residfp/wiki/SID%20internals%20-%20Envelope%20Overview/
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-- up:linear, down: exponential approx
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process(envelope_reg,enable,tapmatch,count_state_reg,exptapmatch_reg,exptap,exptapmatching,gatedel,gate_changed,hold_counter,r0_reg)
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variable no_delay : std_logic;
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variable delay_match : std_logic;
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begin
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count_state_next <= count_state_reg;
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envelope_next <= envelope_reg;
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exptapmatch_next <= exptapmatch_reg;
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exptapmatching <= '0';
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r0_next <= r0_reg;
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if (enable='1') then
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no_delay := nor_reduce(exptapmatch_reg);
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delay_match := '0';
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if (exptapmatch_reg = exptap) then
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delay_match := '1';
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end if;
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case count_state_reg is
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when count_state_up =>
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r0_next <= '1';
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if (exptapmatching='1') then -- and hold_counter='0') then
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envelope_next <= envelope_reg+1;
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if (envelope_reg=x"fe") then
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count_state_next <= count_state_down;
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end if;
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end if;
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when count_state_down =>
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r0_next <= '0';
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if (exptapmatching='1' and hold_counter='0') then
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envelope_next <= envelope_reg-1;
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if (envelope_reg=x"01") then
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count_state_next <= count_state_stopped;
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end if;
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end if;
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when others=>
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end case;
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exptapmatching <= (tapmatch and (no_delay or r0_reg)) or (delay_match and not(no_delay));
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if (gate_changed='1') then
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if (gatedel='1') then
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count_state_next <= count_state_up;
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else
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count_state_next <= count_state_down;
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end if;
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end if;
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case envelope_reg is
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when x"00" =>
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exptapmatch_next <= "000";
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when x"06" =>
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exptapmatch_next <= "101";
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when x"0e" =>
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exptapmatch_next <= "100";
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when x"1a" =>
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exptapmatch_next <= "011";
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when x"36" =>
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exptapmatch_next <= "010";
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when x"5d" =>
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exptapmatch_next <= "001";
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when x"ff" =>
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exptapmatch_next <= "000";
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when others =>
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end case;
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end if;
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end process;
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process(
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enable,
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tapkey_reg,tapkey_del1_reg,tapkey_del2_reg,tapkey_del3_reg,
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attack_delayed,decay_delayed,release_delayed,
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adrmux_reg
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)
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begin
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tapkey_next <= tapkey_reg;
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tapkey_del1_next <= tapkey_del1_reg;
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tapkey_del2_next <= tapkey_del2_reg;
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tapkey_del3_next <= tapkey_del3_reg;
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if (enable='1') then
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tapkey_del1_next <= tapkey_reg;
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tapkey_del2_next <= tapkey_del1_reg;
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tapkey_del3_next <= tapkey_del2_reg;
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case adrmux_reg is
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when "00" =>
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tapkey_next <= attack_delayed;
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when "01" =>
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tapkey_next <= decay_delayed;
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when "10" =>
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tapkey_next <= release_delayed;
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when others =>
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tapkey_next <= (others=>'0');
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end case;
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end if;
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end process;
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process(enable,state_reg,envelope_reg,gatedel,tapmatch,sustain_delayed,adrmux_reg,adrmux_del1_reg,adrmux_del2_reg)
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variable envelope_over_sustain : std_logic;
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begin
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state_next <= state_reg;
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gate_changed <= '0';
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hold_counter <= '0';
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adrmux_next <= adrmux_reg;
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adrmux_del1_next <= adrmux_del1_reg;
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adrmux_del2_next <= adrmux_del2_reg;
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envelope_over_sustain := '0';
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if (unsigned(envelope_reg) > unsigned(sustain_delayed&sustain_delayed)) then
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envelope_over_sustain := '1';
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end if;
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if (enable='1') then
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adrmux_del1_next <= adrmux_reg;
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adrmux_del2_next <= adrmux_del1_reg;
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case state_reg is
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when state_attack =>
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adrmux_next <= "00";
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if (and_reduce(std_logic_vector(envelope_reg))='1') then
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state_next <= state_decay;
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end if;
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if (gatedel='0') then
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state_next <= state_release;
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--state_next <= state_decay;
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gate_changed <= '1';
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end if;
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when state_decay =>
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adrmux_next <= "01";
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if (envelope_over_sustain='0') then
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hold_counter <= '1';
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end if;
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if (gatedel='0') then
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state_next <= state_release;
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gate_changed <= '1';
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end if;
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when state_release =>
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adrmux_next <= "10";
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if (gatedel='1') then
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adrmux_next <= "01";
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state_next <= state_attack;
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gate_changed <= '1';
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end if;
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when others=>
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state_next <= state_release;
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end case;
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end if;
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end process;
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process(delay_lfsr_reg,tapmatch,enable)
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begin
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delay_lfsr_next <= delay_lfsr_reg;
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if (enable='1') then
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if (tapmatch='1') then
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delay_lfsr_next <= (others=>'1');
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else
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delay_lfsr_next(0) <= delay_lfsr_reg(14) xor delay_lfsr_reg(13);
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delay_lfsr_next(14 downto 1) <= delay_lfsr_reg(13 downto 0);
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end if;
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end if;
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end process;
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process(expdelay_lfsr_reg,exptapmatching,tapmatch,enable)
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begin
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expdelay_lfsr_next <= expdelay_lfsr_reg;
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if (enable='1') then
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if (exptapmatching='1') then
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expdelay_lfsr_next <= "11111";
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else
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if (tapmatch='1') then
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expdelay_lfsr_next(0) <= expdelay_lfsr_reg(4) xor expdelay_lfsr_reg(2);
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expdelay_lfsr_next(4 downto 1) <= expdelay_lfsr_reg(3 downto 0);
|
|
end if;
|
|
end if;
|
|
end if;
|
|
end process;
|
|
|
|
process(expdelay_lfsr_reg)
|
|
begin
|
|
exptap <= (others=>'0');
|
|
|
|
case expdelay_lfsr_reg is
|
|
when "11100" => --2
|
|
exptap <= "001";
|
|
when "10001" => --4
|
|
exptap <= "010";
|
|
when "11011" => --8
|
|
exptap <= "011";
|
|
when "01000" => --16
|
|
exptap <= "100";
|
|
when "01111" => --30
|
|
exptap <= "101";
|
|
when others=>
|
|
exptap <= "000";
|
|
end case;
|
|
end process;
|
|
|
|
|
|
-- output
|
|
envelope <= std_logic_vector(envelope_reg);
|
|
delay_lfsr <= delay_lfsr_reg;
|
|
tapkey <= tapkey_reg;
|
|
|
|
END vhdl;
|