Revision 1422
Added by markw 10 months ago
| lvds_tx.spd | ||
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<?xml version="1.0" encoding="UTF-8"?>
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<simPackage>
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<file
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path="lvds_tx_sim/altera_soft_lvds/altera_soft_lvds_tx_twD5CSXW.v"
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path="lvds_tx_sim/altera_soft_lvds/altera_soft_lvds_tx_uCmMXfGB.v"
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type="VERILOG"
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library="lvds_tx" />
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<file path="lvds_tx_sim/lvds_tx.vhd" type="VHDL" />
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Also available in: Unified diff
Updated ip to quartus v23 version