Revision 77
Added by markw about 11 years ago
| de1/atari800core.qsf | ||
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set_global_assignment -name QIP_FILE pll.qip
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set_global_assignment -name VHDL_FILE sram.vhdl
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set_global_assignment -name VHDL_FILE sync_switches.vhd
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set_global_assignment -name VHDL_FILE zpu_rom.vhdl
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| de1/atari800core_de1.vhd | ||
|---|---|---|
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signal SDRAM_REFRESH : std_logic;
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signal SYSTEM_RESET_REQUEST: std_logic;
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-- pokey keyboard
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SIGNAL KEYBOARD_SCAN : std_logic_vector(5 downto 0);
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SIGNAL KEYBOARD_RESPONSE : std_logic_vector(1 downto 0);
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| ... | ... | |
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SIGNAL CONSOL_SELECT : std_logic;
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SIGNAL CONSOL_OPTION : std_logic;
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-- 6502 throttling
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SIGNAL THROTTLE_COUNT_6502 : std_logic_vector(5 downto 0);
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-- SIO
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SIGNAL SIO_RXD : std_logic;
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SIGNAL SIO_COMMAND : std_logic;
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| ... | ... | |
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signal AUDIO_LEFT : std_logic_vector(15 downto 0);
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signal AUDIO_RIGHT : std_logic_vector(15 downto 0);
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-- dma/virtual drive
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signal DMA_ADDR_FETCH : std_logic_vector(23 downto 0);
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signal DMA_WRITE_DATA : std_logic_vector(31 downto 0);
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signal DMA_FETCH : std_logic;
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signal DMA_32BIT_WRITE_ENABLE : std_logic;
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signal DMA_16BIT_WRITE_ENABLE : std_logic;
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signal DMA_8BIT_WRITE_ENABLE : std_logic;
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signal DMA_READ_ENABLE : std_logic;
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signal DMA_MEMORY_READY : std_logic;
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signal DMA_MEMORY_DATA : std_logic_vector(31 downto 0);
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signal ZPU_ADDR_ROM : std_logic_vector(15 downto 0);
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signal ZPU_ROM_DATA : std_logic_vector(31 downto 0);
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signal ZPU_OUT1 : std_logic_vector(31 downto 0);
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signal ZPU_OUT2 : std_logic_vector(31 downto 0);
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signal ZPU_OUT3 : std_logic_vector(31 downto 0);
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signal ZPU_OUT4 : std_logic_vector(31 downto 0);
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signal zpu_pokey_enable : std_logic;
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signal zpu_sio_txd : std_logic;
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signal zpu_sio_rxd : std_logic;
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signal zpu_sio_command : std_logic;
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SIGNAL FKEYS : std_logic_vector(11 downto 0);
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-- system control from zpu
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signal ram_select : std_logic_vector(2 downto 0);
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signal rom_select : std_logic_vector(5 downto 0);
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signal reset_atari : std_logic;
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signal pause_atari : std_logic;
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SIGNAL speed_6502 : std_logic_vector(5 downto 0);
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BEGIN
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-- ANYTHING NOT CONNECTED...
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| ... | ... | |
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FL_RST_N <= '1';
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FL_ADDR <= (others=>'0');
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SD_CLK <= '1';
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SD_CMD <= '1';
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SD_THREE <= '1';
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LEDG <= (others=>'1');
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LEDR <= (others=>'1');
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SYSTEM_RESET_REQUEST <= '0';
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-- TODO FUJI? Or Program counter or...
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hexdecoder0 : entity work.hexdecoder
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PORT MAP(CLK => CLK,
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| ... | ... | |
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)
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PORT MAP(CLK_SYSTEM => CLK,
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CLK_SDRAM => CLK_SDRAM,
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RESET_N => RESET_N and not(SYSTEM_RESET_REQUEST),
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RESET_N => RESET_N,
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READ_EN => SDRAM_READ_ENABLE,
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WRITE_EN => SDRAM_WRITE_ENABLE,
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REQUEST => SDRAM_REQUEST,
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| ... | ... | |
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internalromram1 : entity work.internalromram
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GENERIC MAP
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(
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internal_rom => 1,
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internal_rom => 0,
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internal_ram => 0
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)
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PORT MAP (
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| ... | ... | |
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-- for I in 0 to 35 generate
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-- gpio_1(I) <= gpio_1_out(I) when gpio_1_dir_out(I)='1' else 'Z';
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-- end generate gpio1_gen;
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--b2v_inst19 : entity work.gpio
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--PORT MAP(clk => CLK,
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-- gpio_enable => GPIO_ENABLE,
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| ... | ... | |
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CONSOL_START => CONSOL_START,
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CONSOL_SELECT => CONSOL_SELECT,
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CONSOL_OPTION => CONSOL_OPTION
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CONSOL_OPTION => CONSOL_OPTION,
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-- TODO - reset!
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FKEYS => FKEYS
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);
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-- SIO
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SIO_RXD <= UART_RXD;
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-- TODO combine
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--SIO_RXD <= UART_RXD;
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UART_TXD <= SIO_TXD;
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GPIO_0(1) <= SIO_COMMAND;
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-- THROTTLE
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THROTTLE_COUNT_6502 <= std_logic_vector(to_unsigned(1,6));
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zpu_sio_command <= SIO_COMMAND;
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zpu_sio_rxd <= SIO_TXD;
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SIO_RXD <= zpu_sio_txd;
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-- VIDEO
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VGA_HS <= not(VGA_HS_RAW xor VGA_VS_RAW);
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| ... | ... | |
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PORT MAP
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(
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CLK => CLK,
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RESET_N => RESET_N and SDRAM_RESET_N and not(SYSTEM_RESET_REQUEST),
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RESET_N => RESET_N and SDRAM_RESET_N and not(reset_atari),
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VIDEO_VS => VGA_VS_RAW,
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VIDEO_HS => VGA_HS_RAW,
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| ... | ... | |
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ROM_REQUEST => ROM_REQUEST,
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ROM_REQUEST_COMPLETE => ROM_REQUEST_COMPLETE,
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DMA_FETCH => '0',
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DMA_READ_ENABLE => '0',
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DMA_32BIT_WRITE_ENABLE => '0',
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DMA_16BIT_WRITE_ENABLE => '0',
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DMA_8BIT_WRITE_ENABLE => '0',
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DMA_ADDR => (others=>'0'),
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DMA_WRITE_DATA => (others=>'0'),
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MEMORY_READY_DMA => open,
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DMA_FETCH => dma_fetch,
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DMA_READ_ENABLE => dma_read_enable,
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DMA_32BIT_WRITE_ENABLE => dma_32bit_write_enable,
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DMA_16BIT_WRITE_ENABLE => dma_16bit_write_enable,
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DMA_8BIT_WRITE_ENABLE => dma_8bit_write_enable,
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DMA_ADDR => dma_addr_fetch,
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DMA_WRITE_DATA => dma_write_data,
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MEMORY_READY_DMA => dma_memory_ready,
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--DMA_MEMORY_DATA => dma_memory_data,
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PBI_SNOOP_DATA => DMA_MEMORY_DATA,
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RAM_SELECT => "110",
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ROM_SELECT => (others=>'0'),
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RAM_SELECT => ram_select,
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ROM_SELECT => rom_select,
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CART_EMULATION_SELECT => "0000000",
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CART_EMULATION_ACTIVATE => '0',
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PAL => '1',
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USE_SDRAM => '1',
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ROM_IN_RAM => '0',
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THROTTLE_COUNT_6502 => THROTTLE_COUNT_6502,
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HALT => '0'
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ROM_IN_RAM => '1',
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THROTTLE_COUNT_6502 => speed_6502,
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HALT => pause_atari
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);
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zpu: entity work.zpucore
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GENERIC MAP
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(
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platform => 1,
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spi_clock_div => 1 -- 28MHz/2. Max for SD cards is 25MHz...
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)
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PORT MAP
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(
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-- standard...
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CLK => CLK,
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RESET_N => RESET_N and sdram_reset_n,
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-- dma bus master (with many waitstates...)
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ZPU_ADDR_FETCH => dma_addr_fetch,
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ZPU_DATA_OUT => dma_write_data,
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ZPU_FETCH => dma_fetch,
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ZPU_32BIT_WRITE_ENABLE => dma_32bit_write_enable,
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ZPU_16BIT_WRITE_ENABLE => dma_16bit_write_enable,
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ZPU_8BIT_WRITE_ENABLE => dma_8bit_write_enable,
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ZPU_READ_ENABLE => dma_read_enable,
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ZPU_MEMORY_READY => dma_memory_ready,
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ZPU_MEMORY_DATA => dma_memory_data,
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-- rom bus master
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-- data on next cycle after addr
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ZPU_ADDR_ROM => zpu_addr_rom,
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ZPU_ROM_DATA => zpu_rom_data,
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-- spi master
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-- Too painful to bit bang spi from zpu, so we have a hardware master in here
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ZPU_SD_DAT0 => sd_data,
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ZPU_SD_CLK => sd_clk,
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ZPU_SD_CMD => sd_cmd,
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ZPU_SD_DAT3 => sd_three,
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-- SIO
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-- Ditto for speaking to Atari, we have a built in Pokey
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ZPU_POKEY_ENABLE => zpu_pokey_enable,
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ZPU_SIO_TXD => zpu_sio_txd,
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ZPU_SIO_RXD => zpu_sio_rxd,
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ZPU_SIO_COMMAND => zpu_sio_command,
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-- external control
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-- switches etc. sector DMA blah blah.
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ZPU_IN1 => X"00000"&FKEYS,
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ZPU_IN2 => X"00000000",
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ZPU_IN3 => X"00000000",
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ZPU_IN4 => X"00000000",
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-- ouputs - e.g. Atari system control, halt, throttle, rom select
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ZPU_OUT1 => zpu_out1,
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ZPU_OUT2 => zpu_out2,
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ZPU_OUT3 => zpu_out3,
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ZPU_OUT4 => zpu_out4
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);
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pause_atari <= zpu_out1(0);
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reset_atari <= zpu_out1(1);
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speed_6502 <= zpu_out1(7 downto 2);
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ram_select <= zpu_out1(10 downto 8);
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rom_select <= zpu_out1(16 downto 11);
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zpu_rom1: entity work.zpu_rom
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port map(
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clock => clk,
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address => zpu_addr_rom(13 downto 2),
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q => zpu_rom_data
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);
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enable_179_clock_div_zpu_pokey : entity work.enable_divider
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generic map (COUNT=>32) -- cycle_length
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port map(clk=>clk,reset_n=>reset_n,enable_in=>'1',enable_out=>zpu_pokey_enable);
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END vhdl;
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| de1/build.sh | ||
|---|---|---|
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cp i2sslave.vhdl build
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cp sram.vhdl build
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cp sync_switches.vhd build
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cp zpu_rom.vhdl build
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mkdir build/common
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mkdir build/common/a8core
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mkdir build/common/components
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mkdir build/common/zpu
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cp ../common/a8core/* ./build/common/a8core
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cp ../common/components/* ./build/common/components
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cp ../common/zpu/* ./build/common/zpu
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cd build
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../makeqsf ../atari800core.qsf ./common/a8core ./common/components
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../makeqsf ../atari800core.qsf ./common/a8core ./common/components ./common/zpu
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quartus_sh --flow compile atari800core
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| de1/zpu_rom.vhdl | ||
|---|---|---|
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--
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--ROMsUsingBlockRAMResources.
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--VHDLcodeforaROMwithregisteredoutput(template2)
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--
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.std_logic_unsigned.all;
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entity zpu_rom is
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port(
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clock:in std_logic;
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address:in std_logic_vector(11 downto 0);
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q:out std_logic_vector(31 downto 0)
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);
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end zpu_rom;
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architecture syn of zpu_rom is
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type rom_type is array(0 to 4095) of std_logic_vector(31 downto 0);
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signal ROM:rom_type:=
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(
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X"0b0b0b89",
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X"ad040b0b",
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X"0b0b0b0b",
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X"0b0b0b0b",
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X"0b0b0b0b",
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X"0b0b0b0b",
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X"0b0b0b0b",
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X"0b0b0b0b",
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X"0b0b0b0b",
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X"00000000",
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X"00000000",
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X"00000000",
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X"00000000",
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X"00000000",
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X"00000000",
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X"00000000",
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X"71fd0608",
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X"72830609",
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X"81058205",
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X"832b2a83",
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X"ffff0652",
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X"04000000",
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X"00000000",
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X"00000000",
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X"71fd0608",
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X"83ffff73",
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X"83060981",
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X"05820583",
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X"2b2b0906",
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X"7383ffff",
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X"0b0b0b0b",
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X"83a70400",
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X"72098105",
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X"72057373",
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X"09060906",
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X"73097306",
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X"070a8106",
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X"53510400",
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X"00000000",
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X"00000000",
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X"72722473",
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X"732e0753",
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X"51040000",
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X"00000000",
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X"00000000",
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X"00000000",
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X"00000000",
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X"00000000",
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X"71737109",
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X"71068106",
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X"30720a10",
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X"0a720a10",
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X"0a31050a",
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X"81065151",
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||
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X"53510400",
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||
|
X"00000000",
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||
|
X"72722673",
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||
|
X"732e0753",
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||
|
X"51040000",
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||
|
X"00000000",
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||
|
X"00000000",
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||
|
X"00000000",
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||
|
X"00000000",
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||
|
X"00000000",
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||
|
X"00000000",
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||
|
X"00000000",
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||
|
X"00000000",
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||
|
X"00000000",
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||
|
X"00000000",
|
||
|
X"00000000",
|
||
|
X"00000000",
|
||
|
X"00000000",
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||
|
X"0b0b0b88",
|
||
|
X"bc040000",
|
||
|
X"00000000",
|
||
|
X"00000000",
|
||
|
X"00000000",
|
||
|
X"00000000",
|
||
|
X"00000000",
|
||
|
X"00000000",
|
||
|
X"720a722b",
|
||
|
X"0a535104",
|
||
|
X"00000000",
|
||
|
X"00000000",
|
||
|
X"00000000",
|
||
|
X"00000000",
|
||
|
X"00000000",
|
||
|
X"00000000",
|
||
|
X"72729f06",
|
||
|
X"0981050b",
|
||
|
X"0b0b889f",
|
||
|
X"05040000",
|
||
|
X"00000000",
|
||
|
X"00000000",
|
||
|
X"00000000",
|
||
|
X"00000000",
|
||
|
X"72722aff",
|
||
|
X"739f062a",
|
||
|
X"0974090a",
|
||
|
X"8106ff05",
|
||
|
X"06075351",
|
||
|
X"04000000",
|
||
|
X"00000000",
|
||
|
X"00000000",
|
||
|
X"71715351",
|
||
|
X"020d0406",
|
||
|
X"73830609",
|
||
|
X"81058205",
|
||
|
X"832b0b2b",
|
||
|
X"0772fc06",
|
||
|
X"0c515104",
|
||
|
X"00000000",
|
||
|
X"72098105",
|
||
|
X"72050970",
|
||
|
X"81050906",
|
||
|
X"0a810653",
|
||
|
X"51040000",
|
||
|
X"00000000",
|
||
|
X"00000000",
|
||
|
X"00000000",
|
||
|
X"72098105",
|
||
|
X"72050970",
|
||
|
X"81050906",
|
||
|
X"0a098106",
|
||
|
X"53510400",
|
||
|
X"00000000",
|
||
|
X"00000000",
|
||
|
X"00000000",
|
||
|
X"71098105",
|
||
|
X"52040000",
|
||
|
X"00000000",
|
||
|
X"00000000",
|
||
|
X"00000000",
|
||
|
X"00000000",
|
||
|
X"00000000",
|
||
|
X"00000000",
|
||
|
X"72720981",
|
||
|
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|
X"be3872ae",
|
||
|
X"2e863881",
|
||
|
X"1454ec39",
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||
|
X"80ca3dfe",
|
||
|
X"81111570",
|
||
|
X"33515458",
|
||
|
X"74732e09",
|
||
|
X"8106a038",
|
||
|
X"fe821814",
|
||
|
X"70335153",
|
||
|
X"75732e09",
|
||
|
X"81069038",
|
||
|
X"fe831814",
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||
|
X"53817333",
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||
|
X"54547673",
|
||
|
X"2e833880",
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||
|
X"547383e0",
|
||
|
X"800c80ca",
|
||
|
X"3d0d04fc",
|
||
|
X"3d0d7670",
|
||
|
X"5255acaf",
|
||
|
X"3f83e080",
|
||
|
X"08548153",
|
||
|
X"83e08008",
|
||
|
X"80c13874",
|
||
|
X"51abf23f",
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||
|
X"83e08008",
|
||
|
X"80faf453",
|
||
|
X"83e08008",
|
||
|
X"5253fec8",
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||
|
X"3f83e080",
|
||
|
X"08a13880",
|
||
|
X"faf85272",
|
||
|
X"51feb93f",
|
||
|
X"83e08008",
|
||
|
X"923880fa",
|
||
|
X"fc527251",
|
||
|
X"feaa3f83",
|
||
|
X"e0800880",
|
||
|
X"2e833881",
|
||
|
X"54735372",
|
||
|
X"83e0800c",
|
||
|
X"863d0d04",
|
||
|
X"fd3d0d75",
|
||
|
X"705254ab",
|
||
|
X"ce3f8153",
|
||
|
X"83e08008",
|
||
|
X"97387351",
|
||
|
X"ab973f80",
|
||
|
X"fb805283",
|
||
|
X"e0800851",
|
||
|
X"fdf23f83",
|
||
|
X"e0800853",
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||
|
X"7283e080",
|
||
|
X"0c853d0d",
|
||
|
X"04e03d0d",
|
||
|
X"a33d0870",
|
||
|
X"525ea1e6",
|
||
|
X"3f83e080",
|
||
|
X"0833943d",
|
||
|
X"56547394",
|
||
|
X"3880feac",
|
||
|
X"52745184",
|
||
|
X"d1397d52",
|
||
|
X"7851a4d4",
|
||
|
X"3f84dc39",
|
||
|
X"7d51a1ce",
|
||
|
X"3f83e080",
|
||
|
X"08527451",
|
||
|
X"a0fe3f83",
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||
|
X"e0d00852",
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||
|
X"933d7052",
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||
|
X"5ba7b13f",
|
||
|
X"83e08008",
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||
|
X"59800b83",
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||
|
X"e0800855",
|
||
|
X"5c83e080",
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||
|
X"087c2e94",
|
||
|
X"38811c74",
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||
|
X"525caab2",
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||
|
X"3f83e080",
|
||
|
X"085483e0",
|
||
|
X"8008ee38",
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|
X"805aff7a",
|
||
|
X"437a427a",
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||
|
X"415f7909",
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|
X"709f2c7b",
|
||
|
X"065b547b",
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|
X"7a248438",
|
||
|
X"ff1c5af6",
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|
X"1a700970",
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|
X"9f2c7206",
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|
X"7bff125a",
|
||
|
X"5a525555",
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||
|
X"80752595",
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||
|
X"387651a9",
|
||
|
X"f13f83e0",
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||
|
X"800876ff",
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||
|
X"18585557",
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|
X"738024ed",
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|
X"38747f2e",
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|
X"8638eaa4",
|
||
|
X"3f745f78",
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||
|
X"ff1b7058",
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||
|
X"5e58807a",
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||
|
X"25953877",
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||
|
X"51a9c73f",
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||
|
X"83e08008",
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||
|
X"76ff1858",
|
||
|
X"55587380",
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||
|
X"24ed3880",
|
||
|
X"0b83e09c",
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||
|
X"0c800b83",
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||
|
X"e0bc0c80",
|
||
|
X"fb84519e",
|
||
|
X"983f8180",
|
||
|
X"0b83e0bc",
|
||
|
X"0c80fb8c",
|
||
|
X"519e8a3f",
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||
|
X"a80b83e0",
|
||
|
X"9c0c7680",
|
||
|
X"2e80e438",
|
||
|
X"83e09c08",
|
||
|
X"77793270",
|
||
|
X"30707207",
|
||
|
X"80257087",
|
||
|
X"2b83e0bc",
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||
|
X"0c515678",
|
||
|
X"535656a8",
|
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|
X"fe3f83e0",
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||
|
X"8008802e",
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||
|
X"883880fb",
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||
|
X"94519dd1",
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|
X"3f7651a8",
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||
|
X"c03f83e0",
|
||
|
X"80085280",
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||
|
X"faa8519d",
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||
|
X"c03f7651",
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|
X"a8c83f83",
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||
|
X"e0800883",
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|
X"e09c0855",
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|
X"57757425",
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|
X"8638a816",
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||
|
X"56f73975",
|
||
|
X"83e09c0c",
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|
X"86f07624",
|
||
|
X"ff983887",
|
||
|
X"980b83e0",
|
||
|
X"9c0c7780",
|
||
|
X"2eb13877",
|
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|
X"51a7fe3f",
|
||
|
X"83e08008",
|
||
|
X"785255a8",
|
||
Also available in: Unified diff
Added ZPU - it works. Need to add GPIO joystick back in...