Revision 65
Added by markw about 11 years ago
| common/a8core/antic.vhdl | ||
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-- dma fetching
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-- dma fetch - cache response until needed
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-- we allow two colour clocks for each fetch...
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process(memory_ready_both,hcount_reg,dma_fetch_reg,dma_address_reg,dma_fetch_destination_reg,dma_cache_ready_reg,dma_cache_reg,dma_fetch_request,vblank_reg, instruction_type_reg, instruction_reg, display_list_address_reg, memory_scan_address_reg, enable_dma, display_list_address_low_temp_reg)
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process(memory_data_in,memory_ready_both,hcount_reg,dma_fetch_reg,dma_address_reg,dma_fetch_destination_reg,dma_cache_ready_reg,dma_cache_reg,dma_fetch_request,vblank_reg, instruction_type_reg, instruction_reg, display_list_address_reg, memory_scan_address_reg, enable_dma, display_list_address_low_temp_reg)
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begin
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instruction_next <= instruction_reg;
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Also available in: Unified diff
Fix memory_data_in missing from sensitivity list