Revision 465
Added by markw about 9 years ago
| common/a8core/atari800core.vhd | ||
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SIGNAL PIA_READ_ENABLE : STD_LOGIC;
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SIGNAL PIA_WRITE_ENABLE : STD_LOGIC;
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SIGNAL PORTB_OUT_INT : STD_LOGIC_VECTOR(7 downto 0);
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SIGNAL PORTB_OPTIONS : STD_LOGIC_VECTOR(7 downto 0);
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-- PBI
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SIGNAL PBI_ADDR_INT : std_logic_vector(15 downto 0);
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| ... | ... | |
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CACHE_POKEY2_DATA => CACHE_POKEY2_DO,
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POKEY_DATA => POKEY_DO,
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CACHE_POKEY_DATA => CACHE_POKEY_DO,
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PORTB => PORTB_OUT_INT,
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PORTB => PORTB_OPTIONS,
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RAM_DATA => RAM_DO,
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ram_select => RAM_SELECT(2 downto 0),
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ROM_DATA => ROM_DO,
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| ... | ... | |
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freezer_state_out => freezer_state_out,
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pbi_enable => pbi_enable);
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gen_a800 : if system=1 generate
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PORTB_OPTIONS <= (others=>'0');
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end generate;
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gen_xl : if system=0 generate
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PORTB_OPTIONS <= PORTB_OUT_INT;
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end generate;
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pokey1 : entity work.pokey
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PORT MAP(CLK => CLK,
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ENABLE_179 => ENABLE_179_MEMWAIT,
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Also available in: Unified diff
Only enable portb ram control on xl/xe