Revision 462
Added by markw about 9 years ago
| eclaireXL/hardware/test/test_gpio/atari800core_eclaireXL.vhd | ||
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-- GPIO test
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signal count_reg : std_logic_vector(18 downto 0);
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signal count_next : std_logic_vector(18 downto 0);
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signal shift_reg : std_logic_vector(107 downto 0);
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signal shift_next : std_logic_vector(107 downto 0);
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signal shift_reg : std_logic_vector(7 downto 0);
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signal shift_next : std_logic_vector(7 downto 0);
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signal shift_trigger : std_logic;
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BEGIN
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| ... | ... | |
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process(clock_5,pll_locked)
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begin
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if (pll_locked='0') then
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shift_reg(107 downto 1) <= (others=>'0');
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shift_reg(7 downto 1) <= (others=>'0');
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shift_reg(0) <= '1';
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count_reg <= (others=>'0');
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elsif (clock_5'event and clock_5='1') then
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| ... | ... | |
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begin
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shift_next <= shift_reg;
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if (shift_trigger='1') then
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shift_next(107 downto 0) <= shift_reg(106 downto 0)&shift_reg(107);
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shift_next(7 downto 0) <= shift_reg(6 downto 0)&shift_reg(7);
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end if;
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end process;
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| ... | ... | |
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shift_trigger <= and_reduce(count_reg);
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end process;
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GPIOA <= shift_reg(107 downto 72);
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GPIOB <= shift_reg(71 downto 36);
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GPIOC <= shift_reg(35 downto 0);
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GPIOA <= shift_reg(7 downto 0)&shift_reg(7 downto 0)&shift_reg(7 downto 0)&shift_reg(7 downto 0)&shift_reg(7 downto 4);
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GPIOB <= shift_reg(6 downto 0)&shift_reg(7 downto 0)&shift_reg(7 downto 0)&shift_reg(7 downto 0)&shift_reg(7 downto 3);
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GPIOC <= shift_reg(5 downto 0)&shift_reg(7 downto 0)&shift_reg(7 downto 0)&shift_reg(7 downto 0)&shift_reg(7 downto 2);
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END vhdl;
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