EclaireXL

create_clock -period 5MHz [get_ports CLOCK_5]

derive_pll_clocks

derive_clock_uncertainty

# -------------------------------------------------------------------------- #

#

# Copyright (C) 1991-2014 Altera Corporation. All rights reserved.

# Your use of Altera Corporation's design tools, logic functions

# and other software and tools, and its AMPP partner logic

# functions, and any output files from any of the foregoing

# (including device programming or simulation files), and any

# associated documentation or information are expressly subject

# to the terms and conditions of the Altera Program License

# Subscription Agreement, the Altera Quartus II License Agreement,

# the Altera MegaCore Function License Agreement, or other

# applicable license agreement, including, without limitation,

# that your use is for the sole purpose of programming logic

# devices manufactured by Altera and sold by Altera or its

# authorized distributors. Please refer to the applicable

# agreement for further details.

#

# -------------------------------------------------------------------------- #

#

# Quartus II 64-Bit

# Version 14.0.0 Build 200 06/17/2014 SJ Web Edition

# Date created = 20:32:21 July 11, 2015

#

# -------------------------------------------------------------------------- #

#

# Notes:

#

# 1) The default values for assignments are stored in the file:

# atari800core_eclaireXL_assignment_defaults.qdf

# If this file doesn't exist, see file:

# assignment_defaults.qdf

#

# 2) Altera recommends that you do not modify this file. This

# file is updated automatically by the Quartus II software

# and any changes you make may be lost or overwritten.

#

# -------------------------------------------------------------------------- #

set_global_assignment -name FAMILY "Cyclone V"

set_global_assignment -name TOP_LEVEL_ENTITY atari800core_eclaireXL

set_global_assignment -name ORIGINAL_QUARTUS_VERSION 14.0

set_global_assignment -name PROJECT_CREATION_TIME_DATE "20:32:21 JULY 11, 2015"

set_global_assignment -name LAST_QUARTUS_VERSION 14.0

set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files

set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0

set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85

set_global_assignment -name DEVICE_FILTER_PACKAGE FBGA

set_global_assignment -name DEVICE_FILTER_PIN_COUNT 484

set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 256

set_global_assignment -name EDA_SIMULATION_TOOL "ModelSim-Altera (VHDL)"

set_global_assignment -name EDA_OUTPUT_DATA_FORMAT VHDL -section_id eda_simulation

set_global_assignment -name QIP_FILE pll.qip

set_global_assignment -name VHDL_FILE atari800core_eclaireXL.vhd

set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW"

set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"

set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "3.3-V LVTTL"

set_location_assignment PIN_H16 -to CLOCK_5

set_location_assignment PIN_A5 -to VGA_R[0]

set_location_assignment PIN_B5 -to VGA_R[1]

set_location_assignment PIN_B6 -to VGA_R[2]

set_location_assignment PIN_D6 -to VGA_R[3]

set_location_assignment PIN_C6 -to VGA_R[4]

set_location_assignment PIN_A7 -to VGA_R[5]

set_location_assignment PIN_B7 -to VGA_R[6]

set_location_assignment PIN_E7 -to VGA_R[7]

set_location_assignment PIN_D7 -to VGA_G[0]

set_location_assignment PIN_F7 -to VGA_G[1]

set_location_assignment PIN_A8 -to VGA_G[2]

set_location_assignment PIN_G8 -to VGA_G[3]

set_location_assignment PIN_C8 -to VGA_G[4]

set_location_assignment PIN_H8 -to VGA_G[5]

set_location_assignment PIN_A9 -to VGA_G[6]

set_location_assignment PIN_D9 -to VGA_G[7]

set_location_assignment PIN_C9 -to VGA_BLANK_N

set_location_assignment PIN_E9 -to VGA_B[0]

set_location_assignment PIN_F9 -to VGA_B[1]

set_location_assignment PIN_A10 -to VGA_B[2]

set_location_assignment PIN_B10 -to VGA_B[3]

set_location_assignment PIN_E10 -to VGA_B[4]

set_location_assignment PIN_F10 -to VGA_B[5]

set_location_assignment PIN_G10 -to VGA_B[6]

set_location_assignment PIN_B11 -to VGA_B[7]

set_location_assignment PIN_G11 -to VGA_CLK

set_location_assignment PIN_C11 -to VGA_HS

set_location_assignment PIN_H11 -to VGA_VS

set_location_assignment PIN_J11 -to AUDIO_LEFT

set_location_assignment PIN_A12 -to AUDIO_RIGHT

set_location_assignment PIN_B12 -to GPIOC[17]

set_location_assignment PIN_D12 -to GPIOC[16]

set_location_assignment PIN_E12 -to GPIOC[15]

set_location_assignment PIN_F12 -to GPIOC[14]

set_location_assignment PIN_A13 -to GPIOC[13]

set_location_assignment PIN_B13 -to GPIOC[12]

set_location_assignment PIN_D13 -to GPIOC[11]

set_location_assignment PIN_C13 -to GPIOC[10]

set_location_assignment PIN_F13 -to GPIOC[9]

set_location_assignment PIN_G13 -to GPIOC[8]

set_location_assignment PIN_A14 -to GPIOC[7]

set_location_assignment PIN_E14 -to GPIOC[6]

set_location_assignment PIN_F14 -to GPIOC[5]

set_location_assignment PIN_H14 -to GPIOC[4]

set_location_assignment PIN_A15 -to GPIOC[3]

set_location_assignment PIN_B15 -to GPIOC[2]

set_location_assignment PIN_E15 -to GPIOC[1]

set_location_assignment PIN_C15 -to GPIOC[0]

set_location_assignment PIN_F15 -to GPIOA[0]

set_location_assignment PIN_G15 -to GPIOB[0]

set_location_assignment PIN_B16 -to GPIOA[1]

set_location_assignment PIN_E16 -to GPIOB[1]

set_location_assignment PIN_C16 -to GPIOA[2]

set_location_assignment PIN_D17 -to GPIOB[2]

set_location_assignment PIN_G17 -to GPIOA[3]

set_location_assignment PIN_G18 -to GPIOB[3]

set_location_assignment PIN_G16 -to GPIOA[4]

set_location_assignment PIN_H18 -to GPIOB[4]

set_location_assignment PIN_J18 -to GPIOA[5]

set_location_assignment PIN_J19 -to GPIOB[5]

set_location_assignment PIN_J17 -to GPIOA[6]

set_location_assignment PIN_K22 -to GPIOB[6]

set_location_assignment PIN_K21 -to GPIOA[7]

set_location_assignment PIN_K19 -to GPIOB[7]

set_location_assignment PIN_K20 -to GPIOA[8]

set_location_assignment PIN_K17 -to GPIOB[8]

set_location_assignment PIN_K16 -to GPIOA[9]

set_location_assignment PIN_L22 -to GPIOB[9]

set_location_assignment PIN_L19 -to GPIOA[10]

set_location_assignment PIN_L18 -to GPIOB[10]

set_location_assignment PIN_L17 -to GPIOA[11]

set_location_assignment PIN_M22 -to GPIOB[11]

set_location_assignment PIN_M21 -to GPIOA[12]

set_location_assignment PIN_M18 -to GPIOB[12]

set_location_assignment PIN_M20 -to GPIOA[13]

set_location_assignment PIN_M16 -to GPIOB[13]

set_location_assignment PIN_N21 -to GPIOA[14]

set_location_assignment PIN_N19 -to GPIOB[14]

set_location_assignment PIN_N20 -to GPIOA[15]

set_location_assignment PIN_N16 -to GPIOB[15]

set_location_assignment PIN_P22 -to GPIOA[16]

set_location_assignment PIN_P18 -to GPIOB[16]

set_location_assignment PIN_P19 -to GPIOA[17]

set_location_assignment PIN_P17 -to GPIOB[17]

set_location_assignment PIN_P16 -to GPIOA[18]

set_location_assignment PIN_R22 -to GPIOB[18]

set_location_assignment PIN_R21 -to GPIOA[19]

set_location_assignment PIN_R17 -to GPIOB[19]

set_location_assignment PIN_R16 -to GPIOA[20]

set_location_assignment PIN_T22 -to GPIOB[20]

set_location_assignment PIN_T19 -to GPIOA[21]

set_location_assignment PIN_T20 -to GPIOB[21]

set_location_assignment PIN_T18 -to GPIOA[22]

set_location_assignment PIN_T17 -to GPIOB[22]

set_location_assignment PIN_U22 -to GPIOA[23]

set_location_assignment PIN_U21 -to GPIOB[23]

set_location_assignment PIN_U20 -to GPIOA[24]

set_location_assignment PIN_V21 -to GPIOB[24]

set_location_assignment PIN_V19 -to GPIOA[25]

set_location_assignment PIN_V20 -to GPIOB[25]

set_location_assignment PIN_W22 -to GPIOA[26]

set_location_assignment PIN_W21 -to GPIOB[26]

set_location_assignment PIN_Y22 -to GPIOA[27]

set_location_assignment PIN_Y21 -to GPIOB[27]

set_location_assignment PIN_AA22 -to GPIOA[28]

set_location_assignment PIN_AB22 -to GPIOB[28]

set_location_assignment PIN_AB21 -to GPIOA[29]

set_location_assignment PIN_AB20 -to GPIOB[29]

set_location_assignment PIN_AA20 -to GPIOA[30]

set_location_assignment PIN_Y20 -to GPIOB[30]

set_location_assignment PIN_AA19 -to GPIOA[31]

set_location_assignment PIN_W19 -to GPIOB[31]

set_location_assignment PIN_Y19 -to GPIOA[32]

set_location_assignment PIN_AB18 -to GPIOB[32]

set_location_assignment PIN_AA18 -to GPIOA[33]

set_location_assignment PIN_V18 -to GPIOB[33]

set_location_assignment PIN_AB17 -to GPIOA[34]

set_location_assignment PIN_AA17 -to GPIOB[34]

set_location_assignment PIN_U17 -to GPIOA[35]

set_location_assignment PIN_Y17 -to GPIOB[35]

set_location_assignment PIN_Y16 -to GPIOC[35]

set_location_assignment PIN_V16 -to GPIOC[34]

set_location_assignment PIN_W16 -to GPIOC[33]

set_location_assignment PIN_U16 -to GPIOC[32]

set_location_assignment PIN_AB15 -to GPIOC[31]

set_location_assignment PIN_AA15 -to GPIOC[30]

set_location_assignment PIN_V15 -to GPIOC[29]

set_location_assignment PIN_Y15 -to GPIOC[28]

set_location_assignment PIN_U15 -to GPIOC[27]

set_location_assignment PIN_T15 -to GPIOC[26]

set_location_assignment PIN_AA14 -to GPIOC[25]

set_location_assignment PIN_V14 -to GPIOC[24]

set_location_assignment PIN_Y14 -to GPIOC[23]

set_location_assignment PIN_T14 -to GPIOC[22]

set_location_assignment PIN_R14 -to GPIOC[21]

set_location_assignment PIN_AB13 -to GPIOC[20]

set_location_assignment PIN_AA13 -to GPIOC[19]

set_location_assignment PIN_V13 -to GPIOC[18]

set_location_assignment PIN_U13 -to SD_WRITEPROTECT

set_location_assignment PIN_T13 -to SD_DETECT

set_location_assignment PIN_AB12 -to SD_DAT1

set_location_assignment PIN_AA12 -to SD_DAT0

set_location_assignment PIN_U12 -to SD_CLK

set_location_assignment PIN_T12 -to SD_CMD

set_location_assignment PIN_R12 -to SD_DAT3

set_location_assignment PIN_AB11 -to SD_DAT2

set_location_assignment PIN_U11 -to PS2CLK

set_location_assignment PIN_Y11 -to PS2DAT

set_location_assignment PIN_R11 -to USB2DM

set_location_assignment PIN_AB10 -to USB2DP

set_location_assignment PIN_AA10 -to USB1DM

set_location_assignment PIN_V10 -to USB1DP

set_location_assignment PIN_Y10 -to DRAM_ADDR[4]

set_location_assignment PIN_U10 -to DRAM_ADDR[5]

set_location_assignment PIN_T10 -to DRAM_ADDR[6]

set_location_assignment PIN_AA9 -to DRAM_ADDR[7]

set_location_assignment PIN_W9 -to DRAM_ADDR[8]

set_location_assignment PIN_Y9 -to DRAM_ADDR[9]

set_location_assignment PIN_V9 -to DRAM_ADDR[11]

set_location_assignment PIN_T9 -to DRAM_ADDR[12]

set_location_assignment PIN_AB8 -to DRAM_CKE

set_location_assignment PIN_AA8 -to DRAM_CLK

set_location_assignment PIN_U8 -to DRAM_UDQM

set_location_assignment PIN_W8 -to DRAM_DQ[8]

set_location_assignment PIN_T8 -to DRAM_DQ[9]

set_location_assignment PIN_AB7 -to DRAM_DQ[10]

set_location_assignment PIN_AA7 -to DRAM_DQ[11]

set_location_assignment PIN_U7 -to DRAM_DQ[12]

set_location_assignment PIN_AB6 -to DRAM_DQ[13]

set_location_assignment PIN_V6 -to DRAM_DQ[14]

set_location_assignment PIN_AB5 -to DRAM_DQ[15]

set_location_assignment PIN_U6 -to DRAM_ADDR[3]

set_location_assignment PIN_T7 -to DRAM_ADDR[2]

set_location_assignment PIN_R5 -to DRAM_ADDR[1]

set_location_assignment PIN_R6 -to DRAM_ADDR[0]

set_location_assignment PIN_R7 -to DRAM_ADDR[10]

set_location_assignment PIN_P6 -to DRAM_BA_1

set_location_assignment PIN_P7 -to DRAM_BA_0

set_location_assignment PIN_P8 -to DRAM_CS_N

set_location_assignment PIN_N6 -to DRAM_RAS_N

set_location_assignment PIN_N8 -to DRAM_CAS_N

set_location_assignment PIN_N9 -to DRAM_WE_N

set_location_assignment PIN_M6 -to DRAM_LDQM

set_location_assignment PIN_M7 -to DRAM_DQ[7]

set_location_assignment PIN_M8 -to DRAM_DQ[6]

set_location_assignment PIN_L7 -to DRAM_DQ[5]

set_location_assignment PIN_L8 -to DRAM_DQ[4]

set_location_assignment PIN_K7 -to DRAM_DQ[0]

set_location_assignment PIN_K9 -to DRAM_DQ[1]

set_location_assignment PIN_J7 -to DRAM_DQ[2]

set_location_assignment PIN_J8 -to DRAM_DQ[3]

set_location_assignment PIN_H6 -to ADC_SDA

set_location_assignment PIN_G6 -to ADC_SCL

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOA[0]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOA[1]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOA[2]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOA[3]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOA[4]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOA[5]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOA[6]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOA[7]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOA[8]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOA[9]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOA[10]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOA[11]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOA[12]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOA[13]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOA[14]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOA[15]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOA[16]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOA[17]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOA[18]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOA[19]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOA[20]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOA[21]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOA[22]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOA[23]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOA[24]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOA[25]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOA[26]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOA[27]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOA[28]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOA[29]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOA[30]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOA[31]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOA[32]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOA[33]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOA[34]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOA[35]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOB[0]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOB[1]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOB[2]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOB[3]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOB[4]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOB[5]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOB[6]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOB[7]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOB[8]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOB[9]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOB[10]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOB[11]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOB[12]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOB[13]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOB[14]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOB[15]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOB[16]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOB[17]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOB[18]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOB[19]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOB[20]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOB[21]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOB[22]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOB[23]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOB[24]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOB[25]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOB[26]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOB[27]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOB[28]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOB[29]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOB[30]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOB[31]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOB[32]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOB[33]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOB[34]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOB[35]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOC[0]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOC[1]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOC[2]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOC[3]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOC[4]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOC[5]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOC[6]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOC[7]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOC[8]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOC[9]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOC[10]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOC[11]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOC[12]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOC[13]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOC[14]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOC[15]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOC[16]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOC[17]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOC[18]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOC[19]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOC[20]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOC[21]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOC[22]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOC[23]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOC[24]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOC[25]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOC[26]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOC[27]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOC[28]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOC[29]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOC[30]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOC[31]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOC[32]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOC[33]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOC[34]

set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to GPIOC[35]

set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to DRAM_ADDR[4]

set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to DRAM_ADDR[5]

set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to DRAM_ADDR[6]

set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to DRAM_ADDR[7]

set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to DRAM_ADDR[8]

set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to DRAM_ADDR[9]

set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to DRAM_ADDR[11]

set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to DRAM_ADDR[12]

set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to DRAM_CKE

set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to DRAM_CLK

set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to DRAM_UDQM

set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to DRAM_DQ[8]

set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to DRAM_DQ[9]

set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to DRAM_DQ[10]

set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to DRAM_DQ[11]

set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to DRAM_DQ[12]

set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to DRAM_DQ[13]

set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to DRAM_DQ[14]

set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to DRAM_DQ[15]

set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to DRAM_ADDR[3]

set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to DRAM_ADDR[2]

set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to DRAM_ADDR[1]

set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to DRAM_ADDR[0]

set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to DRAM_ADDR[10]

set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to DRAM_BA_1

set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to DRAM_BA_0

set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to DRAM_CS_N

set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to DRAM_RAS_N

set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to DRAM_CAS_N

set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to DRAM_WE_N

set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to DRAM_LDQM

set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to DRAM_DQ[7]

set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to DRAM_DQ[6]

set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to DRAM_DQ[5]

set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to DRAM_DQ[4]

set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to DRAM_DQ[0]

set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to DRAM_DQ[1]

set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to DRAM_DQ[2]

set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to DRAM_DQ[3]

set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to DRAM_DQ[0]

set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to DRAM_DQ[1]

set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to DRAM_DQ[2]

set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to DRAM_DQ[3]

set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to DRAM_DQ[4]

set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to DRAM_DQ[5]

set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to DRAM_DQ[6]

set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to DRAM_DQ[7]

set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to DRAM_DQ[8]

set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to DRAM_DQ[9]

set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to DRAM_DQ[10]

set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to DRAM_DQ[11]

set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to DRAM_DQ[12]

set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to DRAM_DQ[13]

set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to DRAM_DQ[14]

set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to DRAM_DQ[15]

set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to DRAM_ADDR[0]

set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to DRAM_ADDR[1]

set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to DRAM_ADDR[2]

set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to DRAM_ADDR[3]

set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to DRAM_ADDR[4]

set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to DRAM_ADDR[5]

set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to DRAM_ADDR[6]

set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to DRAM_ADDR[7]

set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to DRAM_ADDR[8]

set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to DRAM_ADDR[9]

set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to DRAM_ADDR[10]

set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to DRAM_ADDR[11]

set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to DRAM_ADDR[12]

set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to DRAM_BA_0

set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to DRAM_BA_1

set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to DRAM_UDQM

set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to DRAM_LDQM

set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to DRAM_RAS_N

set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to DRAM_CAS_N

set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to DRAM_WE_N

set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to DRAM_CS_N

set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to DRAM_DQ[0]

set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to DRAM_DQ[1]

set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to DRAM_DQ[2]

set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to DRAM_DQ[3]

set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to DRAM_DQ[4]

set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to DRAM_DQ[5]

set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to DRAM_DQ[6]

set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to DRAM_DQ[7]

set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to DRAM_DQ[8]

set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to DRAM_DQ[9]

set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to DRAM_DQ[10]

set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to DRAM_DQ[11]

set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to DRAM_DQ[12]

set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to DRAM_DQ[13]

set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to DRAM_DQ[14]

set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to DRAM_DQ[15]

set_instance_assignment -name FAST_INPUT_REGISTER ON -to DRAM_DQ[0]

set_instance_assignment -name FAST_INPUT_REGISTER ON -to DRAM_DQ[1]

set_instance_assignment -name FAST_INPUT_REGISTER ON -to DRAM_DQ[2]

set_instance_assignment -name FAST_INPUT_REGISTER ON -to DRAM_DQ[3]

set_instance_assignment -name FAST_INPUT_REGISTER ON -to DRAM_DQ[4]

set_instance_assignment -name FAST_INPUT_REGISTER ON -to DRAM_DQ[5]

set_instance_assignment -name FAST_INPUT_REGISTER ON -to DRAM_DQ[6]

set_instance_assignment -name FAST_INPUT_REGISTER ON -to DRAM_DQ[7]

set_instance_assignment -name FAST_INPUT_REGISTER ON -to DRAM_DQ[8]

set_instance_assignment -name FAST_INPUT_REGISTER ON -to DRAM_DQ[9]

set_instance_assignment -name FAST_INPUT_REGISTER ON -to DRAM_DQ[10]

set_instance_assignment -name FAST_INPUT_REGISTER ON -to DRAM_DQ[11]

set_instance_assignment -name FAST_INPUT_REGISTER ON -to DRAM_DQ[12]

set_instance_assignment -name FAST_INPUT_REGISTER ON -to DRAM_DQ[13]

set_instance_assignment -name FAST_INPUT_REGISTER ON -to DRAM_DQ[14]

set_instance_assignment -name FAST_INPUT_REGISTER ON -to DRAM_DQ[15]

set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to SD_DAT2

set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to SD_DAT1

set_global_assignment -name DEVICE 5CEBA2F23C8

create_clock -period 5MHz [get_ports CLOCK_5]

derive_pll_clocks

derive_clock_uncertainty

---------------------------------------------------------------------------

-- (c) 2013 mark watson

-- I am happy for anyone to use this for non-commercial use.

-- If my vhdl files are used commercially or otherwise sold,

-- please contact me for explicit permission at scrameta (gmail).

-- This applies for source and binary form and derived works.

---------------------------------------------------------------------------

LIBRARY ieee;

USE ieee.std_logic_1164.all;

use ieee.numeric_std.all;

USE IEEE.STD_LOGIC_UNSIGNED.ALL;

use IEEE.STD_LOGIC_MISC.all;

LIBRARY work;

ENTITY atari800core_eclaireXL IS

PORT

(

CLOCK_5 : IN STD_LOGIC;

PS2CLK : IN STD_LOGIC;

PS2DAT : IN STD_LOGIC;

GPIOA : INOUT STD_LOGIC_VECTOR(35 DOWNTO 0);

GPIOB : INOUT STD_LOGIC_VECTOR(35 DOWNTO 0);

GPIOC: INOUT STD_LOGIC_VECTOR(35 DOWNTO 0);

DRAM_BA_0 : OUT STD_LOGIC;

DRAM_BA_1 : OUT STD_LOGIC;

DRAM_CS_N : OUT STD_LOGIC;

DRAM_RAS_N : OUT STD_LOGIC;

DRAM_CAS_N : OUT STD_LOGIC;

DRAM_WE_N : OUT STD_LOGIC;

DRAM_LDQM : OUT STD_LOGIC;

DRAM_UDQM : OUT STD_LOGIC;

DRAM_CLK : OUT STD_LOGIC;

DRAM_CKE : OUT STD_LOGIC;

DRAM_ADDR : OUT STD_LOGIC_VECTOR(12 DOWNTO 0);

DRAM_DQ : INOUT STD_LOGIC_VECTOR(15 DOWNTO 0);

SD_WRITEPROTECT : IN STD_LOGIC;

SD_DETECT : IN STD_LOGIC;

SD_DAT1 : OUT STD_LOGIC;

SD_DAT0 : IN STD_LOGIC;

SD_CLK : OUT STD_LOGIC;

SD_CMD : OUT STD_LOGIC;

SD_DAT3 : OUT STD_LOGIC;

SD_DAT2 : OUT STD_LOGIC;

VGA_VS : OUT STD_LOGIC;

VGA_HS : OUT STD_LOGIC;

VGA_B : OUT STD_LOGIC_VECTOR(7 DOWNTO 0);

VGA_G : OUT STD_LOGIC_VECTOR(7 DOWNTO 0);

VGA_R : OUT STD_LOGIC_VECTOR(7 DOWNTO 0);

VGA_BLANK_N : OUT STD_LOGIC;

VGA_CLK : OUT STD_LOGIC;

AUDIO_LEFT : OUT STD_LOGIC;

AUDIO_RIGHT : OUT STD_LOGIC;

USB2DM: INOUT STD_LOGIC;

USB2DP: INOUT STD_LOGIC;

USB1DM: INOUT STD_LOGIC;

USB1DP: INOUT STD_LOGIC;

ADC_SDA: INOUT STD_LOGIC;

ADC_SCL: INOUT STD_LOGIC

);

END atari800core_eclaireXL;

ARCHITECTURE vhdl OF atari800core_eclaireXL IS

component hq_dac

port (

reset :in std_logic;

clk :in std_logic;

clk_ena : in std_logic;

pcm_in : in std_logic_vector(19 downto 0);

dac_out : out std_logic

);

end component;

component pll

port (

refclk : in std_logic := '0'; -- refclk.clk

rst : in std_logic := '0'; -- reset.reset

outclk_0 : out std_logic; -- outclk0.clk

outclk_1 : out std_logic; -- outclk1.clk

outclk_2 : out std_logic; -- outclk2.clk

outclk_3 : out std_logic; -- outclk3.clk

locked : out std_logic -- locked.export

);

end component;

-- SYSTEM

SIGNAL CLK : STD_LOGIC;

SIGNAL CLK_114 : STD_LOGIC;

SIGNAL SVIDEO_ECS_CLK : STD_LOGIC;

SIGNAL PLL_LOCKED : STD_LOGIC;

BEGIN

pllinstance : pll

PORT MAP(refclk => CLOCK_5,

outclk_0 => CLK_114,

outclk_1 => CLK,

outclk_2 => DRAM_CLK,

outclk_3 => SVIDEO_ECS_CLK,

locked => PLL_LOCKED);

SD_DAT1 <= 'Z';

SD_DAT2 <= 'Z';

SD_DAT3 <= 'Z';

SD_CMD <= 'Z';

SD_CLK <= 'Z';

USB2DM <= 'Z';

USB2DP <= 'Z';

USB1DM <= 'Z';

USB1DP <= 'Z';

ADC_SDA <= 'Z';

ADC_SCL <= 'Z';

VGA_VS <= 'Z';

VGA_HS <= 'Z';

VGA_B <= (others=>'Z');

VGA_G <= (others=>'Z');

VGA_R <= (others=>'Z');

VGA_BLANK_N <= 'Z';

VGA_CLK <= 'Z';

AUDIO_LEFT <= 'Z';

AUDIO_RIGHT <= 'Z';

GPIOA <= (others=>'Z');

GPIOB <= (others=>'Z');

GPIOC <= (others=>'Z');

CLK_SDRAM <= CLK_114;

sdram_adaptor : entity work.sdram_statemachine

GENERIC MAP(ADDRESS_WIDTH => 22,

AP_BIT => 10,

COLUMN_WIDTH => 8,

ROW_WIDTH => 12

)

PORT MAP(CLK_SYSTEM => CLK,

CLK_SDRAM => CLK_SDRAM,

RESET_N => PLL_LOCKED,

READ_EN => SDRAM_READ_ENABLE,

WRITE_EN => SDRAM_WRITE_ENABLE,

REQUEST => SDRAM_REQUEST,

BYTE_ACCESS => PBI_WIDTH_8BIT_ACCESS,

WORD_ACCESS => PBI_WIDTH_16BIT_ACCESS,

LONGWORD_ACCESS => PBI_WIDTH_32BIT_ACCESS,

REFRESH => SDRAM_REFRESH,

ADDRESS_IN => SDRAM_ADDR,

DATA_IN => PBI_WRITE_DATA(31 downto 0),

SDRAM_DQ => DRAM_DQ,

COMPLETE => SDRAM_REQUEST_COMPLETE,

SDRAM_BA0 => DRAM_BA_0,

SDRAM_BA1 => DRAM_BA_1,

SDRAM_CKE => DRAM_CKE,

SDRAM_CS_N => DRAM_CS_N,

SDRAM_RAS_N => DRAM_RAS_N,

SDRAM_CAS_N => DRAM_CAS_N,

SDRAM_WE_N => DRAM_WE_N,

SDRAM_ldqm => DRAM_LDQM,

SDRAM_udqm => DRAM_UDQM,

DATA_OUT => SDRAM_DO,

SDRAM_ADDR => DRAM_ADDR(11 downto 0),

reset_client_n => SDRAM_RESET_N

);

DRAM_ADDR(12) <= '0';

-- Some kind of reading/writing test!

-- CPU?

process(clock_5,pll_locked)

begin

if (pll_locked='0') then

shift_reg(107 downto 1) <= (others=>'0');

shift_reg(0) <= '1';

count_reg <= (others=>'0');

elsif (clock_5'event and clock_5='1') then

shift_reg <= shift_next;

count_reg <= count_next;

end if;

end process;

process(shift_reg,shift_trigger)

begin

shift_next <= shift_reg;

if (shift_trigger='1') then

shift_next(107 downto 0) <= shift_reg(106 downto 0)&shift_reg(107);

end if;

end process;

process(count_reg)

begin

count_next <= std_logic_vector(unsigned(count_reg)+1);

shift_trigger <= and_reduce(count_reg);

end process;

END vhdl;

#!/usr/bin/perl -w

use strict;

my $wanted_variant = shift @ARGV;

my $name="eclaireXL";

#variants...

my $PAL = 1;

my $NTSC = 0;

my $RGB = 1; # i.e. not scandoubled

my $VGA = 2;

#Added like this to the generated qsf

#set_parameter -name TV 1

my %variants =

(

# "PAL" =>

# {

# "TV" => $PAL

# },

# "NTSC" =>

# {

# "TV" => $NTSC

# },

"A2EBA_RGB" =>

{

}

);

if (not defined $wanted_variant or (not exists $variants{$wanted_variant} and $wanted_variant ne "ALL"))

{

die "Provide variant of ALL or ".join ",",sort keys %variants;

}

foreach my $variant (sort keys %variants)

{

next if ($wanted_variant ne $variant and $wanted_variant ne "ALL");

print "Building $variant of $name\n";

my $dir = "build_$variant";

`rm -rf $dir`;

mkdir $dir;

`cp atari800core_eclaireXL.vhd $dir`;

`cp -a ../test_common/*pll* $dir`;

`cp -a *gpioram* $dir`;

`cp -a *zpu_rom* $dir`;

#`cp -a *serial_loader* $dir`;

`cp *.v $dir`;

`cp *.vhd* $dir`;

`cp atari800core*.sdc $dir`;

`mkdir $dir/common`;

`mkdir $dir/common/a8core`;

`mkdir $dir/common/components`;

`mkdir $dir/common/zpu`;

`cp ../../../../common/a8core/* ./$dir/common/a8core`;

`cp ../../../../common/components/* ./$dir/common/components`;

`cp ../../../../common/zpu/* ./$dir/common/zpu`;

chdir $dir;

`../../../../makeqsf ../atari800core_eclaireXL.qsf ./common/a8core ./common/components`;

foreach my $key (sort keys %{$variants{$variant}})

{

my $val = $variants{$variant}->{$key};

`echo set_parameter -name $key $val >> atari800core_eclaireXL.qsf`;

}

`quartus_sh --flow compile atari800core_eclaireXL > build.log 2> build.err`;

# `quartus_cpf --convert ../output_file.cof`;

chdir "..";

}

create_clock -period 5MHz [get_ports CLOCK_5]

derive_pll_clocks

derive_clock_uncertainty