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Revision 423

Added by markw about 10 years ago

Added build for svideo/composite mode

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eclaireXL/atari800core_eclaireXL.qsf_A2EBA
set_global_assignment -name DEVICE 5CEBA2F23C8
eclaireXL/atari800core_eclaireXL.qsf_A2EBA_COMP
set_global_assignment -name DEVICE 5CEBA2F23C8
eclaireXL/atari800core_eclaireXL.qsf_A2EBA_RGB
set_global_assignment -name DEVICE 5CEBA2F23C8
eclaireXL/atari800core_eclaireXL.vhd
LIBRARY ieee;
USE ieee.std_logic_1164.all;
use ieee.numeric_std.all;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
LIBRARY work;
......
GPIO : integer; -- 1 = OLD GPIO LAYOUT, 2=NEW GPIO LAYOUT (WIP)
-- For initial port may help to have no
internal_rom : integer := 1; -- if 0 expects it in sdram,is 1:16k os+basic, is 2:... TODO
internal_ram : integer := 16384 -- at start of memory map
internal_ram : integer := 16384; -- at start of memory map
svideo_out : integer -- 0=VGA,1=SVIDEO/COMPOSITE
);
PORT
(
......
outclk_0 : out std_logic; -- outclk0.clk
outclk_1 : out std_logic; -- outclk1.clk
outclk_2 : out std_logic; -- outclk2.clk
outclk_3 : out std_logic; -- outclk3.clk
locked : out std_logic -- locked.export
);
end component;
......
-- SYSTEM
SIGNAL CLK : STD_LOGIC;
SIGNAL CLK_114 : STD_LOGIC;
SIGNAL CLK_SDRAM : STD_LOGIC;
SIGNAL RESET_N : STD_LOGIC;
signal SDRAM_RESET_N : std_logic;
......
SIGNAL SIO_CLOCKIN : std_logic;
-- VIDEO
signal VGA_VS_RAW : std_logic;
signal VGA_HS_RAW : std_logic;
signal VGA_CS_RAW : std_logic;
signal VGA_BLANK : std_logic;
signal VIDEO_VS : std_logic;
signal VIDEO_HS : std_logic;
signal VIDEO_CS : std_logic;
signal VIDEO_BLANK : std_logic;
signal VIDEO_BURST : std_logic;
signal VIDEO_ODD_LINE : std_logic;
signal VIDEO_R : std_logic_vector(7 downto 0);
signal VIDEO_G : std_logic_vector(7 downto 0);
signal VIDEO_B : std_logic_vector(7 downto 0);
-- AUDIO
signal AUDIO_L_PCM : std_logic_vector(15 downto 0);
......
-- scandoubler
signal half_scandouble_enable_reg : std_logic;
signal half_scandouble_enable_next : std_logic;
signal VIDEO_B : std_logic_vector(7 downto 0);
signal ATARI_COLOUR : std_logic_vector(7 downto 0);
signal freezer_enable : std_logic;
signal freezer_activate: std_logic;
......
-- CONFIG
SIGNAL USE_SDRAM : STD_LOGIC;
SIGNAL ROM_IN_RAM : STD_LOGIC;
-- svideo
signal svideo_dac_clk : std_logic;
signal svideo_ecs_clk : std_logic;
signal svideo_c : std_logic_vector(5 downto 0);
-- composite
SIGNAL svideo_yout : STD_LOGIC_VECTOR(7 DOWNTO 0);
SIGNAL svideo_yout_dly1 : STD_LOGIC_VECTOR(7 DOWNTO 0);
SIGNAL svideo_yout_dly2 : STD_LOGIC_VECTOR(7 DOWNTO 0);
SIGNAL svideo_yout_dly3 : STD_LOGIC_VECTOR(7 DOWNTO 0);
--SIGNAL svideo_cout : STD_LOGIC_VECTOR(7 DOWNTO 0);
SIGNAL cvbs1_out : STD_LOGIC_VECTOR(9 DOWNTO 0);
SIGNAL cvbs2_out : STD_LOGIC_VECTOR(7 DOWNTO 0);
SIGNAL luma : STD_LOGIC_VECTOR(9 DOWNTO 0);
SIGNAL chroma : STD_LOGIC_VECTOR(8 DOWNTO 0);
SIGNAL luma_saturated : STD_LOGIC_VECTOR(9 DOWNTO 0);
BEGIN
-- TODO
......
colour_enable => half_scandouble_enable_reg,
doubled_enable => '1',
scanlines_on => '0', -- SW(5),
vsync_in => VGA_VS_RAW,
hsync_in => VGA_HS_RAW,
csync_in => VGA_CS_RAW,
vsync_in => VIDEO_VS,
hsync_in => VIDEO_HS,
csync_in => VIDEO_CS,
pal => PAL,
colour_in => VIDEO_B,
colour_in => ATARI_COLOUR,
VSYNC => VGA_VS,
HSYNC => VGA_HS,
B => VGA_B,
G => VGA_G,
R => VGA_R);
B => VIDEO_B,
G => VIDEO_G,
R => VIDEO_R);
VGA_BLANK_N <= NOT(VGA_BLANK);
VGA_CLK <= CLK;
--gen_ntsc_pll : if tv=0 generate
......
--gen_old_pll : if tv=2 generate
pllinstance : pll
PORT MAP(refclk => CLOCK_5,
outclk_0 => CLK_SDRAM,
outclk_0 => CLK_114,
outclk_1 => CLK,
outclk_2 => DRAM_CLK,
outclk_3 => SVIDEO_ECS_CLK,
locked => PLL_LOCKED);
--end generate;
CLK_SDRAM <= CLK_114;
SVIDEO_DAC_CLK <= CLK_114;
-- USB2DM: INOUT STD_LOGIC;
-- USB2DP: INOUT STD_LOGIC;
-- USB1DM: INOUT STD_LOGIC;
......
SIO_RXD <= zpu_sio_txd and GPIO_SIO_RXD;
-- VIDEO
--VGA_HS <= not(VGA_HS_RAW xor VGA_VS_RAW);
--VGA_VS <= not(VGA_VS_RAW);
--VGA_HS <= not(VIDEO_HS xor VIDEO_VS);
--VGA_VS <= not(VIDEO_VS);
atari800 : entity work.atari800core
GENERIC MAP
......
CLK => CLK,
RESET_N => RESET_N and SDRAM_RESET_N and not(reset_atari),
VIDEO_VS => VGA_VS_RAW,
VIDEO_HS => VGA_HS_RAW,
VIDEO_CS => VGA_CS_RAW,
VIDEO_B => VIDEO_B,
VIDEO_VS => VIDEO_VS,
VIDEO_HS => VIDEO_HS,
VIDEO_CS => VIDEO_CS,
VIDEO_B => ATARI_COLOUR,
VIDEO_G => open,
VIDEO_R => open,
VIDEO_BLANK => VGA_BLANK,
VIDEO_BURST => open,
VIDEO_BLANK => VIDEO_BLANK,
VIDEO_BURST => VIDEO_BURST,
VIDEO_START_OF_FIELD => open,
VIDEO_ODD_LINE => open,
VIDEO_ODD_LINE => VIDEO_ODD_LINE,
AUDIO_L => AUDIO_L_PCM,
AUDIO_R => AUDIO_R_PCM,
......
--USB_JOY1 <= zpu_out2(5 downto 4)&zpu_out2(0)&zpu_out2(1)&zpu_out2(2)&zpu_out2(3);
--USB_JOY2 <= zpu_out3(5 downto 4)&zpu_out3(0)&zpu_out3(1)&zpu_out3(2)&zpu_out3(3);
gen_vga : if svideo_out=0 generate
VGA_R <= VIDEO_R;
VGA_G <= VIDEO_G;
VGA_B <= VIDEO_B;
VGA_BLANK_N <= NOT(VIDEO_BLANK);
END GENERATE;
gen_svideo : if svideo_out=1 generate
VGA_BLANK_N <= '1';
-- SVIDEO COMPONENT
svideo : entity work.svideo
PORT MAP
(
areset_n => RESET_N,
ecs_clk => SVIDEO_ECS_CLK,
dac_clk => SVIDEO_DAC_CLK,
r_in => VIDEO_R,
g_in => VIDEO_G,
b_in => VIDEO_B,
sof => VIDEO_VS, -- base on vsync?
vpos_lsb => VIDEO_ODD_LINE,
blank => VIDEO_BLANK,
burst => VIDEO_BURST,
csync_n => not(VIDEO_CS),
y_out => svideo_yout,
c_out => svideo_c,
luma_out => luma,
chroma_out => chroma,
pal_ntsc => not(pal)
);
VGA_R <= svideo_yout;
VGA_G <= svideo_c&"00";
---------------------------------
-- process for CVBS output (TODO - merge this into the svideo.vhd component, as an option...)
---------------------------------
-- cvbs_block:
PROCESS
(
svideo_dac_clk,
svideo_yout_dly1,
svideo_yout_dly2,
svideo_yout_dly3
)
BEGIN
IF (rising_edge(svideo_dac_clk)) THEN
svideo_yout_dly1 <= svideo_yout;
svideo_yout_dly2 <= svideo_yout_dly1;
svideo_yout_dly3 <= svideo_yout_dly2;
luma_saturated <= luma - "0000011111";
cvbs1_out <= luma_saturated + (chroma(8) & chroma(8 DOWNTO 0)) ;
IF (svideo_yout_dly2 = "00000000") THEN
cvbs2_out <= "00000000";
ELSE
cvbs2_out <= cvbs1_out(9 DOWNTO 2);
END IF;
END IF;
END PROCESS;
VGA_B <= cvbs2_out(7 DOWNTO 0); -- WHEN JOY1_n(2) = '1' ELSE svideo_yout(7 DOWNTO 4) ;
END GENERATE;
END vhdl;
eclaireXL/build.sh
# },
"A2EBArom" =>
{
"SVIDEO_OUT" => 0,
"TV" => 2,
"GPIO" => 2,
"internal_ram" => 65536,
......
},
"A9EFArom" =>
{
"SVIDEO_OUT" => 0,
"TV" => 2,
"GPIO" => 2,
"internal_ram" => 65536,
"internal_rom" => 1
},
"A2EBA" =>
"A2EBA_RGB" =>
{
"SVIDEO_OUT" => 0,
"TV" => 2,
"GPIO" => 2,
"internal_ram" => 0,
"internal_rom" => 0
},
"A2EBA_COMP" =>
{
"SVIDEO_OUT" => 1,
"TV" => 2,
"GPIO" => 2,
"internal_ram" => 0,
"internal_rom" => 0
},
"A9EFA" =>
{
"SVIDEO_OUT" => 0,
"TV" => 2,
"GPIO" => 2,
"internal_ram" => 0,
......
`mkdir $dir/common/a8core`;
`mkdir $dir/common/components`;
`mkdir $dir/common/zpu`;
`mkdir $dir/svideo`;
mkdir "./$dir/common/components/usbhostslave";
`cp ../common/components/usbhostslave/trunk/RTL/*/*.v ./$dir/common/components/usbhostslave`;
`cp ../common/a8core/* ./$dir/common/a8core`;
`cp ../common/components/* ./$dir/common/components`;
`cp ../common/zpu/* ./$dir/common/zpu`;
`cp ./svideo/* ./$dir/svideo`;
chdir $dir;
`../makeqsf ../atari800core_eclaireXL.qsf ./common/a8core ./common/components ./common/zpu ./common/components/usbhostslave`;
`../makeqsf ../atari800core_eclaireXL.qsf ./svideo ./common/a8core ./common/components ./common/zpu ./common/components/usbhostslave`;
`cat ../atari800core_eclaireXL.qsf_$variant >> atari800core_eclaireXL.qsf`;
foreach my $key (sort keys %{$variants{$variant}})
eclaireXL/pll/pll_0002.v
// interface 'outclk2'
output wire outclk_2,
// interface 'outclk3'
output wire outclk_3,
// interface 'locked'
output wire locked
);
......
.fractional_vco_multiplier("false"),
.reference_clock_frequency("5.0 MHz"),
.operation_mode("normal"),
.number_of_clocks(3),
.number_of_clocks(4),
.output_clock_frequency0("113.500000 MHz"),
.phase_shift0("0 ps"),
.duty_cycle0(50),
......
.output_clock_frequency2("113.500000 MHz"),
.phase_shift2("4405 ps"),
.duty_cycle2(50),
.output_clock_frequency3("0 MHz"),
.output_clock_frequency3("28.375 MHz"),
.phase_shift3("0 ps"),
.duty_cycle3(50),
.output_clock_frequency4("0 MHz"),
......
.pll_subtype("General")
) altera_pll_i (
.rst (rst),
.outclk ({outclk_2, outclk_1, outclk_0}),
.outclk ({outclk_3, outclk_2, outclk_1, outclk_0}),
.locked (locked),
.fboutclk ( ),
.fbclk (1'b0),
eclaireXL/pll.bsf
the Block Editor! File corruption is VERY likely to occur.
*/
/*
Copyright (C) 1991-2014 Altera Corporation. All rights reserved.
Copyright (C) 1991-2015 Altera Corporation. All rights reserved.
Your use of Altera Corporation's design tools, logic functions
and other software and tools, and its AMPP partner logic
functions, and any output files from any of the foregoing
......
*/
(header "symbol" (version "1.1"))
(symbol
(rect 0 0 160 224)
(rect 0 0 160 264)
(text "pll" (rect 74 -1 81 11)(font "Arial" (font_size 10)))
(text "inst" (rect 8 208 20 220)(font "Arial" ))
(text "inst" (rect 8 248 20 260)(font "Arial" ))
(port
(pt 0 72)
(input)
......
(port
(pt 160 192)
(output)
(text "locked" (rect 0 0 24 12)(font "Arial" (font_size 8)))
(text "locked" (rect 127 181 163 192)(font "Arial" (font_size 8)))
(text "outclk_3" (rect 0 0 33 12)(font "Arial" (font_size 8)))
(text "outclk_3" (rect 117 181 165 192)(font "Arial" (font_size 8)))
(line (pt 160 192)(pt 112 192)(line_width 1))
)
(port
(pt 160 232)
(output)
(text "locked" (rect 0 0 24 12)(font "Arial" (font_size 8)))
(text "locked" (rect 127 221 163 232)(font "Arial" (font_size 8)))
(line (pt 160 232)(pt 112 232)(line_width 1))
)
(drawing
(text "refclk" (rect 16 43 68 99)(font "Arial" (color 128 0 0)(font_size 9)))
(text "clk" (rect 53 67 124 144)(font "Arial" (color 0 0 0)))
......
(text "clk" (rect 97 107 212 224)(font "Arial" (color 0 0 0)))
(text "outclk2" (rect 113 123 268 259)(font "Arial" (color 128 0 0)(font_size 9)))
(text "clk" (rect 97 147 212 304)(font "Arial" (color 0 0 0)))
(text "locked" (rect 113 163 262 339)(font "Arial" (color 128 0 0)(font_size 9)))
(text "export" (rect 82 187 200 384)(font "Arial" (color 0 0 0)))
(text " altera_pll " (rect 118 208 308 426)(font "Arial" ))
(text "outclk3" (rect 113 163 268 339)(font "Arial" (color 128 0 0)(font_size 9)))
(text "clk" (rect 97 187 212 384)(font "Arial" (color 0 0 0)))
(text "locked" (rect 113 203 262 419)(font "Arial" (color 128 0 0)(font_size 9)))
(text "export" (rect 82 227 200 464)(font "Arial" (color 0 0 0)))
(text " altera_pll " (rect 118 248 308 506)(font "Arial" ))
(line (pt 48 32)(pt 112 32)(line_width 1))
(line (pt 112 32)(pt 112 208)(line_width 1))
(line (pt 48 208)(pt 112 208)(line_width 1))
(line (pt 48 32)(pt 48 208)(line_width 1))
(line (pt 112 32)(pt 112 248)(line_width 1))
(line (pt 48 248)(pt 112 248)(line_width 1))
(line (pt 48 32)(pt 48 248)(line_width 1))
(line (pt 49 52)(pt 49 76)(line_width 1))
(line (pt 50 52)(pt 50 76)(line_width 1))
(line (pt 49 92)(pt 49 116)(line_width 1))
......
(line (pt 110 132)(pt 110 156)(line_width 1))
(line (pt 111 172)(pt 111 196)(line_width 1))
(line (pt 110 172)(pt 110 196)(line_width 1))
(line (pt 111 212)(pt 111 236)(line_width 1))
(line (pt 110 212)(pt 110 236)(line_width 1))
(line (pt 0 0)(pt 160 0)(line_width 1))
(line (pt 160 0)(pt 160 224)(line_width 1))
(line (pt 0 224)(pt 160 224)(line_width 1))
(line (pt 0 0)(pt 0 224)(line_width 1))
(line (pt 160 0)(pt 160 264)(line_width 1))
(line (pt 0 264)(pt 160 264)(line_width 1))
(line (pt 0 0)(pt 0 264)(line_width 1))
)
)
eclaireXL/pll.cmp
outclk_0 : out std_logic; -- clk
outclk_1 : out std_logic; -- clk
outclk_2 : out std_logic; -- clk
outclk_3 : out std_logic; -- clk
locked : out std_logic -- export
);
end component pll;
eclaireXL/pll.ppf
<pin name="outclk_0" direction="output" scope="external" />
<pin name="outclk_1" direction="output" scope="external" />
<pin name="outclk_2" direction="output" scope="external" />
<pin name="outclk_3" direction="output" scope="external" />
<pin name="locked" direction="output" scope="external" />
</global>
</pinplan>
eclaireXL/pll.qip
set_global_assignment -entity "pll" -library "pll" -name IP_TOOL_NAME "altera_pll"
set_global_assignment -entity "pll" -library "pll" -name IP_TOOL_VERSION "14.0"
set_global_assignment -entity "pll" -library "pll" -name IP_TOOL_VERSION "15.0"
set_global_assignment -entity "pll" -library "pll" -name IP_TOOL_ENV "mwpim"
set_global_assignment -library "pll" -name MISC_FILE [file join $::quartus(qip_path) "pll.cmp"]
set_global_assignment -entity "pll" -library "pll" -name IP_TARGETED_DEVICE_FAMILY "Cyclone V"
......
set_global_assignment -entity "pll" -library "pll" -name IP_COMPONENT_REPORT_HIERARCHY "Off"
set_global_assignment -entity "pll" -library "pll" -name IP_COMPONENT_INTERNAL "Off"
set_global_assignment -entity "pll" -library "pll" -name IP_COMPONENT_AUTHOR "QWx0ZXJhIENvcnBvcmF0aW9u"
set_global_assignment -entity "pll" -library "pll" -name IP_COMPONENT_VERSION "MTQuMA=="
set_global_assignment -entity "pll" -library "pll" -name IP_COMPONENT_VERSION "MTUuMA=="
set_global_assignment -entity "pll" -library "pll" -name IP_COMPONENT_DESCRIPTION "QWx0ZXJhIFBoYXNlLUxvY2tlZCBMb29wIChBTFRFUkFfUExMKQ=="
set_global_assignment -entity "pll_0002" -library "pll" -name IP_COMPONENT_NAME "cGxsXzAwMDI="
set_global_assignment -entity "pll_0002" -library "pll" -name IP_COMPONENT_DISPLAY_NAME "QWx0ZXJhIFBMTA=="
set_global_assignment -entity "pll_0002" -library "pll" -name IP_COMPONENT_REPORT_HIERARCHY "Off"
set_global_assignment -entity "pll_0002" -library "pll" -name IP_COMPONENT_INTERNAL "Off"
set_global_assignment -entity "pll_0002" -library "pll" -name IP_COMPONENT_AUTHOR "QWx0ZXJhIENvcnBvcmF0aW9u"
set_global_assignment -entity "pll_0002" -library "pll" -name IP_COMPONENT_VERSION "MTQuMA=="
set_global_assignment -entity "pll_0002" -library "pll" -name IP_COMPONENT_VERSION "MTUuMA=="
set_global_assignment -entity "pll_0002" -library "pll" -name IP_COMPONENT_DESCRIPTION "QWx0ZXJhIFBoYXNlLUxvY2tlZCBMb29wIChBTFRFUkFfUExMKQ=="
set_global_assignment -entity "pll_0002" -library "pll" -name IP_COMPONENT_PARAMETER "ZGVidWdfcHJpbnRfb3V0cHV0::ZmFsc2U=::ZGVidWdfcHJpbnRfb3V0cHV0"
set_global_assignment -entity "pll_0002" -library "pll" -name IP_COMPONENT_PARAMETER "ZGVidWdfdXNlX3JiY190YWZfbWV0aG9k::ZmFsc2U=::ZGVidWdfdXNlX3JiY190YWZfbWV0aG9k"
set_global_assignment -entity "pll_0002" -library "pll" -name IP_COMPONENT_PARAMETER "ZGV2aWNl::VW5rbm93bg==::ZGV2aWNl"
set_global_assignment -entity "pll_0002" -library "pll" -name IP_COMPONENT_PARAMETER "Z3VpX2RldmljZV9zcGVlZF9ncmFkZQ==::OA==::RGV2aWNlIFNwZWVkIEdyYWRl"
set_global_assignment -entity "pll_0002" -library "pll" -name IP_COMPONENT_PARAMETER "Z3VpX2RldmljZV9zcGVlZF9ncmFkZQ==::Mg==::RGV2aWNlIFNwZWVkIEdyYWRl"
set_global_assignment -entity "pll_0002" -library "pll" -name IP_COMPONENT_PARAMETER "Z3VpX3BsbF9tb2Rl::SW50ZWdlci1OIFBMTA==::UExMIE1vZGU="
set_global_assignment -entity "pll_0002" -library "pll" -name IP_COMPONENT_PARAMETER "ZnJhY3Rpb25hbF92Y29fbXVsdGlwbGllcg==::ZmFsc2U=::ZnJhY3Rpb25hbF92Y29fbXVsdGlwbGllcg=="
set_global_assignment -entity "pll_0002" -library "pll" -name IP_COMPONENT_PARAMETER "Z3VpX3JlZmVyZW5jZV9jbG9ja19mcmVxdWVuY3k=::NS4w::UmVmZXJlbmNlIENsb2NrIEZyZXF1ZW5jeQ=="
......
set_global_assignment -entity "pll_0002" -library "pll" -name IP_COMPONENT_PARAMETER "b3BlcmF0aW9uX21vZGU=::bm9ybWFs::b3BlcmF0aW9uX21vZGU="
set_global_assignment -entity "pll_0002" -library "pll" -name IP_COMPONENT_PARAMETER "Z3VpX3VzZV9sb2NrZWQ=::dHJ1ZQ==::RW5hYmxlIGxvY2tlZCBvdXRwdXQgcG9ydA=="
set_global_assignment -entity "pll_0002" -library "pll" -name IP_COMPONENT_PARAMETER "Z3VpX2VuX2Fkdl9wYXJhbXM=::ZmFsc2U=::RW5hYmxlIHBoeXNpY2FsIG91dHB1dCBjbG9jayBwYXJhbWV0ZXJz"
set_global_assignment -entity "pll_0002" -library "pll" -name IP_COMPONENT_PARAMETER "Z3VpX251bWJlcl9vZl9jbG9ja3M=::Mw==::TnVtYmVyIE9mIENsb2Nrcw=="
set_global_assignment -entity "pll_0002" -library "pll" -name IP_COMPONENT_PARAMETER "bnVtYmVyX29mX2Nsb2Nrcw==::Mw==::bnVtYmVyX29mX2Nsb2Nrcw=="
set_global_assignment -entity "pll_0002" -library "pll" -name IP_COMPONENT_PARAMETER "Z3VpX251bWJlcl9vZl9jbG9ja3M=::NA==::TnVtYmVyIE9mIENsb2Nrcw=="
set_global_assignment -entity "pll_0002" -library "pll" -name IP_COMPONENT_PARAMETER "bnVtYmVyX29mX2Nsb2Nrcw==::NA==::bnVtYmVyX29mX2Nsb2Nrcw=="
set_global_assignment -entity "pll_0002" -library "pll" -name IP_COMPONENT_PARAMETER "Z3VpX211bHRpcGx5X2ZhY3Rvcg==::MQ==::TXVsdGlwbHkgRmFjdG9yIChNLUNvdW50ZXIp"
set_global_assignment -entity "pll_0002" -library "pll" -name IP_COMPONENT_PARAMETER "Z3VpX2ZyYWNfbXVsdGlwbHlfZmFjdG9y::MQ==::RnJhY3Rpb25hbCBNdWx0aXBseSBGYWN0b3IgKEsp"
set_global_assignment -entity "pll_0002" -library "pll" -name IP_COMPONENT_PARAMETER "Z3VpX2RpdmlkZV9mYWN0b3Jfbg==::MQ==::RGl2aWRlIEZhY3RvciAoTi1Db3VudGVyKQ=="
......
set_global_assignment -entity "pll_0002" -library "pll" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdDI=::MA==::QWN0dWFsIFBoYXNlIFNoaWZ0"
set_global_assignment -entity "pll_0002" -library "pll" -name IP_COMPONENT_PARAMETER "Z3VpX2R1dHlfY3ljbGUy::NTA=::RHV0eSBDeWNsZQ=="
set_global_assignment -entity "pll_0002" -library "pll" -name IP_COMPONENT_PARAMETER "Z3VpX2Nhc2NhZGVfY291bnRlcjM=::ZmFsc2U=::TWFrZSB0aGlzIGEgY2FzY2FkZSBjb3VudGVy"
set_global_assignment -entity "pll_0002" -library "pll" -name IP_COMPONENT_PARAMETER "Z3VpX291dHB1dF9jbG9ja19mcmVxdWVuY3kz::MTAwLjA=::RGVzaXJlZCBGcmVxdWVuY3k="
set_global_assignment -entity "pll_0002" -library "pll" -name IP_COMPONENT_PARAMETER "Z3VpX291dHB1dF9jbG9ja19mcmVxdWVuY3kz::MjguMzc1::RGVzaXJlZCBGcmVxdWVuY3k="
set_global_assignment -entity "pll_0002" -library "pll" -name IP_COMPONENT_PARAMETER "Z3VpX2RpdmlkZV9mYWN0b3JfYzM=::MQ==::RGl2aWRlIEZhY3RvciAoQy1Db3VudGVyKQ=="
set_global_assignment -entity "pll_0002" -library "pll" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9tdWx0aXBseV9mYWN0b3Iz::MQ==::QWN0dWFsIE11bHRpcGx5IEZhY3Rvcg=="
set_global_assignment -entity "pll_0002" -library "pll" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9tdWx0aXBseV9mYWN0b3Iz::MjI3::QWN0dWFsIE11bHRpcGx5IEZhY3Rvcg=="
set_global_assignment -entity "pll_0002" -library "pll" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9mcmFjX211bHRpcGx5X2ZhY3RvcjM=::MQ==::QWN0dWFsIEZyYWN0aW9uYWwgTXVsdGlwbHkgRmFjdG9yIChLKQ=="
set_global_assignment -entity "pll_0002" -library "pll" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9kaXZpZGVfZmFjdG9yMw==::MQ==::QWN0dWFsIERpdmlkZSBGYWN0b3I="
set_global_assignment -entity "pll_0002" -library "pll" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9kaXZpZGVfZmFjdG9yMw==::NDA=::QWN0dWFsIERpdmlkZSBGYWN0b3I="
set_global_assignment -entity "pll_0002" -library "pll" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9vdXRwdXRfY2xvY2tfZnJlcXVlbmN5Mw==::MCBNSHo=::QWN0dWFsIEZyZXF1ZW5jeQ=="
set_global_assignment -entity "pll_0002" -library "pll" -name IP_COMPONENT_PARAMETER "Z3VpX3BzX3VuaXRzMw==::cHM=::UGhhc2UgU2hpZnQgdW5pdHM="
set_global_assignment -entity "pll_0002" -library "pll" -name IP_COMPONENT_PARAMETER "Z3VpX3BoYXNlX3NoaWZ0Mw==::MA==::UGhhc2UgU2hpZnQ="
......
set_global_assignment -entity "pll_0002" -library "pll" -name IP_COMPONENT_PARAMETER "b3V0cHV0X2Nsb2NrX2ZyZXF1ZW5jeTI=::MTEzLjUwMDAwMCBNSHo=::b3V0cHV0X2Nsb2NrX2ZyZXF1ZW5jeTI="
set_global_assignment -entity "pll_0002" -library "pll" -name IP_COMPONENT_PARAMETER "cGhhc2Vfc2hpZnQy::NDQwNSBwcw==::cGhhc2Vfc2hpZnQy"
set_global_assignment -entity "pll_0002" -library "pll" -name IP_COMPONENT_PARAMETER "ZHV0eV9jeWNsZTI=::NTA=::ZHV0eV9jeWNsZTI="
set_global_assignment -entity "pll_0002" -library "pll" -name IP_COMPONENT_PARAMETER "b3V0cHV0X2Nsb2NrX2ZyZXF1ZW5jeTM=::MCBNSHo=::b3V0cHV0X2Nsb2NrX2ZyZXF1ZW5jeTM="
set_global_assignment -entity "pll_0002" -library "pll" -name IP_COMPONENT_PARAMETER "b3V0cHV0X2Nsb2NrX2ZyZXF1ZW5jeTM=::MjguMzc1MDAwIE1Ieg==::b3V0cHV0X2Nsb2NrX2ZyZXF1ZW5jeTM="
set_global_assignment -entity "pll_0002" -library "pll" -name IP_COMPONENT_PARAMETER "cGhhc2Vfc2hpZnQz::MCBwcw==::cGhhc2Vfc2hpZnQz"
set_global_assignment -entity "pll_0002" -library "pll" -name IP_COMPONENT_PARAMETER "ZHV0eV9jeWNsZTM=::NTA=::ZHV0eV9jeWNsZTM="
set_global_assignment -entity "pll_0002" -library "pll" -name IP_COMPONENT_PARAMETER "b3V0cHV0X2Nsb2NrX2ZyZXF1ZW5jeTQ=::MCBNSHo=::b3V0cHV0X2Nsb2NrX2ZyZXF1ZW5jeTQ="
......
set_global_assignment -entity "pll_0002" -library "pll" -name IP_COMPONENT_PARAMETER "Z3VpX2VuX3Bob3V0X3BvcnRz::ZmFsc2U=::RW5hYmxlIGFjY2VzcyB0byBQTEwgRFBBIG91dHB1dCBwb3J0"
set_global_assignment -entity "pll_0002" -library "pll" -name IP_COMPONENT_PARAMETER "cGxsX3R5cGU=::R2VuZXJhbA==::UExMIFRZUEU="
set_global_assignment -entity "pll_0002" -library "pll" -name IP_COMPONENT_PARAMETER "cGxsX3N1YnR5cGU=::R2VuZXJhbA==::UExMIFNVQlRZUEU="
set_global_assignment -entity "pll_0002" -library "pll" -name IP_COMPONENT_PARAMETER "Z3VpX3BhcmFtZXRlcl9saXN0::TS1Db3VudGVyIEhpIERpdmlkZSxNLUNvdW50ZXIgTG93IERpdmlkZSxOLUNvdW50ZXIgSGkgRGl2aWRlLE4tQ291bnRlciBMb3cgRGl2aWRlLE0tQ291bnRlciBCeXBhc3MgRW5hYmxlLE4tQ291bnRlciBCeXBhc3MgRW5hYmxlLE0tQ291bnRlciBPZGQgRGl2aWRlIEVuYWJsZSxOLUNvdW50ZXIgT2RkIERpdmlkZSBFbmFibGUsQy1Db3VudGVyLTAgSGkgRGl2aWRlLEMtQ291bnRlci0wIExvdyBEaXZpZGUsQy1Db3VudGVyLTAgQ29hcnNlIFBoYXNlIFNoaWZ0LEMtQ291bnRlci0wIFZDTyBQaGFzZSBUYXAsQy1Db3VudGVyLTAgSW5wdXQgU291cmNlLEMtQ291bnRlci0wIEJ5cGFzcyBFbmFibGUsQy1Db3VudGVyLTAgT2RkIERpdmlkZSBFbmFibGUsQy1Db3VudGVyLTEgSGkgRGl2aWRlLEMtQ291bnRlci0xIExvdyBEaXZpZGUsQy1Db3VudGVyLTEgQ29hcnNlIFBoYXNlIFNoaWZ0LEMtQ291bnRlci0xIFZDTyBQaGFzZSBUYXAsQy1Db3VudGVyLTEgSW5wdXQgU291cmNlLEMtQ291bnRlci0xIEJ5cGFzcyBFbmFibGUsQy1Db3VudGVyLTEgT2RkIERpdmlkZSBFbmFibGUsQy1Db3VudGVyLTIgSGkgRGl2aWRlLEMtQ291bnRlci0yIExvdyBEaXZpZGUsQy1Db3VudGVyLTIgQ29hcnNlIFBoYXNlIFNoaWZ0LEMtQ291bnRlci0yIFZDTyBQaGFzZSBUYXAsQy1Db3VudGVyLTIgSW5wdXQgU291cmNlLEMtQ291bnRlci0yIEJ5cGFzcyBFbmFibGUsQy1Db3VudGVyLTIgT2RkIERpdmlkZSBFbmFibGUsVkNPIFBvc3QgRGl2aWRlIENvdW50ZXIgRW5hYmxlLENoYXJnZSBQdW1wIGN1cnJlbnQgKHVBKSxMb29wIEZpbHRlciBCYW5kd2lkdGggUmVzaXN0b3IgKE9obXMpICxQTEwgT3V0cHV0IFZDTyBGcmVxdWVuY3ksSy1GcmFjdGlvbmFsIERpdmlzaW9uIFZhbHVlIChEU00pLEZlZWRiYWNrIENsb2NrIFR5cGUsRmVlZGJhY2sgQ2xvY2sgTVVYIDEsRmVlZGJhY2sgQ2xvY2sgTVVYIDIsTSBDb3VudGVyIFNvdXJjZSBNVVgsUExMIEF1dG8gUmVzZXQ=::UGFyYW1ldGVyIE5hbWVz"
set_global_assignment -entity "pll_0002" -library "pll" -name IP_COMPONENT_PARAMETER "Z3VpX3BhcmFtZXRlcl92YWx1ZXM=::MTE0LDExMywyNTYsMjU2LGZhbHNlLHRydWUsdHJ1ZSxmYWxzZSw1LDUsMSwwLHBoX211eF9jbGssZmFsc2UsZmFsc2UsMTAsMTAsMSwwLHBoX211eF9jbGssZmFsc2UsZmFsc2UsNSw1LDYsMCxwaF9tdXhfY2xrLGZhbHNlLGZhbHNlLDEsMjAsMTQwMDAsMTEzNS4wIE1IeiwxLGdjbGssZ2xiLGZiXzEscGhfbXV4X2Nsayx0cnVl::UGFyYW1ldGVyIFZhbHVlcw=="
set_global_assignment -entity "pll_0002" -library "pll" -name IP_COMPONENT_PARAMETER "Z3VpX3BhcmFtZXRlcl9saXN0::TS1Db3VudGVyIEhpIERpdmlkZSxNLUNvdW50ZXIgTG93IERpdmlkZSxOLUNvdW50ZXIgSGkgRGl2aWRlLE4tQ291bnRlciBMb3cgRGl2aWRlLE0tQ291bnRlciBCeXBhc3MgRW5hYmxlLE4tQ291bnRlciBCeXBhc3MgRW5hYmxlLE0tQ291bnRlciBPZGQgRGl2aWRlIEVuYWJsZSxOLUNvdW50ZXIgT2RkIERpdmlkZSBFbmFibGUsQy1Db3VudGVyLTAgSGkgRGl2aWRlLEMtQ291bnRlci0wIExvdyBEaXZpZGUsQy1Db3VudGVyLTAgQ29hcnNlIFBoYXNlIFNoaWZ0LEMtQ291bnRlci0wIFZDTyBQaGFzZSBUYXAsQy1Db3VudGVyLTAgSW5wdXQgU291cmNlLEMtQ291bnRlci0wIEJ5cGFzcyBFbmFibGUsQy1Db3VudGVyLTAgT2RkIERpdmlkZSBFbmFibGUsQy1Db3VudGVyLTEgSGkgRGl2aWRlLEMtQ291bnRlci0xIExvdyBEaXZpZGUsQy1Db3VudGVyLTEgQ29hcnNlIFBoYXNlIFNoaWZ0LEMtQ291bnRlci0xIFZDTyBQaGFzZSBUYXAsQy1Db3VudGVyLTEgSW5wdXQgU291cmNlLEMtQ291bnRlci0xIEJ5cGFzcyBFbmFibGUsQy1Db3VudGVyLTEgT2RkIERpdmlkZSBFbmFibGUsQy1Db3VudGVyLTIgSGkgRGl2aWRlLEMtQ291bnRlci0yIExvdyBEaXZpZGUsQy1Db3VudGVyLTIgQ29hcnNlIFBoYXNlIFNoaWZ0LEMtQ291bnRlci0yIFZDTyBQaGFzZSBUYXAsQy1Db3VudGVyLTIgSW5wdXQgU291cmNlLEMtQ291bnRlci0yIEJ5cGFzcyBFbmFibGUsQy1Db3VudGVyLTIgT2RkIERpdmlkZSBFbmFibGUsQy1Db3VudGVyLTMgSGkgRGl2aWRlLEMtQ291bnRlci0zIExvdyBEaXZpZGUsQy1Db3VudGVyLTMgQ29hcnNlIFBoYXNlIFNoaWZ0LEMtQ291bnRlci0zIFZDTyBQaGFzZSBUYXAsQy1Db3VudGVyLTMgSW5wdXQgU291cmNlLEMtQ291bnRlci0zIEJ5cGFzcyBFbmFibGUsQy1Db3VudGVyLTMgT2RkIERpdmlkZSBFbmFibGUsVkNPIFBvc3QgRGl2aWRlIENvdW50ZXIgRW5hYmxlLENoYXJnZSBQdW1wIGN1cnJlbnQgKHVBKSxMb29wIEZpbHRlciBCYW5kd2lkdGggUmVzaXN0b3IgKE9obXMpICxQTEwgT3V0cHV0IFZDTyBGcmVxdWVuY3ksSy1GcmFjdGlvbmFsIERpdmlzaW9uIFZhbHVlIChEU00pLEZlZWRiYWNrIENsb2NrIFR5cGUsRmVlZGJhY2sgQ2xvY2sgTVVYIDEsRmVlZGJhY2sgQ2xvY2sgTVVYIDIsTSBDb3VudGVyIFNvdXJjZSBNVVgsUExMIEF1dG8gUmVzZXQ=::UGFyYW1ldGVyIE5hbWVz"
set_global_assignment -entity "pll_0002" -library "pll" -name IP_COMPONENT_PARAMETER "Z3VpX3BhcmFtZXRlcl92YWx1ZXM=::MTE0LDExMywyNTYsMjU2LGZhbHNlLHRydWUsdHJ1ZSxmYWxzZSw1LDUsMSwwLHBoX211eF9jbGssZmFsc2UsZmFsc2UsMTAsMTAsMSwwLHBoX211eF9jbGssZmFsc2UsZmFsc2UsNSw1LDYsMCxwaF9tdXhfY2xrLGZhbHNlLGZhbHNlLDIwLDIwLDEsMCxwaF9tdXhfY2xrLGZhbHNlLGZhbHNlLDEsMjAsMTQwMDAsMTEzNS4wIE1IeiwxLGdjbGssZ2xiLGZiXzEscGhfbXV4X2Nsayx0cnVl::UGFyYW1ldGVyIFZhbHVlcw=="
set_global_assignment -entity "pll_0002" -library "pll" -name IP_COMPONENT_PARAMETER "Z3VpX21pZl9nZW5lcmF0ZQ==::ZmFsc2U=::R2VuZXJhdGUgTUlGIGZpbGU="
set_global_assignment -entity "pll_0002" -library "pll" -name IP_COMPONENT_PARAMETER "Z3VpX2VuYWJsZV9taWZfZHBz::ZmFsc2U=::RW5hYmxlIER5bmFtaWMgUGhhc2UgU2hpZnQgZm9yIE1JRiBzdHJlYW1pbmc="
set_global_assignment -entity "pll_0002" -library "pll" -name IP_COMPONENT_PARAMETER "Z3VpX2Rwc19jbnRy::QzA=::RFBTIENvdW50ZXIgU2VsZWN0aW9u"
......
set_global_assignment -entity "pll_0002" -library "pll" -name IP_COMPONENT_PARAMETER "Z3VpX3JlZmNsa19zd2l0Y2g=::ZmFsc2U=::Q3JlYXRlIGEgc2Vjb25kIGlucHV0IGNsayAncmVmY2xrMSc="
set_global_assignment -entity "pll_0002" -library "pll" -name IP_COMPONENT_PARAMETER "Z3VpX2VuYWJsZV9jYXNjYWRlX291dA==::ZmFsc2U=::Q3JlYXRlIGEgJ2Nhc2NhZGVfb3V0JyBzaWduYWwgdG8gY29ubmVjdCB3aXRoIGEgZG93bnN0cmVhbSBQTEw="
set_global_assignment -entity "pll_0002" -library "pll" -name IP_COMPONENT_PARAMETER "Z3VpX2VuYWJsZV9jYXNjYWRlX2lu::ZmFsc2U=::Q3JlYXRlIGFuIGFkanBsbGluIG9yIGNjbGsgc2lnbmFsIHRvIGNvbm5lY3Qgd2l0aCBhbiB1cHN0cmVhbSBQTEw="
set_global_assignment -entity "pll_0002" -library "pll" -name IP_COMPONENT_PARAMETER "QVVUT19SRUZDTEtfQ0xPQ0tfUkFURQ==::LTE=::QXV0byBDTE9DS19SQVRF"
set_global_assignment -library "pll" -name VHDL_FILE [file join $::quartus(qip_path) "pll.vhd"]
set_global_assignment -library "pll" -name VERILOG_FILE [file join $::quartus(qip_path) "pll/pll_0002.v"]
set_global_assignment -library "pll" -name QIP_FILE [file join $::quartus(qip_path) "pll/pll_0002.qip"]
set_global_assignment -entity "pll_0002" -library "pll" -name IP_TOOL_NAME "altera_pll"
set_global_assignment -entity "pll_0002" -library "pll" -name IP_TOOL_VERSION "14.0"
set_global_assignment -entity "pll_0002" -library "pll" -name IP_TOOL_VERSION "15.0"
set_global_assignment -entity "pll_0002" -library "pll" -name IP_TOOL_ENV "mwpim"
eclaireXL/pll.sip
set_global_assignment -entity "pll" -library "lib_pll" -name IP_TOOL_NAME "altera_pll"
set_global_assignment -entity "pll" -library "lib_pll" -name IP_TOOL_VERSION "14.0"
set_global_assignment -entity "pll" -library "lib_pll" -name IP_TOOL_VERSION "15.0"
set_global_assignment -entity "pll" -library "lib_pll" -name IP_TOOL_ENV "mwpim"
set_global_assignment -library "lib_pll" -name SPD_FILE [file join $::quartus(sip_path) "pll.spd"]
eclaireXL/pll.vhd
-- megafunction wizard: %Altera PLL v14.0%
-- megafunction wizard: %Altera PLL v15.0%
-- GENERATION: XML
-- pll.vhd
-- Generated using ACDS version 14.0 200 at 2015.07.12.07:17:31
-- Generated using ACDS version 15.0 145
library IEEE;
use IEEE.std_logic_1164.all;
......
outclk_0 : out std_logic; -- outclk0.clk
outclk_1 : out std_logic; -- outclk1.clk
outclk_2 : out std_logic; -- outclk2.clk
outclk_3 : out std_logic; -- outclk3.clk
locked : out std_logic -- locked.export
);
end entity pll;
......
outclk_0 : out std_logic; -- clk
outclk_1 : out std_logic; -- clk
outclk_2 : out std_logic; -- clk
outclk_3 : out std_logic; -- clk
locked : out std_logic -- export
);
end component pll_0002;
......
outclk_0 => outclk_0, -- outclk0.clk
outclk_1 => outclk_1, -- outclk1.clk
outclk_2 => outclk_2, -- outclk2.clk
outclk_3 => outclk_3, -- outclk3.clk
locked => locked -- locked.export
);
......
-- their respective licensors. No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.
---->
-- Retrieval info: <instance entity-name="altera_pll" version="14.0" >
-- Retrieval info: <instance entity-name="altera_pll" version="15.0" >
-- Retrieval info: <generic name="debug_print_output" value="false" />
-- Retrieval info: <generic name="debug_use_rbc_taf_method" value="false" />
-- Retrieval info: <generic name="device_family" value="Cyclone V" />
-- Retrieval info: <generic name="device" value="Unknown" />
-- Retrieval info: <generic name="gui_device_speed_grade" value="8" />
-- Retrieval info: <generic name="gui_device_speed_grade" value="2" />
-- Retrieval info: <generic name="gui_pll_mode" value="Integer-N PLL" />
-- Retrieval info: <generic name="gui_reference_clock_frequency" value="5.0" />
-- Retrieval info: <generic name="gui_channel_spacing" value="0.0" />
......
-- Retrieval info: <generic name="gui_dsm_out_sel" value="1st_order" />
-- Retrieval info: <generic name="gui_use_locked" value="true" />
-- Retrieval info: <generic name="gui_en_adv_params" value="false" />
-- Retrieval info: <generic name="gui_number_of_clocks" value="3" />
-- Retrieval info: <generic name="gui_number_of_clocks" value="4" />
-- Retrieval info: <generic name="gui_multiply_factor" value="1" />
-- Retrieval info: <generic name="gui_frac_multiply_factor" value="1" />
-- Retrieval info: <generic name="gui_divide_factor_n" value="1" />
......
-- Retrieval info: <generic name="gui_actual_phase_shift2" value="0" />
-- Retrieval info: <generic name="gui_duty_cycle2" value="50" />
-- Retrieval info: <generic name="gui_cascade_counter3" value="false" />
-- Retrieval info: <generic name="gui_output_clock_frequency3" value="100.0" />
-- Retrieval info: <generic name="gui_output_clock_frequency3" value="28.375" />
-- Retrieval info: <generic name="gui_divide_factor_c3" value="1" />
-- Retrieval info: <generic name="gui_actual_output_clock_frequency3" value="0 MHz" />
-- Retrieval info: <generic name="gui_ps_units3" value="ps" />
......
-- Retrieval info: <generic name="gui_en_dps_ports" value="false" />
-- Retrieval info: <generic name="gui_en_phout_ports" value="false" />
-- Retrieval info: <generic name="gui_phout_division" value="1" />
-- Retrieval info: <generic name="gui_en_lvds_ports" value="false" />
-- Retrieval info: <generic name="gui_mif_generate" value="false" />
-- Retrieval info: <generic name="gui_enable_mif_dps" value="false" />
-- Retrieval info: <generic name="gui_dps_cntr" value="C0" />
......
-- Retrieval info: <generic name="gui_cascade_outclk_index" value="0" />
-- Retrieval info: <generic name="gui_enable_cascade_in" value="false" />
-- Retrieval info: <generic name="gui_pll_cascading_mode" value="Create an adjpllin signal to connect with an upstream PLL" />
-- Retrieval info: <generic name="AUTO_REFCLK_CLOCK_RATE" value="-1" />
-- Retrieval info: </instance>
-- IPFS_FILES : pll.vho
-- RELATED_FILES: pll.vhd, pll_0002.v

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