repo2/eclaireXL/gpiov3.vhd @ 405
| 398 | markw | ---------------------------------------------------------------------------
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-- (c) 2013 mark watson
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-- I am happy for anyone to use this for non-commercial use.
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-- If my vhdl files are used commercially or otherwise sold,
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-- please contact me for explicit permission at scrameta (gmail).
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-- This applies for source and binary form and derived works.
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---------------------------------------------------------------------------
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LIBRARY ieee;
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USE ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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entity gpiov3 is
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generic
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(
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cartridge_cycle_length : in integer := 32
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);
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port
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(
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clk : in std_logic;
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reset_n : in std_logic;
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gpio_enable : in std_logic;
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-- pia
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porta_in : out std_logic_vector(7 downto 0);
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porta_out : in std_logic_vector(7 downto 0);
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porta_output : in std_logic_vector(7 downto 0);
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CA1_IN : OUT STD_LOGIC;
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CA2_DIR_OUT : IN std_logic;
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CA2_OUT : IN std_logic;
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CA2_IN : OUT STD_LOGIC;
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CB1_IN : OUT STD_LOGIC;
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CB2_DIR_OUT : IN std_logic;
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CB2_OUT : IN std_logic;
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CB2_IN : OUT STD_LOGIC;
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-- gtia
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trig_in : out std_logic_vector(3 downto 0);
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-- antic
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lightpen : out std_logic;
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-- pokey
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pot_reset : in std_logic;
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pot_in : out std_logic_vector(7 downto 0);
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keyboard_scan : in std_logic_vector(5 downto 0);
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keyboard_response : out std_logic_vector(1 downto 0);
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SIO_IN : OUT STD_LOGIC;
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SIO_OUT : IN STD_LOGIC;
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SIO_CLOCKIN : OUT STD_LOGIC;
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SIO_CLOCKOUT : IN STD_LOGIC;
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-- cartridge
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enable_179_early : in std_logic;
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pbi_addr_out : in std_logic_vector(15 downto 0);
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pbi_write_enable : in std_logic;
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cart_data_read : out std_logic_vector(7 downto 0);
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cart_request : in std_logic;
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cart_complete : out std_logic;
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cart_data_write : in std_logic_vector(7 downto 0);
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rd4 : out std_logic;
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rd5 : out std_logic;
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s4_n : in std_logic;
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s5_n : in std_logic;
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cctl_n : in std_logic;
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-- gpio connections
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GPIO_0_IN : in std_logic_vector(35 downto 0);
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GPIO_0_OUT : out std_logic_vector(35 downto 0);
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GPIO_0_DIR_OUT : out std_logic_vector(35 downto 0);
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GPIO_1_IN : in std_logic_vector(35 downto 0);
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GPIO_1_OUT : out std_logic_vector(35 downto 0);
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GPIO_1_DIR_OUT : out std_logic_vector(35 downto 0)
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);
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end gpiov3;
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architecture vhdl of gpiov3 is
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signal shift_next : std_logic_vector(71 downto 0);
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signal shift_reg : std_logic_vector(71 downto 0);
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begin
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CA2_in <= '1';
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CB2_in <= '1';
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SIO_IN <= '1';
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pot_in <= (others=>'0');
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porta_in <= (others=>'1');
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| 400 | markw | trig_in <= "0111";
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| 398 | markw | ||
lightpen <= '1';
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-- keyboard
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| 400 | markw | keyboard_response <= (others=>'1');
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| 398 | markw | ||
| 400 | markw | cart_data_read <= (others=>'1');
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cart_complete <= '1';
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| 398 | markw | ||
rd4 <= '0';
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rd5 <= '0';
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process(clk,reset_n)
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begin
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| 400 | markw | if (reset_n='0') then
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| 398 | markw | shift_reg(71 downto 1) <= (others=>'0');
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shift_reg(0) <= '1';
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elsif (clk'event and clk='1') then
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shift_reg <= shift_next;
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| 400 | markw | end if;
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| 398 | markw | end process;
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process(shift_reg,enable_179_early)
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begin
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shift_next <= shift_reg;
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if (enable_179_early = '1') then
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shift_next(71 downto 1) <= shift_reg(70 downto 0);
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shift_next(0) <= shift_reg(71);
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end if;
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end process;
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GPIO_0_OUT <= shift_reg(71 downto 36);
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| 400 | markw | --GPIO_0_DIR_OUT <= shift_reg(71 downto 36);
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| 398 | markw | GPIO_0_DIR_OUT <= (others=>'1');
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GPIO_1_OUT <= shift_reg(35 downto 0);
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| 400 | markw | --GPIO_1_DIR_OUT <= shift_reg(35 downto 0);
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| 398 | markw | GPIO_1_DIR_OUT <= (others=>'1');
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end vhdl;
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