EclaireXL

/*

WARNING: Do NOT edit the input and output ports in this file in a text

editor if you plan to continue editing the block that represents it in

the Block Editor! File corruption is VERY likely to occur.

*/

/*

Copyright (C) 1991-2013 Altera Corporation

Your use of Altera Corporation's design tools, logic functions

and other software and tools, and its AMPP partner logic

functions, and any output files from any of the foregoing

(including device programming or simulation files), and any

associated documentation or information are expressly subject

to the terms and conditions of the Altera Program License

Subscription Agreement, Altera MegaCore Function License

Agreement, or other applicable license agreement, including,

without limitation, that your use is for the sole purpose of

programming logic devices manufactured by Altera and sold by

Altera or its authorized distributors. Please refer to the

applicable agreement for further details.

*/

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(rect 0 0 216 152)

(text "pll" (rect 102 0 116 11)(font "Arial" (font_size 10)))

(text "inst" (rect 8 141 22 148)(font "Arial" ))

(port

(pt 0 64)

(input)

(text "inclk0" (rect 0 0 22 9)(font "Arial" (font_size 8)))

(text "inclk0" (rect 4 55 21 63)(font "Arial" (font_size 8)))

(line (pt 0 64)(pt 40 64))

)

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(output)

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(text "locked" (rect 191 103 211 111)(font "Arial" (font_size 8)))

)

(drawing

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(text "inclk0 frequency: 5.000 MHz" (rect 50 63 187 132)(font "Arial" ))

(text "Operation Mode: Normal" (rect 50 71 175 148)(font "Arial" ))

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)