Revision 349
Added by markw over 10 years ago
common/a8core/antic.vhdl | ||
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--when '1'&X"05" => (changed for testing galaxian!)
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-- vblank_next <= '1';
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-- PAL
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when '1'&X"13" =>
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vsync_next <= pal;
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when '1'&X"16" =>
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vsync_next <= pal;
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when '1'&X"19" =>
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vsync_next <= '0';
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when '1'&X"38" =>
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vcount_reset <= '1'; -- Blip at 9c..., then wrap
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-- NTSC
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when '0'&X"FA" =>
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when '0'&X"FF" =>
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vsync_next <= not(pal);
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when '0'&X"FD" =>
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when '1'&X"02" =>
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vsync_next <= '0';
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when '1'&X"06" =>
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vcount_reset <= not(pal); -- Blip at 9c..., then wrap
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... | ... | |
end if;
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end process;
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process(colour_clock_selected, an_current, an_reg, an_prev_reg, hscrol_reg, hscrol_enabled_reg, vsync_reg, vblank_reg, hblank_reg, playfield_display_active_reg, instruction_blank_reg, twopixel_reg)
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process(colour_clock_selected, an_current, an_reg, an_prev_reg, hscrol_reg, hscrol_enabled_reg, vsync_reg, vblank_reg, hblank_reg, playfield_display_active_reg, instruction_blank_reg, twopixel_reg, dmactl_delayed_reg)
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begin
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an_next <= an_reg;
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... | ... | |
if (vblank_reg = '1' or hblank_reg = '1') then
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an_next(0) <= vsync_reg or twopixel_reg;
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an_next(1) <= not(vsync_reg);
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an_next(2) <= not(hblank_reg) and twopixel_reg;
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--an_next <=
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--(twopixel_reg and not(vsync_reg or hblank_reg))
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--&((hblank_reg or vblank_reg) and not(vsync_reg))
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--&(vsync_reg or twopixel_reg);
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an_next(2) <= not(hblank_reg) and twopixel_reg and (dmactl_delayed_reg(1) or dmactl_delayed_reg(0));
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end if;
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-- if (hblank_reg = '1') then
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-- an_next(0)<=twopixel_reg;
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-- an_next(1)<='1';
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-- an_next(2)<='0';
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-- end if;
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--
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-- if(vblank_reg = '1' and hblank_reg = '0') then
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-- an_next(0)<=twopixel_reg;
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-- an_next(1)<='1';
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-- an_next(2)<=twopixel_reg and (dmactl_delayed_reg(1) or dmactl_delayed_reg(0)); --playfield_display_active_reg?
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-- end if;
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--
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-- if(vsync_reg='1') then
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-- an_next(0)<='1';
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-- an_next(1)<='0';
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-- end if;
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-- TODO this is too simplistic:
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-- Antic should provide GTIA with the 'visible region using code 002 for vblank and hblank
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Also available in: Unified diff
Fix 480i interlace. Vsync needs to be on exactly the right row, also the AN2 must be disabled by clearing bits 0 or 1 on dmactl.