repo2/aeon_lite/build.sh @ 346
| 149 | markw | #!/bin/bash
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name=Aeon
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args=$@
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shift
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. /home/markw/fpga/xilinx/14.7/ISE_DS/settings64.sh
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mkdir -p build
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pushd build
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# copy source files
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cp -p ../pll/* .
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cp -p ../../common/a8core/*.vhd .
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cp -p ../../common/a8core/*.vhdl .
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cp -p ../../common/components/*.vhd .
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cp -p ../../common/components/*.vhdl .
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cp -p ../../common/zpu/*.vhd .
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cp -p ../../common/zpu/*.vhdl .
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| 322 | markw | #rm -f delay_line.vhdl
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cp -p ../*.vhd .
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cp -p ../*.vhdl .
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cp -p ../*.xst .
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| 149 | markw | ||
cp -p ../$name.ucf .
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cp -p ../$name.ut .
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cp -p ../$name.scr .
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cp -p ../$name.prj .
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| 322 | markw | mkdir -p xst/projnav.tmp/
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| 149 | markw | ||
| 322 | markw | echo "Starting Synthesis"
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xst -intstyle ise -ifn $name.xst -ofn $name.syr
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| 149 | markw | ||
| 322 | markw | echo "Starting NGD"
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| 329 | markw | ngdbuild -intstyle ise -uc $name.ucf -dd _ngo -nt timestamp -p xc6slx9-tqg144-3 $name.ngc $name.ngd
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| 149 | markw | ||
echo "Starting Map..."
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| 322 | markw | map -intstyle ise -p xc6slx9-tqg144-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -detail -ir off -pr off -lc off -power off -o $name_map.ncd $name.ngd $name.pcf
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| 149 | markw | ||
echo "Starting Place & Route..."
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| 322 | markw | par -w -intstyle ise -ol high -mt off $name_map.ncd $name.ncd $name.pcf
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| 149 | markw | ||
echo "Starting Timing Analysis..."
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| 322 | markw | trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml $name.twx $name.ncd -o $name.twr $name.pcf
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| 149 | markw | ||
echo "Starting Bitgen..."
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| 322 | markw | bitgen -intstyle ise -f $name.ut $name.ncd
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| 149 | markw | ||
popd
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