Revision 332
Added by markw over 10 years ago
| common/components/scandoubler.vhdl | ||
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signal vga_odd_reg : std_logic;
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signal vga_odd_next : std_logic;
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signal reset_output_address : std_logic;
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begin
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-- register
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| ... | ... | |
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linea_write_enable <= '0';
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lineb_write_enable <= '0';
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reset_output_address <= '0';
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if (colour_enable = '1') then
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input_address_next <= std_logic_vector(unsigned(input_address_reg)+1);
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| ... | ... | |
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end if;
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if (hsync_in = '1' and hsync_in_reg = '0') then
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input_address_next <= (others=>'0');
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buffer_select_next <= not(buffer_select_reg);
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input_address_next <= (others=>'0');
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buffer_select_next <= not(buffer_select_reg);
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reset_output_address <= '1';
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end if;
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end process;
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-- output
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process(vga_hsync_reg,vga_hsync_end,output_address_reg,doubled_enable,vga_odd_reg)
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process(vga_hsync_reg,vga_hsync_end,output_address_reg,doubled_enable,vga_odd_reg,reset_output_address)
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begin
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output_address_next <= output_address_reg;
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vga_hsync_start<='0';
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| ... | ... | |
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vga_hsync_next <= '0';
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vga_odd_next <= not(vga_odd_reg);
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end if;
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if (reset_output_address = '1') then
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output_address_next <= (others=>'0');
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end if;
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end process;
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linea_address <= input_address_reg when buffer_select_reg='1' else output_address_reg;
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Also available in: Unified diff
Resync output to input hsync