Revision 266
Added by markw almost 11 years ago
| mcc216/atari800core.qsf | ||
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set_instance_assignment -name IO_MAXIMUM_TOGGLE_RATE "0 MHz" -to VGA_B[3]
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set_global_assignment -name QIP_FILE usbpll.qip
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set_global_assignment -name QIP_FILE pal_pll.qip
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set_global_assignment -name QIP_FILE pll_downstream_pal.qip
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set_global_assignment -name QIP_FILE ntsc_pll.qip
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| mcc216/atari800core_mcc.vhd | ||
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SD_DAT0 : IN STD_LOGIC;
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SD_CLK : OUT STD_LOGIC;
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SD_CMD : OUT STD_LOGIC;
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SD_DAT3 : OUT STD_LOGIC
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SD_DAT3 : OUT STD_LOGIC;
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USB2_P : INOUT STD_LOGIC;
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USB2_N : INOUT STD_LOGIC
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);
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END atari800core_mcc;
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ARCHITECTURE vhdl OF atari800core_mcc IS
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component usbHostCyc2Wrap_usb1t11
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port (
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clk_i :in std_logic;
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rst_i :in std_logic;
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address_i : in std_logic_vector(7 downto 0);
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data_i : in std_logic_vector(7 downto 0);
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data_o : out std_logic_vector(7 downto 0);
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we_i :in std_logic;
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strobe_i :in std_logic;
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ack_o :out std_logic;
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irq :out std_logic;
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usbClk :in std_logic;
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USBWireVPin :in std_logic;
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USBWireVMin :in std_logic;
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USBWireVPout :out std_logic;
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USBWireVMout :out std_logic;
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USBWireOE_n :out std_logic;
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USBFullSpeed :out std_logic
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);
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end component;
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component hq_dac
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port (
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reset :in std_logic;
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signal freezer_enable : std_logic;
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signal freezer_activate: std_logic;
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-- usb
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signal CLK_USB : std_logic;
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signal USBWireVPin : std_logic;
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signal USBWireVMin : std_logic;
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signal USBWireVPout : std_logic;
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signal USBWireVMout : std_logic;
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signal USBWireOE_n : std_logic;
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BEGIN
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usbcon : usbHostCyc2Wrap_usb1t11
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port map
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(
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clk_i => clk,
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rst_i => not(reset_n),
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address_i => others=>('0'),
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data_i => others=>('0'),
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data_o =>open,
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we_i => '0',
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strobe_i => open,
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ack_o => open,
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irq => open,
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usbClk => CLK_USB,
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USBWireVPin => USBWireVPin,
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USBWireVMin => USBWireVMin,
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USBWireVPout => USBWireVPout,
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USBWireVMout => USBWireVMout,
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USBWireOE_n => USBWireOE_n,
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USBFullSpeed => open
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);
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USB2_P <= USBWireVPout when USBWireOE_n='0' else 'Z';
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USB2_N <= USBWireVMout when USBWireOE_n='0' else 'Z';
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USBWireVPin <= USB2_P;
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USBWireVMin <= USB2_N;
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dac_left : hq_dac
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port map
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(
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PLL_LOCKED <= EXT_PLL_LOCKED(1);
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end generate;
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usb_pll : entity work.usbpll
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PORT MAP(inclk0 => FPGA_CLK,
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c0 => CLK_USB,
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locked => open);
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gen_real_pll : if ext_clock=0 generate
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gen_tv_pal : if tv=1 generate
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mcc_pll : entity work.pal_pll
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| mcc216/build.sh | ||
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`mkdir $dir/svideo`;
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`cp ../common/a8core/* ./$dir/common/a8core`;
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`cp ../common/components/* ./$dir/common/components`;
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mkdir "./$dir/common/components/usbhostslave";
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`cp ../common/components/usbhostslave/trunk/RTL/*/*.v ./$dir/common/components/usbhostslave`;
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`cp ../common/zpu/* ./$dir/common/zpu`;
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`cp ./svideo/* ./$dir/svideo`;
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chdir $dir;
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`../makeqsf ../atari800core.qsf ./svideo ./common/a8core ./common/components ./common/zpu`;
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`../makeqsf ../atari800core.qsf ./svideo ./common/a8core ./common/components ./common/zpu ./common/components/usbhostslave`;
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foreach my $key (sort keys %{$variants{$variant}})
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{
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Also available in: Unified diff
Instantiate USB host. Next need to wire to ZPU, then make ZPU firmware talk to some USB devices via this...