Project

General

Profile

« Previous | Next » 

Revision 185

Added by markw almost 11 years ago

Reconnected up the scandoubler on de1. This required sharing the pokey mixer to fix in m4k on de1. Also some work on using better pal/ntsc settings on de1 (not yet working)

View differences:

common/a8core/atari5200core.vhd
signal POKEY1_CHANNEL2 : std_logic_vector(3 downto 0);
signal POKEY1_CHANNEL3 : std_logic_vector(3 downto 0);
signal AUDIO_BOTH : std_logic_vector(15 downto 0);
-- MEMORY IS READY - input to all devices
SIGNAL MEMORY_DATA : STD_LOGIC_VECTOR(31 DOWNTO 0);
SIGNAL MEMORY_READY_ANTIC : STD_LOGIC;
......
DATA_OUT => ANTIC_DO,
dma_address_out => ANTIC_ADDR);
pokey_mixer_l : entity work.pokey_mixer
pokey_mixer : entity work.pokey_mixer_mux
PORT MAP(CLK => CLK,
GTIA_SOUND => '0',
CHANNEL_0 => POKEY1_CHANNEL0,
CHANNEL_1 => POKEY1_CHANNEL1,
CHANNEL_2 => POKEY1_CHANNEL2,
CHANNEL_3 => POKEY1_CHANNEL3,
CHANNEL_ENABLE => "1111",
COVOX_CHANNEL_0 => (others=>'0'),
COVOX_CHANNEL_1 => (others=>'0'),
VOLUME_OUT => AUDIO_BOTH);
AUDIO_L <= AUDIO_BOTH;
AUDIO_R <= AUDIO_BOTH;
CHANNEL_L_0 => POKEY1_CHANNEL0,
CHANNEL_L_1 => POKEY1_CHANNEL1,
CHANNEL_L_2 => POKEY1_CHANNEL2,
CHANNEL_L_3 => POKEY1_CHANNEL3,
COVOX_CHANNEL_L_0 => (others=>'0'),
COVOX_CHANNEL_L_1 => (others=>'0'),
CHANNEL_R_0 => POKEY1_CHANNEL0,
CHANNEL_R_1 => POKEY1_CHANNEL1,
CHANNEL_R_2 => POKEY1_CHANNEL2,
CHANNEL_R_3 => POKEY1_CHANNEL3,
COVOX_CHANNEL_R_0 => (others=>'0'),
COVOX_CHANNEL_R_1 => (others=>'0'),
VOLUME_OUT_L => AUDIO_L,
VOLUME_OUT_R => AUDIO_R);
-- TODO, this is freddy, replace with 5200 equiv rather than generic
-- Also remove dma logic from here if possible
common/a8core/atari800core.vhd
DATA_OUT => ANTIC_DO,
dma_address_out => ANTIC_ADDR);
pokey_mixer_l : entity work.pokey_mixer
pokey_mixer_both : entity work.pokey_mixer_mux
PORT MAP(CLK => CLK,
GTIA_SOUND => GTIA_SOUND,
CHANNEL_0 => POKEY1_CHANNEL0,
CHANNEL_1 => POKEY1_CHANNEL1,
CHANNEL_2 => POKEY1_CHANNEL2,
CHANNEL_3 => POKEY1_CHANNEL3,
CHANNEL_ENABLE => "1111",
COVOX_CHANNEL_0 => covox_channel0,
COVOX_CHANNEL_1 => covox_channel1,
VOLUME_OUT => AUDIO_L);
CHANNEL_L_0 => POKEY1_CHANNEL0,
CHANNEL_L_1 => POKEY1_CHANNEL1,
CHANNEL_L_2 => POKEY1_CHANNEL2,
CHANNEL_L_3 => POKEY1_CHANNEL3,
COVOX_CHANNEL_L_0 => covox_channel0,
COVOX_CHANNEL_L_1 => covox_channel1,
CHANNEL_R_0 => POKEY2_CHANNEL0,
CHANNEL_R_1 => POKEY2_CHANNEL1,
CHANNEL_R_2 => POKEY2_CHANNEL2,
CHANNEL_R_3 => POKEY2_CHANNEL3,
COVOX_CHANNEL_R_0 => covox_channel2,
COVOX_CHANNEL_R_1 => covox_channel3,
VOLUME_OUT_L => AUDIO_L,
VOLUME_OUT_R => AUDIO_R);
pokey_mixer_r : entity work.pokey_mixer
PORT MAP(CLK => CLK,
GTIA_SOUND => GTIA_SOUND,
CHANNEL_0 => POKEY2_CHANNEL0,
CHANNEL_1 => POKEY2_CHANNEL1,
CHANNEL_2 => POKEY2_CHANNEL2,
CHANNEL_3 => POKEY2_CHANNEL3,
COVOX_CHANNEL_0 => covox_channel2,
COVOX_CHANNEL_1 => covox_channel3,
CHANNEL_ENABLE => "1111",
VOLUME_OUT => AUDIO_R);
pokey2 : entity work.pokey
PORT MAP(CLK => CLK,
ENABLE_179 => ENABLE_179_MEMWAIT,
common/a8core/pokey_mixer.vhdl
ENTITY pokey_mixer IS
PORT
(
CLK : IN STD_LOGIC;
CHANNEL_ENABLE : IN STD_LOGIC_VECTOR(3 downto 0);
CHANNEL_0 : IN STD_LOGIC_VECTOR(3 downto 0);
CHANNEL_1 : IN STD_LOGIC_VECTOR(3 downto 0);
CHANNEL_2 : IN STD_LOGIC_VECTOR(3 downto 0);
......
COVOX_CHANNEL_0 : IN STD_LOGIC_VECTOR(7 downto 0);
COVOX_CHANNEL_1 : IN STD_LOGIC_VECTOR(7 downto 0);
VOLUME_OUT : OUT STD_LOGIC_vector(15 downto 0)
VOLUME_OUT_NEXT : OUT STD_LOGIC_vector(15 downto 0)
);
END pokey_mixer;
ARCHITECTURE vhdl OF pokey_mixer IS
signal volume_sum : std_logic_vector(9 downto 0);
signal volume_next : std_logic_vector(15 downto 0);
signal volume_reg : std_logic_vector(15 downto 0);
signal volume_sum : std_logic_vector(9 downto 0);
signal channel_0_en : std_logic_vector(3 downto 0);
signal channel_1_en : std_logic_vector(3 downto 0);
signal channel_2_en : std_logic_vector(3 downto 0);
signal channel_3_en : std_logic_vector(3 downto 0);
BEGIN
-- register
process(clk)
begin
if (clk'event and clk='1') then
volume_reg <= volume_next;
end if;
end process;
-- next state
process(channel_enable,channel_0,channel_1,channel_2,channel_3)
begin
channel_0_en <= channel_0;
channel_1_en <= channel_1;
channel_2_en <= channel_2;
channel_3_en <= channel_3;
-- if (channel_enable(3)='0') then
-- channel_0_en <= X"0";
-- end if;
--
-- if (channel_enable(2)='0') then
-- channel_1_en <= X"0";
-- end if;
--
-- if (channel_enable(1)='0') then
-- channel_2_en <= X"0";
-- end if;
--
-- if (channel_enable(0)='0') then
-- channel_3_en <= X"0";
-- end if;
end process;
process (channel_0_en,channel_1_en,channel_2_en,channel_3_en,covox_CHANNEL_0,covox_channel_1,gtia_sound)
process (channel_0,channel_1,channel_2,channel_3,covox_CHANNEL_0,covox_channel_1,gtia_sound)
variable channel0_en_long : unsigned(10 downto 0);
variable channel1_en_long : unsigned(10 downto 0);
variable channel2_en_long : unsigned(10 downto 0);
......
covox_0_long := (others=>'0');
covox_1_long := (others=>'0');
channel0_en_long(7 downto 4) := unsigned(channel_0_en);
channel1_en_long(7 downto 4) := unsigned(channel_1_en);
channel2_en_long(7 downto 4) := unsigned(channel_2_en);
channel3_en_long(7 downto 4) := unsigned(channel_3_en);
channel0_en_long(7 downto 4) := unsigned(channel_0);
channel1_en_long(7 downto 4) := unsigned(channel_1);
channel2_en_long(7 downto 4) := unsigned(channel_2);
channel3_en_long(7 downto 4) := unsigned(channel_3);
gtia_sound_long(7 downto 4) := gtia_sound&gtia_sound&gtia_sound&gtia_sound;
covox_0_long(7 downto 0) := unsigned(covox_channel_0);
covox_1_long(7 downto 0) := unsigned(covox_channel_1);
......
end process;
-- output
volume_out <= volume_reg(15 downto 0);
volume_out_next <= volume_next;
END vhdl;
common/a8core/pokey_mixer_mux.vhdl
---------------------------------------------------------------------------
-- (c) 2014 mark watson
-- I am happy for anyone to use this for non-commercial use.
-- If my vhdl files are used commercially or otherwise sold,
-- please contact me for explicit permission at scrameta (gmail).
-- This applies for source and binary form and derived works.
---------------------------------------------------------------------------
LIBRARY ieee;
USE ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use IEEE.STD_LOGIC_MISC.all;
ENTITY pokey_mixer_mux IS
PORT
(
CLK : IN STD_LOGIC;
CHANNEL_L_0 : IN STD_LOGIC_VECTOR(3 downto 0);
CHANNEL_L_1 : IN STD_LOGIC_VECTOR(3 downto 0);
CHANNEL_L_2 : IN STD_LOGIC_VECTOR(3 downto 0);
CHANNEL_L_3 : IN STD_LOGIC_VECTOR(3 downto 0);
COVOX_CHANNEL_L_0 : IN STD_LOGIC_VECTOR(7 downto 0);
COVOX_CHANNEL_L_1 : IN STD_LOGIC_VECTOR(7 downto 0);
CHANNEL_R_0 : IN STD_LOGIC_VECTOR(3 downto 0);
CHANNEL_R_1 : IN STD_LOGIC_VECTOR(3 downto 0);
CHANNEL_R_2 : IN STD_LOGIC_VECTOR(3 downto 0);
CHANNEL_R_3 : IN STD_LOGIC_VECTOR(3 downto 0);
COVOX_CHANNEL_R_0 : IN STD_LOGIC_VECTOR(7 downto 0);
COVOX_CHANNEL_R_1 : IN STD_LOGIC_VECTOR(7 downto 0);
GTIA_SOUND : IN STD_LOGIC;
VOLUME_OUT_L : OUT STD_LOGIC_vector(15 downto 0);
VOLUME_OUT_R : OUT STD_LOGIC_vector(15 downto 0)
);
END pokey_mixer_mux;
ARCHITECTURE vhdl OF pokey_mixer_mux IS
signal LEFT_CHANNEL_NEXT : STD_LOGIC;
signal LEFT_CHANNEL_REG : STD_LOGIC;
signal CHANNEL_0_SEL : STD_LOGIC_VECTOR(3 downto 0);
signal CHANNEL_1_SEL : STD_LOGIC_VECTOR(3 downto 0);
signal CHANNEL_2_SEL : STD_LOGIC_VECTOR(3 downto 0);
signal CHANNEL_3_SEL : STD_LOGIC_VECTOR(3 downto 0);
signal COVOX_CHANNEL_0_SEL : STD_LOGIC_VECTOR(7 downto 0);
signal COVOX_CHANNEL_1_SEL : STD_LOGIC_VECTOR(7 downto 0);
signal VOLUME_OUT_NEXT : STD_LOGIC_VECTOR(15 downto 0);
signal VOLUME_OUT_L_NEXT : STD_LOGIC_VECTOR(15 downto 0);
signal VOLUME_OUT_L_REG : STD_LOGIC_VECTOR(15 downto 0);
signal VOLUME_OUT_R_NEXT : STD_LOGIC_VECTOR(15 downto 0);
signal VOLUME_OUT_R_REG : STD_LOGIC_VECTOR(15 downto 0);
BEGIN
process(clk)
begin
if (clk'event and clk='1') then
LEFT_CHANNEL_REG <= LEFT_CHANNEL_NEXT;
VOLUME_OUT_L_REG <= VOLUME_OUT_L_NEXT;
VOLUME_OUT_R_REG <= VOLUME_OUT_R_NEXT;
END IF;
END PROCESS;
LEFT_CHANNEL_NEXT <= not(LEFT_CHANNEL_REG);
-- mux input
PROCESS(
CHANNEL_L_0,CHANNEL_L_1,CHANNEL_L_2,CHANNEL_L_3,COVOX_CHANNEL_L_0,COVOX_CHANNEL_L_1,
CHANNEL_R_0,CHANNEL_R_1,CHANNEL_R_2,CHANNEL_R_3,COVOX_CHANNEL_R_0,COVOX_CHANNEL_R_1,
LEFT_CHANNEL_REG)
BEGIN
CHANNEL_0_SEL <= (OTHERS=>'0');
CHANNEL_1_SEL <= (OTHERS=>'0');
CHANNEL_2_SEL <= (OTHERS=>'0');
CHANNEL_3_SEL <= (OTHERS=>'0');
COVOX_CHANNEL_0_SEL <= (OTHERS=>'0');
COVOX_CHANNEL_1_SEL <= (OTHERS=>'0');
IF (LEFT_CHANNEL_REG = '1') THEN
CHANNEL_0_SEL <= CHANNEL_L_0;
CHANNEL_1_SEL <= CHANNEL_L_1;
CHANNEL_2_SEL <= CHANNEL_L_2;
CHANNEL_3_SEL <= CHANNEL_L_3;
COVOX_CHANNEL_0_SEL <= COVOX_CHANNEL_L_0;
COVOX_CHANNEL_1_SEL <= COVOX_CHANNEL_L_1;
ELSE
CHANNEL_0_SEL <= CHANNEL_R_0;
CHANNEL_1_SEL <= CHANNEL_R_1;
CHANNEL_2_SEL <= CHANNEL_R_2;
CHANNEL_3_SEL <= CHANNEL_R_3;
COVOX_CHANNEL_0_SEL <= COVOX_CHANNEL_R_0;
COVOX_CHANNEL_1_SEL <= COVOX_CHANNEL_R_1;
END IF;
END PROCESS;
-- shared mixer
shared_pokey_mixer : entity work.pokey_mixer
port map
(
CHANNEL_0 => CHANNEL_0_SEL,
CHANNEL_1 => CHANNEL_1_SEL,
CHANNEL_2 => CHANNEL_2_SEL,
CHANNEL_3 => CHANNEL_3_SEL,
COVOX_CHANNEL_0 => COVOX_CHANNEL_0_SEL,
COVOX_CHANNEL_1 => COVOX_CHANNEL_1_SEL,
GTIA_SOUND => GTIA_SOUND,
VOLUME_OUT_NEXT => VOLUME_OUT_NEXT
);
-- mux output
PROCESS(
VOLUME_OUT_NEXT,
VOLUME_OUT_L_REG,
VOLUME_OUT_R_REG,
LEFT_CHANNEL_REG)
BEGIN
VOLUME_OUT_L_NEXT <= VOLUME_OUT_L_REG;
VOLUME_OUT_R_NEXT <= VOLUME_OUT_R_REG;
if (LEFT_CHANNEL_REG='1') then
VOLUME_OUT_L_NEXT <= VOLUME_OUT_NEXT;
else
VOLUME_OUT_R_NEXT <= VOLUME_OUT_NEXT;
end if;
END PROCESS;
-- output
VOLUME_OUT_L <= VOLUME_OUT_L_REG;
VOLUME_OUT_R <= VOLUME_OUT_R_REG;
END vhdl;
de1/atari800core_de1.vhd
LIBRARY work;
ENTITY atari800core_de1 IS
GENERIC
(
TV : integer -- 1 = PAL, 0=NTSC
);
PORT
(
CLOCK_50 : IN STD_LOGIC;
CLOCK_27 : IN STD_LOGIC_VECTOR(1 downto 0);
AUD_BCLK : IN STD_LOGIC;
AUD_DACLRCK : IN STD_LOGIC;
......
signal GPIO_1_OUT : std_logic_vector(35 downto 0);
signal TRIGGERS : std_logic_vector(3 downto 0);
-- scandoubler
signal half_scandouble_enable_reg : std_logic;
signal half_scandouble_enable_next : std_logic;
signal VIDEO_B : std_logic_vector(7 downto 0);
BEGIN
-- ANYTHING NOT CONNECTED...
......
hexdecoder1 : entity work.hexdecoder
PORT MAP(CLK => CLK,
NUMBER => X"7",
NUMBER => X"8",
DIGIT => HEX1);
hexdecoder2 : entity work.hexdecoder
PORT MAP(CLK => CLK,
NUMBER => X"A",
NUMBER => X"0",
DIGIT => HEX2);
hexdecoder3 : entity work.hexdecoder
PORT MAP(CLK => CLK,
NUMBER => X"1",
NUMBER => X"0",
DIGIT => HEX3);
sram1 : entity work.sram
......
SIO_OUT => SIO_TXD
);
--b2v_inst22 : entity work.scandoubler
--PORT MAP(CLK => CLK,
-- RESET_N => RESET_N,
-- VGA => VGA,
-- COMPOSITE_ON_HSYNC => COMPOSITE_ON_HSYNC,
-- colour_enable => SCANDOUBLER_SHARED_ENABLE_LOW,
-- doubled_enable => SCANDOUBLER_SHARED_ENABLE_HIGH,
-- vsync_in => SYNTHESIZED_WIRE_12,
-- hsync_in => SYNTHESIZED_WIRE_13,
-- colour_in => SYNTHESIZED_WIRE_14,
-- VSYNC => VGA_VS,
-- HSYNC => VGA_HS,
-- B => VGA_B,
-- G => VGA_G,
-- R => VGA_R);
process(clk,RESET_N,SDRAM_RESET_N,reset_atari)
begin
if ((RESET_N and SDRAM_RESET_N and not(reset_atari))='0') then
half_scandouble_enable_reg <= '0';
elsif (clk'event and clk='1') then
half_scandouble_enable_reg <= half_scandouble_enable_next;
end if;
end process;
half_scandouble_enable_next <= not(half_scandouble_enable_reg);
scandoubler : entity work.scandoubler
GENERIC MAP
(
video_bits=>4
)
PORT MAP(CLK => CLK,
RESET_N => RESET_N and SDRAM_RESET_N and not(reset_atari),
VGA => SW(7),
COMPOSITE_ON_HSYNC => SW(6),
colour_enable => half_scandouble_enable_reg,
doubled_enable => '1',
scanlines_on => SW(5),
vsync_in => VGA_VS_RAW,
hsync_in => VGA_HS_RAW,
colour_in => VIDEO_B,
VSYNC => VGA_VS,
HSYNC => VGA_HS,
B => VGA_B,
G => VGA_G,
R => VGA_R);
audio_codec_config_over_i2c : entity work.i2c_loader
GENERIC MAP(device_address => 26,
log2_divider => 6,
......
MCLK_2 => AUD_XCK,
DACDAT => AUD_DACDAT);
--gen_ntsc_pll : if tv=0 generate
--pll : entity work.pll_ntsc
--PORT MAP(inclk0 => CLOCK_27(0),
-- c0 => CLK_SDRAM,
-- c1 => CLK,
-- c2 => DRAM_CLK,
-- locked => PLL_LOCKED);
--end generate;
--
--gen_pal_pll : if tv=1 generate
--pll : entity work.pll_pal
--PORT MAP(inclk0 => CLOCK_27(0),
-- c0 => CLK_SDRAM,
-- c1 => CLK,
-- c2 => DRAM_CLK,
-- locked => PLL_LOCKED);
--end generate;
--
--gen_old_pll : if tv=2 generate
pll : entity work.pll
PORT MAP(inclk0 => CLOCK_50,
c0 => CLK_SDRAM,
c1 => CLK,
c2 => DRAM_CLK,
locked => PLL_LOCKED);
--end generate;
RESET_N <= PLL_LOCKED;
......
SIO_RXD <= zpu_sio_txd and UART_RXD;
-- VIDEO
VGA_HS <= not(VGA_HS_RAW xor VGA_VS_RAW);
VGA_VS <= not(VGA_VS_RAW);
--VGA_HS <= not(VGA_HS_RAW xor VGA_VS_RAW);
--VGA_VS <= not(VGA_VS_RAW);
atari800 : entity work.atari800core
GENERIC MAP
(
cycle_length => 32,
video_bits => 4
video_bits => 8,
palette => 0
)
PORT MAP
(
......
VIDEO_VS => VGA_VS_RAW,
VIDEO_HS => VGA_HS_RAW,
VIDEO_B => VGA_B,
VIDEO_G => VGA_G,
VIDEO_R => VGA_R,
VIDEO_B => VIDEO_B,
VIDEO_G => open,
VIDEO_R => open,
AUDIO_L => AUDIO_LEFT,
AUDIO_R => AUDIO_RIGHT,

Also available in: Unified diff