Revision 1543
Added by markw 3 days ago
| atari_chips/pokeyv2/mixer.vhdl | ||
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signal RIGHT_REG : std_logic;
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signal RIGHT_PLAYING_COUNT_NEXT : unsigned(23 downto 0);
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signal RIGHT_PLAYING_COUNT_REG : unsigned(23 downto 0);
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signal RIGHT_SNAP_REG : signed(19 downto 8);
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signal RIGHT_SNAP_NEXT : signed(19 downto 8);
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-- sums
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signal audio0_reg : signed(15 downto 0);
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| ... | ... | |
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begin
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if (reset_n='0') then
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RIGHT_REG <= '0';
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RIGHT_SNAP_REG <= (others=>'0');
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RIGHT_PLAYING_COUNT_REG <= (others=>'0');
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audio0_reg <= (others=>'0');
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audio1_reg <= (others=>'0');
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| ... | ... | |
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end loop;
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elsif (clk'event and clk='1') then
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RIGHT_REG <= RIGHT_NEXT;
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RIGHT_SNAP_REG <= RIGHT_SNAP_NEXT;
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RIGHT_PLAYING_COUNT_REG <= RIGHT_PLAYING_COUNT_NEXT;
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audio0_reg <= audio0_next;
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audio1_reg <= audio1_next;
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| ... | ... | |
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RIGHT_PLAYING_RECENTLY <= or_reduce(std_logic_vector(RIGHT_PLAYING_COUNT_REG));
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process(state_reg,RIGHT_REG,out_ch_reg,acc_reg,volume,dc_reg,dc_corrected_reg,
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process(state_reg,RIGHT_REG,RIGHT_SNAP_REG,RIGHT_SNAP_NEXT,out_ch_reg,acc_reg,volume,dc_reg,dc_corrected_reg,
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POST_DIVIDE,SATURATED,include_in_output,enable_cycle)
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variable postdivide : std_logic_vector(1 downto 0);
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variable presaturate : signed(19 downto 0);
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| ... | ... | |
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out_ch_next <= out_ch_reg;
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acc_next <= acc_reg;
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RIGHT_NEXT <= RIGHT_REG;
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RIGHT_SNAP_NEXT <= RIGHT_SNAP_REG;
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dc_next <= dc_reg;
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dc_corrected_next <= dc_corrected_reg;
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| ... | ... | |
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channelsel <= x"6";
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state_next <= state_BCH1;
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-- NEEDS DOING WITHOUT BCH* mixed, since those plays on all channels!!
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RIGHT_NEXT <= (xor_reduce(std_logic_vector(acc_reg)) and out_ch_reg(0)) or (RIGHT_REG and not(out_ch_reg(0)));
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if out_ch_reg(0) = '1' then -- right pass: acc_reg = clean right sum
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RIGHT_SNAP_NEXT <= acc_reg(19 downto 8);
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RIGHT_NEXT <= or_reduce(std_logic_vector(acc_reg(19 downto 8) xor RIGHT_SNAP_REG));
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end if;
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when state_BCH1 =>
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channelsel <= x"7";
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state_next <= state_dc;
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Fix for right channel detection logic