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Revision 1479

Added by markw 13 days ago

Change regulator to a linear one that works with the io pin protection scheme

View differences:

atari_chips/hardware/pokeymin1_4layer/pokeymin1.kicad_pcb
)
(net 0 "")
(net 1 "Net-(U1-IN+)")
(net 2 "Net-(U3-SW)")
(net 3 "Net-(U1-IN-)")
(net 4 "Net-(U2-NSTATUS)")
(net 5 "GND")
(net 6 "/FPGA/TDI")
(net 7 "+3.3V")
(net 8 "/FPGA/TCK")
(net 9 "/FPGA/TMS")
(net 10 "Net-(J1-Pin_6)")
(net 11 "/Audio output/AUD_INT_OUT")
(net 12 "Net-(U2-CONF_DONE)")
(net 13 "unconnected-(U2-BB$7-PadK5)")
(net 14 "unconnected-(U2-T$12-PadA7)")
(net 15 "unconnected-(U2-IO_UNUSED-PadE1)")
(net 16 "+5V")
(net 17 "+2V5")
(net 18 "+3.3VA")
(net 19 "unconnected-(U2-T$13-PadB7)")
(net 20 "unconnected-(U2-B$23-PadM13)")
(net 21 "/Audio output/AUDINT")
(net 22 "/FPGA/PTHRES")
(net 23 "unconnected-(U2-TB$4-PadC9)")
(net 24 "unconnected-(U2-IO_UNUSED-PadE1)_1")
(net 25 "unconnected-(U2-NC-PadD3)")
(net 26 "unconnected-(U2-CLK1-PadH4)")
(net 27 "unconnected-(U2-B$5-PadN3)")
(net 28 "unconnected-(U2-BB$14-PadK11)")
(net 29 "unconnected-(U2-BB$16-PadK12)")
(net 30 "unconnected-(U2-B$3-PadN2)")
(net 31 "unconnected-(U2-T$16-PadA10)")
(net 32 "unconnected-(U2-IO_UNUSED-PadE1)_2")
(net 33 "unconnected-(U2-BB$10-PadK7)")
(net 34 "/FPGA/NC1")
(net 35 "unconnected-(U2-NC-PadE2)")
(net 36 "unconnected-(U2-TB$6-PadC10)")
(net 37 "unconnected-(U2-TB$8-PadD11)")
(net 38 "unconnected-(U2-IO_UNUSED-PadE1)_3")
(net 39 "unconnected-(U2-IO_UNUSED-PadE1)_4")
(net 40 "unconnected-(U2-T$5-PadB3)")
(net 41 "unconnected-(U2-IO_UNUSED-PadE1)_5")
(net 42 "unconnected-(U2-IO_UNUSED-PadE1)_6")
(net 43 "unconnected-(U2-T$9-PadB5)")
(net 44 "unconnected-(U2-CLK0-PadH6)")
(net 45 "unconnected-(U2-BB$21-PadJ6)")
(net 46 "unconnected-(U2-IO_UNUSED-PadE1)_7")
(net 47 "unconnected-(U2-B$21-PadM12)")
(net 48 "unconnected-(U2-BB$22-PadJ7)")
(net 49 "unconnected-(U2-B$22-PadN12)")
(net 50 "unconnected-(U2-JTAG_EN-PadE5)")
(net 51 "unconnected-(U2-CLK4-PadF13)")
(net 52 "unconnected-(U2-IO_UNUSED-PadE1)_8")
(net 53 "unconnected-(U2-T$6-PadA4)")
(net 54 "unconnected-(U2-IO_UNUSED-PadE1)_9")
(net 55 "unconnected-(U2-BB$20-PadJ5)")
(net 56 "unconnected-(U2-CRC_ERROR-PadD6)")
(net 57 "unconnected-(U2-BB$12-PadK10)")
(net 58 "unconnected-(U2-NC-PadD2)")
(net 59 "/Level shifter/POKEY5.P2")
(net 60 "/Level shifter/POKEY5.P3")
(net 61 "/Level shifter/POKEY5.P4")
(net 62 "/Level shifter/POKEY5.P5")
(net 63 "/Level shifter/POKEY5.P6")
(net 64 "/Level shifter/POKEY5.P7")
(net 65 "/Level shifter/POKEY5.P29")
(net 66 "/Level shifter/POKEY5.P30")
(net 67 "/Level shifter/POKEY5.P31")
(net 68 "/Level shifter/POKEY5.P38")
(net 69 "/Level shifter/POKEY5.P28")
(net 70 "/Level shifter/POKEY5.P39")
(net 71 "/Level shifter/POKEY5.P40")
(net 72 "/Level shifter/POKEY5.P36")
(net 73 "/Level shifter/POKEY5.P32")
(net 74 "/Level shifter/POKEY5.P33")
(net 75 "/Level shifter/POKEY5.P34")
(net 76 "/Level shifter/POKEY5.P35")
(net 77 "/Level shifter/POKEY5.P18")
(net 78 "/Level shifter/POKEY5.P25")
(net 79 "/Level shifter/POKEY5.P20")
(net 80 "/Level shifter/POKEY5.P26")
(net 81 "/Level shifter/POKEY5.P27")
(net 82 "/Level shifter/POKEY5.P24")
(net 83 "/Level shifter/POKEY5.P16")
(net 84 "/Level shifter/POKEY5.P23")
(net 85 "/Level shifter/POKEY5.P19")
(net 86 "/Level shifter/POKEY5.P8")
(net 87 "/Level shifter/POKEY5.P9")
(net 88 "/Level shifter/POKEY5.P10")
(net 89 "/Level shifter/POKEY5.P11")
(net 90 "/Level shifter/POKEY5.P13")
(net 91 "/Level shifter/POKEY5.P14")
(net 92 "/Level shifter/POKEY5.P15")
(net 93 "/Level shifter/POKEY5.P12")
(net 94 "/Level shifter/POKEY5.P22")
(net 95 "/Level shifter/POKEY5.P21")
(net 96 "/FPGA/POKEY3.P39")
(net 97 "/FPGA/POKEY3.P8")
(net 98 "/FPGA/POKEY3.P15")
(net 99 "/FPGA/POKEY3.P23")
(net 100 "/FPGA/POKEY3.P36")
(net 101 "/FPGA/POKEY3.P11")
(net 102 "/FPGA/POKEY3.P26")
(net 103 "/FPGA/POKEY3.P35")
(net 104 "/FPGA/POKEY3.P16")
(net 105 "/FPGA/POKEY3.P6")
(net 106 "/FPGA/POKEY3.P31")
(net 107 "/FPGA/POKEY3.P34")
(net 108 "/FPGA/POKEY3.P19")
(net 109 "/FPGA/POKEY3.P12")
(net 110 "/FPGA/POKEY3.P7")
(net 111 "/FPGA/POKEY3.P3")
(net 112 "/FPGA/POKEY3.P40")
(net 113 "/FPGA/POKEY3.P29")
(net 114 "/FPGA/POKEY3.P38")
(net 115 "/FPGA/POKEY3.P33")
(net 116 "/FPGA/POKEY3.P5")
(net 117 "/FPGA/POKEY3.P2")
(net 118 "/FPGA/POKEY3.P21")
(net 119 "/FPGA/POKEY3.P25")
(net 120 "/FPGA/POKEY3.P27")
(net 121 "/FPGA/POKEY3.P18")
(net 122 "/FPGA/POKEY3.P13")
(net 123 "/FPGA/POKEY3.P10")
(net 124 "/FPGA/POKEY3.P14")
(net 125 "/FPGA/POKEY3.P24")
(net 126 "/FPGA/POKEY3.P22")
(net 127 "/FPGA/POKEY3.P30")
(net 128 "/FPGA/POKEY3.P20")
(net 129 "/FPGA/POKEY3.P28")
(net 130 "/FPGA/POKEY3.P4")
(net 131 "/FPGA/POKEY3.P32")
(net 132 "/FPGA/POKEY3.P9")
(net 133 "unconnected-(U2-BB$15-PadL11)")
(net 134 "unconnected-(U2-T$7-PadB4)")
(net 135 "unconnected-(U2-T$10-PadA6)")
(net 136 "unconnected-(U2-IO_UNUSED-PadE1)_10")
(net 137 "unconnected-(U2-BB$11-PadK8)")
(net 138 "unconnected-(U2-IO_UNUSED-PadE1)_11")
(net 139 "unconnected-(U2-T$14-PadA8)")
(net 140 "unconnected-(U2-CONFIG_SEL-PadD7)")
(net 141 "unconnected-(U2-T$4-PadA3)")
(net 142 "unconnected-(U2-CLK3-PadE13)")
(net 143 "unconnected-(U2-IO_UNUSED-PadE1)_12")
(net 144 "unconnected-(U2-IO_UNUSED-PadE1)_13")
(net 145 "unconnected-(U2-TB$5-PadD9)")
(net 146 "unconnected-(U2-IO_UNUSED-PadE1)_14")
(net 147 "unconnected-(U2-BB$24-PadG12)")
(net 148 "unconnected-(U2-IO_UNUSED-PadE1)_15")
(net 149 "unconnected-(U2-B$4-PadM3)")
(net 150 "unconnected-(U2-IO_UNUSED-PadE1)_16")
(net 151 "unconnected-(U2-BB$25-PadG13)")
(net 152 "unconnected-(U2-B$20-PadN11)")
(net 153 "unconnected-(U2-TB$7-PadC11)")
(net 154 "unconnected-(U2-IO_UNUSED-PadE1)_17")
(net 155 "unconnected-(U2-IO_UNUSED-PadE1)_18")
(net 156 "unconnected-(U2-IO_UNUSED-PadE1)_19")
(net 157 "Net-(U2-CLK2)")
(net 158 "unconnected-(U2-B$2-PadM2)")
(net 159 "unconnected-(U2-BB$17-PadL12)")
(net 160 "unconnected-(U2-BB$5-PadL3)")
(net 161 "unconnected-(U2-BB$27-PadJ12)")
(net 162 "unconnected-(U2-T$11-PadB6)")
(net 163 "unconnected-(U2-BB$4-PadL2)")
(net 164 "unconnected-(U2-IO_UNUSED-PadE1)_20")
(net 165 "unconnected-(U2-T$17-PadB10)")
(net 166 "unconnected-(U2-BB$23-PadJ8)")
(net 167 "unconnected-(U2-BB$9-PadK6)")
(net 168 "unconnected-(U2-IO_UNUSED-PadE1)_21")
(net 2 "Net-(U1-IN-)")
(net 3 "Net-(U2-NSTATUS)")
(net 4 "GND")
(net 5 "/FPGA/TDI")
(net 6 "+3.3V")
(net 7 "/FPGA/TCK")
(net 8 "/FPGA/TMS")
(net 9 "Net-(J1-Pin_6)")
(net 10 "/Audio output/AUD_INT_OUT")
(net 11 "Net-(U2-CONF_DONE)")
(net 12 "unconnected-(U2-BB$7-PadK5)")
(net 13 "unconnected-(U2-T$12-PadA7)")
(net 14 "unconnected-(U2-IO_UNUSED-PadE1)")
(net 15 "+5V")
(net 16 "+2V5")
(net 17 "+3.3VA")
(net 18 "unconnected-(U2-T$13-PadB7)")
(net 19 "unconnected-(U2-B$23-PadM13)")
(net 20 "/Audio output/AUDINT")
(net 21 "/FPGA/PTHRES")
(net 22 "unconnected-(U2-TB$4-PadC9)")
(net 23 "unconnected-(U2-IO_UNUSED-PadE1)_1")
(net 24 "unconnected-(U2-NC-PadD3)")
(net 25 "unconnected-(U2-CLK1-PadH4)")
(net 26 "unconnected-(U2-B$5-PadN3)")
(net 27 "unconnected-(U2-BB$14-PadK11)")
(net 28 "unconnected-(U2-BB$16-PadK12)")
(net 29 "unconnected-(U2-B$3-PadN2)")
(net 30 "unconnected-(U2-T$16-PadA10)")
(net 31 "unconnected-(U2-IO_UNUSED-PadE1)_2")
(net 32 "unconnected-(U2-BB$10-PadK7)")
(net 33 "/FPGA/NC1")
(net 34 "unconnected-(U2-NC-PadE2)")
(net 35 "unconnected-(U2-TB$6-PadC10)")
(net 36 "unconnected-(U2-TB$8-PadD11)")
(net 37 "unconnected-(U2-IO_UNUSED-PadE1)_3")
(net 38 "unconnected-(U2-IO_UNUSED-PadE1)_4")
(net 39 "unconnected-(U2-T$5-PadB3)")
(net 40 "unconnected-(U2-IO_UNUSED-PadE1)_5")
(net 41 "unconnected-(U2-IO_UNUSED-PadE1)_6")
(net 42 "unconnected-(U2-T$9-PadB5)")
(net 43 "unconnected-(U2-CLK0-PadH6)")
(net 44 "unconnected-(U2-BB$21-PadJ6)")
(net 45 "unconnected-(U2-IO_UNUSED-PadE1)_7")
(net 46 "unconnected-(U2-B$21-PadM12)")
(net 47 "unconnected-(U2-BB$22-PadJ7)")
(net 48 "unconnected-(U2-B$22-PadN12)")
(net 49 "unconnected-(U2-JTAG_EN-PadE5)")
(net 50 "unconnected-(U2-CLK4-PadF13)")
(net 51 "unconnected-(U2-IO_UNUSED-PadE1)_8")
(net 52 "unconnected-(U2-T$6-PadA4)")
(net 53 "unconnected-(U2-IO_UNUSED-PadE1)_9")
(net 54 "unconnected-(U2-BB$20-PadJ5)")
(net 55 "unconnected-(U2-CRC_ERROR-PadD6)")
(net 56 "unconnected-(U2-BB$12-PadK10)")
(net 57 "unconnected-(U2-NC-PadD2)")
(net 58 "/Level shifter/POKEY5.P2")
(net 59 "/Level shifter/POKEY5.P3")
(net 60 "/Level shifter/POKEY5.P4")
(net 61 "/Level shifter/POKEY5.P5")
(net 62 "/Level shifter/POKEY5.P6")
(net 63 "/Level shifter/POKEY5.P7")
(net 64 "/Level shifter/POKEY5.P29")
(net 65 "/Level shifter/POKEY5.P30")
(net 66 "/Level shifter/POKEY5.P31")
(net 67 "/Level shifter/POKEY5.P38")
(net 68 "/Level shifter/POKEY5.P28")
(net 69 "/Level shifter/POKEY5.P39")
(net 70 "/Level shifter/POKEY5.P40")
(net 71 "/Level shifter/POKEY5.P36")
(net 72 "/Level shifter/POKEY5.P32")
(net 73 "/Level shifter/POKEY5.P33")
(net 74 "/Level shifter/POKEY5.P34")
(net 75 "/Level shifter/POKEY5.P35")
(net 76 "/Level shifter/POKEY5.P18")
(net 77 "/Level shifter/POKEY5.P25")
(net 78 "/Level shifter/POKEY5.P20")
(net 79 "/Level shifter/POKEY5.P26")
(net 80 "/Level shifter/POKEY5.P27")
(net 81 "/Level shifter/POKEY5.P24")
(net 82 "/Level shifter/POKEY5.P16")
(net 83 "/Level shifter/POKEY5.P23")
(net 84 "/Level shifter/POKEY5.P19")
(net 85 "/Level shifter/POKEY5.P8")
(net 86 "/Level shifter/POKEY5.P9")
(net 87 "/Level shifter/POKEY5.P10")
(net 88 "/Level shifter/POKEY5.P11")
(net 89 "/Level shifter/POKEY5.P13")
(net 90 "/Level shifter/POKEY5.P14")
(net 91 "/Level shifter/POKEY5.P15")
(net 92 "/Level shifter/POKEY5.P12")
(net 93 "/Level shifter/POKEY5.P22")
(net 94 "/Level shifter/POKEY5.P21")
(net 95 "/FPGA/POKEY3.P39")
(net 96 "/FPGA/POKEY3.P8")
(net 97 "/FPGA/POKEY3.P15")
(net 98 "/FPGA/POKEY3.P23")
(net 99 "/FPGA/POKEY3.P36")
(net 100 "/FPGA/POKEY3.P11")
(net 101 "/FPGA/POKEY3.P26")
(net 102 "/FPGA/POKEY3.P35")
(net 103 "/FPGA/POKEY3.P16")
(net 104 "/FPGA/POKEY3.P6")
(net 105 "/FPGA/POKEY3.P31")
(net 106 "/FPGA/POKEY3.P34")
(net 107 "/FPGA/POKEY3.P19")
(net 108 "/FPGA/POKEY3.P12")
(net 109 "/FPGA/POKEY3.P7")
(net 110 "/FPGA/POKEY3.P3")
(net 111 "/FPGA/POKEY3.P40")
(net 112 "/FPGA/POKEY3.P29")
(net 113 "/FPGA/POKEY3.P38")
(net 114 "/FPGA/POKEY3.P33")
(net 115 "/FPGA/POKEY3.P5")
(net 116 "/FPGA/POKEY3.P2")
(net 117 "/FPGA/POKEY3.P21")
(net 118 "/FPGA/POKEY3.P25")
(net 119 "/FPGA/POKEY3.P27")
(net 120 "/FPGA/POKEY3.P18")
(net 121 "/FPGA/POKEY3.P13")
(net 122 "/FPGA/POKEY3.P10")
(net 123 "/FPGA/POKEY3.P14")
(net 124 "/FPGA/POKEY3.P24")
(net 125 "/FPGA/POKEY3.P22")
(net 126 "/FPGA/POKEY3.P30")
(net 127 "/FPGA/POKEY3.P20")
(net 128 "/FPGA/POKEY3.P28")
(net 129 "/FPGA/POKEY3.P4")
(net 130 "/FPGA/POKEY3.P32")
(net 131 "/FPGA/POKEY3.P9")
(net 132 "unconnected-(U2-BB$15-PadL11)")
(net 133 "unconnected-(U2-T$7-PadB4)")
(net 134 "unconnected-(U2-T$10-PadA6)")
(net 135 "unconnected-(U2-IO_UNUSED-PadE1)_10")
(net 136 "unconnected-(U2-BB$11-PadK8)")
(net 137 "unconnected-(U2-IO_UNUSED-PadE1)_11")
(net 138 "unconnected-(U2-T$14-PadA8)")
(net 139 "unconnected-(U2-CONFIG_SEL-PadD7)")
(net 140 "unconnected-(U2-T$4-PadA3)")
(net 141 "unconnected-(U2-CLK3-PadE13)")
(net 142 "unconnected-(U2-IO_UNUSED-PadE1)_12")
(net 143 "unconnected-(U2-IO_UNUSED-PadE1)_13")
(net 144 "unconnected-(U2-TB$5-PadD9)")
(net 145 "unconnected-(U2-IO_UNUSED-PadE1)_14")
(net 146 "unconnected-(U2-BB$24-PadG12)")
(net 147 "unconnected-(U2-IO_UNUSED-PadE1)_15")
(net 148 "unconnected-(U2-B$4-PadM3)")
(net 149 "unconnected-(U2-IO_UNUSED-PadE1)_16")
(net 150 "unconnected-(U2-BB$25-PadG13)")
(net 151 "unconnected-(U2-B$20-PadN11)")
(net 152 "unconnected-(U2-TB$7-PadC11)")
(net 153 "unconnected-(U2-IO_UNUSED-PadE1)_17")
(net 154 "unconnected-(U2-IO_UNUSED-PadE1)_18")
(net 155 "unconnected-(U2-IO_UNUSED-PadE1)_19")
(net 156 "Net-(U2-CLK2)")
(net 157 "unconnected-(U2-B$2-PadM2)")
(net 158 "unconnected-(U2-BB$17-PadL12)")
(net 159 "unconnected-(U2-BB$5-PadL3)")
(net 160 "unconnected-(U2-BB$27-PadJ12)")
(net 161 "unconnected-(U2-T$11-PadB6)")
(net 162 "unconnected-(U2-BB$4-PadL2)")
(net 163 "unconnected-(U2-IO_UNUSED-PadE1)_20")
(net 164 "unconnected-(U2-T$17-PadB10)")
(net 165 "unconnected-(U2-BB$23-PadJ8)")
(net 166 "unconnected-(U2-BB$9-PadK6)")
(net 167 "unconnected-(U2-IO_UNUSED-PadE1)_21")
(net 168 "unconnected-(U3-NC-Pad4)")
(footprint "Resistor_SMD:R_0402_1005Metric"
(layer "F.Cu")
(uuid "02060f5d-d9b9-45fc-9daa-320e078b520b")
......
(size 0.54 0.64)
(layers "F.Cu" "F.Mask" "F.Paste")
(roundrect_rratio 0.25)
(net 85 "/Level shifter/POKEY5.P19")
(net 84 "/Level shifter/POKEY5.P19")
(pintype "passive")
(uuid "459e51fd-6d8a-420a-9e10-2c0bd73b1b95")
)
......
(size 0.54 0.64)
(layers "F.Cu" "F.Mask" "F.Paste")
(roundrect_rratio 0.25)
(net 108 "/FPGA/POKEY3.P19")
(net 107 "/FPGA/POKEY3.P19")
(pintype "passive")
(uuid "27759f49-2f28-4cca-b94f-babc6140351c")
)
......
(size 0.54 0.64)
(layers "F.Cu" "F.Mask" "F.Paste")
(roundrect_rratio 0.25)
(net 64 "/Level shifter/POKEY5.P7")
(net 63 "/Level shifter/POKEY5.P7")
(pintype "passive")
(uuid "6c757c83-dd43-495e-8bdf-cae8374f1126")
)
......
(size 0.54 0.64)
(layers "F.Cu" "F.Mask" "F.Paste")
(roundrect_rratio 0.25)
(net 110 "/FPGA/POKEY3.P7")
(net 109 "/FPGA/POKEY3.P7")
(pintype "passive")
(uuid "b0d8963e-3fa4-4d8c-a1af-aeff9e8d5edd")
)
......
(size 0.54 0.64)
(layers "F.Cu" "F.Mask" "F.Paste")
(roundrect_rratio 0.25)
(net 62 "/Level shifter/POKEY5.P5")
(net 61 "/Level shifter/POKEY5.P5")
(pintype "passive")
(uuid "8f6ca6e3-5ae9-42e5-a5d1-788de352a5cc")
)
......
(size 0.54 0.64)
(layers "F.Cu" "F.Mask" "F.Paste")
(roundrect_rratio 0.25)
(net 116 "/FPGA/POKEY3.P5")
(net 115 "/FPGA/POKEY3.P5")
(pintype "passive")
(uuid "a17e08d7-97a6-4097-a552-f347db51f469")
)
......
)
)
)
(footprint "Inductor_SMD:L_1008_2520Metric_Pad1.43x2.20mm_HandSolder"
(layer "F.Cu")
(uuid "07a0ce17-a0f1-4200-9304-79580538f630")
(at 27.672 63.5125 -90)
(descr "Inductor SMD 1008 (2520 Metric), square (rectangular) end terminal, IPC-7351 nominal with elongated pad for handsoldering. (Body size source: https://ecsxtal.com/store/pdf/ECS-MPI2520-SMD-POWER-INDUCTOR.pdf), generated with kicad-footprint-generator")
(tags "inductor handsolder")
(property "Reference" "L1"
(at 2.5375 -0.953 0)
(unlocked yes)
(layer "F.SilkS")
(uuid "aff28efa-ea4e-4420-a452-b4d4fca4d7a2")
(effects
(font
(size 0.5 0.5)
(thickness 0.08)
(bold yes)
)
)
)
(property "Value" "L"
(at 0 2.05 90)
(layer "F.Fab")
(uuid "cd319326-c020-4b48-a3e3-718dd2bb47a0")
(effects
(font
(size 1 1)
(thickness 0.15)
)
)
)
(property "Datasheet" ""
(at 0 0 270)
(unlocked yes)
(layer "F.Fab")
(hide yes)
(uuid "e05b1a57-0a2f-4725-9578-4498cfe21bb3")
(effects
(font
(size 1.27 1.27)
(thickness 0.15)
)
)
)
(property "Description" "Inductor"
(at 0 0 270)
(unlocked yes)
(layer "F.Fab")
(hide yes)
(uuid "7b3bca83-bcac-48e0-bc16-27a5b69e78eb")
(effects
(font
(size 1.27 1.27)
(thickness 0.15)
)
)
)
(property ki_fp_filters "Choke_* *Coil* Inductor_* L_*")
(path "/b3c63cf3-5aec-4ac7-b511-941f39b58d95/bc53bbd3-dd03-4f86-92ae-9d9edae32547")
(sheetname "/Power/")
(sheetfile "power.kicad_sch")
(attr smd)
(fp_line
(start -0.261252 1.11)
(end 0.261252 1.11)
(stroke
(width 0.12)
(type solid)
)
(layer "F.SilkS")
(uuid "d10c935b-c721-434e-b947-6ce43fe42405")
)
(fp_line
(start -0.261252 -1.11)
(end 0.261252 -1.11)
(stroke
(width 0.12)
(type solid)
)
(layer "F.SilkS")
(uuid "fd0cf72d-914f-4f2d-a23a-43673e076510")
)
(fp_line
(start -2.13 1.35)
(end -2.13 -1.35)
(stroke
(width 0.05)
(type solid)
)
(layer "F.CrtYd")
(uuid "cca2db69-d380-43ee-8abc-5f3005f50fb9")
)
(fp_line
(start 2.13 1.35)
(end -2.13 1.35)
(stroke
(width 0.05)
(type solid)
)
(layer "F.CrtYd")
(uuid "16fb6f78-27ac-4833-9766-1dd53786e5ae")
)
(fp_line
(start -2.13 -1.35)
(end 2.13 -1.35)
(stroke
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(layers "F.Cu" "F.Mask" "F.Paste")
(roundrect_rratio 0.25)
(net 68 "/Level shifter/POKEY5.P38")
(net 67 "/Level shifter/POKEY5.P38")
(pintype "passive")
(uuid "ea5e293d-1ef3-4b32-8ac7-cb9a2c402cdb")
)
......
(size 0.54 0.64)
(layers "F.Cu" "F.Mask" "F.Paste")
(roundrect_rratio 0.25)
(net 114 "/FPGA/POKEY3.P38")
(net 113 "/FPGA/POKEY3.P38")
(pintype "passive")
(uuid "5a517054-b94e-4add-9227-8c7ac787a421")
)
......
(size 0.59 0.64)
(layers "F.Cu" "F.Mask" "F.Paste")
(roundrect_rratio 0.25)
(net 7 "+3.3V")
(net 6 "+3.3V")
(pinfunction "K")
(pintype "passive")
(uuid "5d8cb8ed-6ef5-41b3-9b9a-ab56f1c4a6d9")
......
(size 0.59 0.64)
(layers "F.Cu" "F.Mask" "F.Paste")
(roundrect_rratio 0.25)
(net 101 "/FPGA/POKEY3.P11")
(net 100 "/FPGA/POKEY3.P11")
(pinfunction "A")
(pintype "passive")
(uuid "825a718c-b550-4328-81d3-6d99bc4e11c8")
......
(size 0.54 0.64)
(layers "F.Cu" "F.Mask" "F.Paste")
(roundrect_rratio 0.25)
(net 79 "/Level shifter/POKEY5.P20")
(net 78 "/Level shifter/POKEY5.P20")
(pintype "passive")
(uuid "b0d6c5bc-6b27-4f95-ba37-00c835970637")
)
......
(size 0.54 0.64)
(layers "F.Cu" "F.Mask" "F.Paste")
(roundrect_rratio 0.25)
(net 128 "/FPGA/POKEY3.P20")
(net 127 "/FPGA/POKEY3.P20")
(pintype "passive")
(uuid "81961e23-0eb2-4541-9798-4182ad58772c")
)
......
(size 0.59 0.64)
(layers "F.Cu" "F.Mask" "F.Paste")
(roundrect_rratio 0.25)
(net 7 "+3.3V")
(net 6 "+3.3V")
(pinfunction "K")
(pintype "passive")
(uuid "e1f385f8-98c3-4ef4-a15b-ced3719d860c")
......
(size 0.59 0.64)
(layers "F.Cu" "F.Mask" "F.Paste")
(roundrect_rratio 0.25)
(net 121 "/FPGA/POKEY3.P18")
(net 120 "/FPGA/POKEY3.P18")
(pinfunction "A")
(pintype "passive")
(uuid "6c4e32af-60af-403a-aa36-52271a158afd")
......
(size 0.8 0.95)
(layers "F.Cu" "F.Mask" "F.Paste")
(roundrect_rratio 0.25)
(net 22 "/FPGA/PTHRES")
(net 21 "/FPGA/PTHRES")
(pintype "passive")
(uuid "dc38c2f3-1d2b-4122-b1bb-03d6ec4e164d")
)
......
(size 0.8 0.95)
(layers "F.Cu" "F.Mask" "F.Paste")
(roundrect_rratio 0.25)
(net 5 "GND")
(net 4 "GND")
(pintype "passive")
(uuid "bd853643-38e7-4a19-8429-3bee7618d57b")
)
......
(size 0.59 0.64)
(layers "F.Cu" "F.Mask" "F.Paste")
(roundrect_rratio 0.25)
(net 7 "+3.3V")
(net 6 "+3.3V")
(pinfunction "K")
(pintype "passive")
(uuid "a6d6e80a-2aea-44ac-9f73-a71644127289")
......
(size 0.59 0.64)
(layers "F.Cu" "F.Mask" "F.Paste")
(roundrect_rratio 0.25)
(net 113 "/FPGA/POKEY3.P29")
(net 112 "/FPGA/POKEY3.P29")
(pinfunction "A")
(pintype "passive")
(uuid "f18d1866-9f03-4d38-8c84-a9fd7cfd5d17")
......
(size 0.59 0.64)
(layers "F.Cu" "F.Mask" "F.Paste")
(roundrect_rratio 0.25)
(net 7 "+3.3V")
(net 6 "+3.3V")
(pinfunction "K")
(pintype "passive")
(uuid "5d3dee1a-61bb-4448-98f9-5b5c2708cd08")
......
(size 0.59 0.64)
(layers "F.Cu" "F.Mask" "F.Paste")
(roundrect_rratio 0.25)
(net 124 "/FPGA/POKEY3.P14")
(net 123 "/FPGA/POKEY3.P14")
(pinfunction "A")
(pintype "passive")
(uuid "099bb274-1731-473a-9570-b5bfd41de67e")
......
(size 0.8 0.95)
(layers "F.Cu" "F.Mask" "F.Paste")
(roundrect_rratio 0.25)
(net 21 "/Audio output/AUDINT")
(net 20 "/Audio output/AUDINT")
(pintype "passive")
(uuid "8fb8a1c0-339b-4fff-9387-1396e913f15b")
)
......
(size 0.59 0.64)
(layers "F.Cu" "F.Mask" "F.Paste")
(roundrect_rratio 0.25)
(net 7 "+3.3V")
(net 6 "+3.3V")
(pinfunction "K")
(pintype "passive")
(uuid "aafbcfa2-0612-42a7-994f-5ba1f0239756")
......
(size 0.59 0.64)
(layers "F.Cu" "F.Mask" "F.Paste")
(roundrect_rratio 0.25)
(net 130 "/FPGA/POKEY3.P4")
(net 129 "/FPGA/POKEY3.P4")
(pinfunction "A")
(pintype "passive")
(uuid "abddd045-7f21-404f-a0d9-8ec21b4ba8a9")
......
(size 0.8 0.95)
(layers "F.Cu" "F.Mask" "F.Paste")
(roundrect_rratio 0.25)
(net 83 "/Level shifter/POKEY5.P16")
(net 82 "/Level shifter/POKEY5.P16")
(pintype "passive")
(uuid "488f3c98-9d38-44ea-b122-cd2236579e9c")
)
......
(size 0.8 0.95)
(layers "F.Cu" "F.Mask" "F.Paste")
(roundrect_rratio 0.25)
(net 16 "+5V")
(net 15 "+5V")
(pintype "passive")
(uuid "e9ab4514-0c25-4cc4-8cd5-9552b7535749")
)
......
(size 0.59 0.64)
(layers "F.Cu" "F.Mask" "F.Paste")
(roundrect_rratio 0.25)
(net 7 "+3.3V")
(net 6 "+3.3V")
(pinfunction "K")
(pintype "passive")
(uuid "cfc29aa2-37bf-4f11-b7ab-7987589a90e5")
......
(size 0.59 0.64)
(layers "F.Cu" "F.Mask" "F.Paste")
(roundrect_rratio 0.25)
(net 96 "/FPGA/POKEY3.P39")
(net 95 "/FPGA/POKEY3.P39")
(pinfunction "A")
(pintype "passive")
(uuid "d2db3baf-bb38-4f9f-8a95-11356655523e")
......
(size 0.59 0.64)
(layers "F.Cu" "F.Mask" "F.Paste")
(roundrect_rratio 0.25)
(net 7 "+3.3V")
(net 6 "+3.3V")
(pinfunction "K")
(pintype "passive")
(uuid "4c83b9f1-9064-4c81-a9e4-8b1954da9a88")
......
(size 0.59 0.64)
(layers "F.Cu" "F.Mask" "F.Paste")
(roundrect_rratio 0.25)
(net 110 "/FPGA/POKEY3.P7")
(net 109 "/FPGA/POKEY3.P7")
(pinfunction "A")
(pintype "passive")
(uuid "00c69115-2fcf-4e47-81d3-17f683d56ca8")
......
(size 0.54 0.64)
(layers "F.Cu" "F.Mask" "F.Paste")
(roundrect_rratio 0.25)
(net 71 "/Level shifter/POKEY5.P40")
(net 70 "/Level shifter/POKEY5.P40")
(pintype "passive")
(uuid "628f3bc5-4eb7-44de-a46d-148e6c861d9b")
)
......
(size 0.54 0.64)
(layers "F.Cu" "F.Mask" "F.Paste")
(roundrect_rratio 0.25)
(net 112 "/FPGA/POKEY3.P40")
(net 111 "/FPGA/POKEY3.P40")
(pintype "passive")
(uuid "e24761e8-d196-4444-9867-3cd66ce03b95")
)
......
(at -1.11125 0)
(size 0.8763 0.3048)
(layers "F.Cu" "F.Mask" "F.Paste")
(net 5 "GND")
(net 4 "GND")
(pinfunction "VCC-")
(pintype "power_in")
(uuid "1289b64a-4b75-4aa0-8c25-a57eac31e91a")
......
(at -1.11125 0.649986)
(size 0.8763 0.3048)
(layers "F.Cu" "F.Mask" "F.Paste")
(net 3 "Net-(U1-IN-)")
(net 2 "Net-(U1-IN-)")
(pinfunction "IN-")
(pintype "input")
(uuid "e8db82ad-df9a-4848-a011-04593c1547f9")
......
(at 1.11125 0.649999)
(size 0.8763 0.3048)
(layers "F.Cu" "F.Mask" "F.Paste")
(net 11 "/Audio output/AUD_INT_OUT")
(net 10 "/Audio output/AUD_INT_OUT")
(pinfunction "OUT")
(pintype "output")
(uuid "8672dab3-474d-46c7-81bf-c3c90e299e7d")
......
(at 1.11125 -0.649999)
(size 0.8763 0.3048)
(layers "F.Cu" "F.Mask" "F.Paste")
(net 16 "+5V")
(net 15 "+5V")
(pinfunction "VCC+")
(pintype "power_in")
(uuid "7cadfa70-3acd-41f6-99fe-86552fdd65c6")
......
(size 0.59 0.64)
(layers "F.Cu" "F.Mask" "F.Paste")
(roundrect_rratio 0.25)
(net 7 "+3.3V")
(net 6 "+3.3V")
(pinfunction "K")
(pintype "passive")
(uuid "393e1420-bfc1-4c2f-8596-3036ab8ad6d3")
......
(size 0.59 0.64)
(layers "F.Cu" "F.Mask" "F.Paste")
(roundrect_rratio 0.25)
(net 116 "/FPGA/POKEY3.P5")
(net 115 "/FPGA/POKEY3.P5")
(pinfunction "A")
(pintype "passive")
(uuid "970e8ce3-86e2-488c-8be5-b7378a4d55cb")
......
(size 0.54 0.64)
(layers "F.Cu" "F.Mask" "F.Paste")
(roundrect_rratio 0.25)
(net 87 "/Level shifter/POKEY5.P9")
(net 86 "/Level shifter/POKEY5.P9")
(pintype "passive")
(uuid "2dffb603-cf4b-48cc-92c8-31c84e97c22f")
)
......
(size 0.54 0.64)
(layers "F.Cu" "F.Mask" "F.Paste")
(roundrect_rratio 0.25)
(net 132 "/FPGA/POKEY3.P9")
(net 131 "/FPGA/POKEY3.P9")
(pintype "passive")
(uuid "ea02a01d-b6cf-4b54-9937-8ba078f563cf")
)
......
(size 0.54 0.64)
(layers "F.Cu" "F.Mask" "F.Paste")
(roundrect_rratio 0.25)
(net 61 "/Level shifter/POKEY5.P4")
(net 60 "/Level shifter/POKEY5.P4")
(pintype "passive")
(uuid "b1351c4f-ee48-42c1-9529-5a249623b3fe")
)
......
(size 0.54 0.64)
(layers "F.Cu" "F.Mask" "F.Paste")
(roundrect_rratio 0.25)
(net 130 "/FPGA/POKEY3.P4")
(net 129 "/FPGA/POKEY3.P4")
(pintype "passive")
(uuid "68c0d4e4-c841-4c83-be92-9325735e6ce3")
)
......
(size 0.54 0.64)
(layers "F.Cu" "F.Mask" "F.Paste")
(roundrect_rratio 0.25)
(net 91 "/Level shifter/POKEY5.P14")
(net 90 "/Level shifter/POKEY5.P14")
(pintype "passive")
(uuid "f243bc7c-d7fd-4a23-b21f-1a0e8549a128")
)
... This diff was truncated because it exceeds the maximum size that can be displayed.

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