/atari_chips/pokeyv2/pll.cmp - Annotate - EclaireXL - 64kib

repo2/atari_chips/pokeyv2/pll.cmp @ 1476

-            markw
+--Copyright (C) 2024  Intel Corporation. All rights reserved.
-            markw
+--Your use of Intel Corporation's design tools, logic functions
-            markw
+--and other software and tools, and any partner logic
-            markw
+--functions, and any output files from any of the foregoing
 --(including device programming or simulation files), and any
 --associated documentation or information are expressly subject
 --to the terms and conditions of the Intel Program License
 --Subscription Agreement, the Intel Quartus Prime License Agreement,
-            markw
+--the Intel FPGA IP License Agreement, or other applicable license
 --agreement, including, without limitation, that your use is for
 --the sole purpose of programming logic devices manufactured by
 --Intel and sold by Intel or its authorized distributors.  Please
-            markw
+--refer to the applicable agreement for further details, at
 --https://fpgasoftware.intel.com/eula.
             markw
 component pll
 	PORT
+	(
 		inclk0		: IN STD_LOGIC  := '0';
 		c0		: OUT STD_LOGIC ;
-            markw
+		c1		: OUT STD_LOGIC ;
-            markw
+		c2		: OUT STD_LOGIC ;
-            markw
+		locked		: OUT STD_LOGIC
 	);
 end component;