repo2/atari_chips/pokeyv2/PSG/volume.vhdl @ 1476
| 1009 | markw | ---------------------------------------------------------------------------
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-- (c) 2020 mark watson
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-- I am happy for anyone to use this for non-commercial use.
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-- If my vhdl files are used commercially or otherwise sold,
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-- please contact me for explicit permission at scrameta (gmail).
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-- This applies for source and binary form and derived works.
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---------------------------------------------------------------------------
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LIBRARY ieee;
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USE ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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| 1036 | markw | ENTITY PSG_volume IS
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| 1009 | markw | PORT
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(
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CLK : IN STD_LOGIC;
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RESET_N : IN STD_LOGIC;
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ENABLE : IN STD_LOGIC;
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CHANNEL : IN STD_LOGIC;
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FIXED : IN STD_LOGIC_VECTOR(4 downto 0);
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| 1038 | markw | ENVELOPE : IN STD_LOGIC_VECTOR(4 downto 0);
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| 1009 | markw | ||
| 1220 | markw | VOL_OUT : OUT STD_LOGIC_VECTOR(4 downto 0);
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CHANGED : OUT STD_LOGIC
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| 1009 | markw | );
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| 1036 | markw | END PSG_volume;
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| 1009 | markw | ||
| 1036 | markw | ARCHITECTURE vhdl OF PSG_volume IS
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| 1038 | markw | signal vol_reg: std_logic_vector(4 downto 0);
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signal vol_next: std_logic_vector(4 downto 0);
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| 1220 | markw | signal changed_reg: std_logic;
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signal changed_next: std_logic;
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| 1009 | markw | BEGIN
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-- register
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process(clk, reset_n)
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begin
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if (reset_n = '0') then
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vol_reg <= (others=>'0');
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| 1220 | markw | changed_reg <= '1';
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| 1009 | markw | elsif (clk'event and clk='1') then
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vol_reg <= vol_next;
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| 1220 | markw | changed_reg <= changed_next;
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| 1009 | markw | end if;
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end process;
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-- next state
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| 1220 | markw | process(vol_reg,vol_next,enable,channel,fixed,envelope)
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| 1038 | markw | variable channelext : std_logic_vector(4 downto 0);
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| 1009 | markw | begin
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vol_next <= vol_reg;
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| 1220 | markw | changed_next <= '0';
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if (vol_next /=vol_reg) then
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changed_next <= '1';
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end if;
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| 1009 | markw | ||
if (enable = '1') then
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| 1038 | markw | channelext := (others=>channel);
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| 1009 | markw | if (fixed(4)='0') then --fixed
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| 1038 | markw | vol_next <= fixed(3 downto 0)&fixed(0) and channelext;
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| 1009 | markw | else
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| 1038 | markw | vol_next <= envelope and channelext;
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| 1009 | markw | end if;
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end if;
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end process;
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-- output
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vol_out <= vol_reg;
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| 1220 | markw | changed <= changed_reg;
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| 1009 | markw | ||
END vhdl;
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