repo2/ultimate_cart/veronica/FT816_tb.v @ 1475
| 438 | markw | ||
module FT816_tb();
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reg [5:0] btn;
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reg [5:0] prev_state;
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reg clk;
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always #10 clk <= ~clk;
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initial begin
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#1 clk <= 1'b0;
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#50 btn <= 6'h00;
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#50 btn <= 6'h3D;
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#20000 btn[1] <= 1'b1;
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#2000 btn[1] <= 1'b0;
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end
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FT816Sys2 u1
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(
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.btn(btn),
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.xclk(clk),
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.Led(),
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.sw(8'h00)
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);
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always @(posedge clk)
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begin
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prev_state <= u1.u1.u1.state;
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if (prev_state != u1.u1.u1.state) begin
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$display("%d %c ad=%h db=%h pc=%h ir=%h %s", $time, u1.u1.u1.rw ? " " : "W",
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u1.u1.u1.ad, u1.u1.u1.db,
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u1.u1.u1.pc, u1.u1.u1.ir, u1.u1.u1.fnStateName(u1.u1.u1.state));
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end
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end
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endmodule
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