Revision 1457
Added by markw 8 months ago
atari_chips/pokeyv2/init.c | ||
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-- 5-7 reserved
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POST_DIVIDE_NEXT <= flash_do(15 downto 8);
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GTIA_DIVIDE_NEXT <= flash_do(19 downto 16);
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-- 23 downto 20 reserved
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ADC_VOLUME_NEXT <= flash_do_slow(21 downto 20);
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SIO_DATA_VOLUME_NEXT <= flash_do_slow(23 downto 22);
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PSG_FREQ_NEXT <= flash_do(25 downto 24);
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PSG_STEREOMODE_NEXT <= flash_do(27 downto 26);
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PSG_ENVELOPE16_NEXT <= flash_do(28);
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... | ... | |
int irq_en = 0;
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int detect_right = 1;
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int pal = 1;
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int sio_data_volume = 2;
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int adc_volume = 3;
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buffer[0] |= (saturate&3)<<0;
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buffer[0] |= (channel_mode&1)<<2;
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buffer[0] |= (irq_en&1)<<3;
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... | ... | |
buffer[1] |= (post_divide&0xff)<<0;
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int gtia_enable = 0b1100;
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buffer[2] |= (gtia_enable&0xf)<<0;
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buffer[2] |= (adc_volume&0x3)<<4;
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buffer[2] |= (sio_data_volume&0x3)<<6;
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int psg_freq = 0;
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int psg_stereomode = 1;
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int psg_envelope16 = 0;
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atari_chips/pokeyv2/pokeycfg.c | ||
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#define CORE_RESTRICT 4
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#define CORE_OUTPUT 5
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#define CORE_PHI 6
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#define CORE_MAX 6
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#define CORE_ADC 7
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#define CORE_SIO_DATA 8
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#define CORE_MAX 8
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#define SID_TYPE 1
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#define SID_MAX 1
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... | ... | |
revers(activeLine==CORE_PHI);
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cprintf("PHI2->1MHz : %s",((val&32)==32) ? "PAL (5/9)" : "NTSC (4/7)");
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break;
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#ifndef SIDMAX
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case CORE_ADC:
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revers(activeLine==CORE_ADC);
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val = ((*flash1)>>20)&0x3;
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if (val == 3) val = 4;
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cprintf("ADC volume : %dx",val);
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break;
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case CORE_SIO_DATA:
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revers(activeLine==CORE_SIO_DATA);
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val = ((*flash1)>>22)&0x3;
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if (val == 3) val = 4;
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cprintf("SIO DATA vol : %dx",val);
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break;
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#endif
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}
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break;
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case MODE_POKEY: // pokey
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... | ... | |
clrscr();
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//textcolor(0xa);
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chline(40);
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cprintf(PRODUCT " config v1.4 ");
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cprintf(PRODUCT " config v1.5 ");
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cprintf(" Core:");
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for (i=0;i!=8;++i)
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{
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... | ... | |
case CORE_PHI:
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shift = 5;
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break;
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case CORE_ADC:
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shift = 20;
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mask = 3;
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max = 3;
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break;
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case CORE_SIO_DATA:
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shift = 22;
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mask = 3;
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max = 3;
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break;
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}
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break;
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case MODE_POKEY:
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... | ... | |
// -- 5-7 reserved
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// POST_DIVIDE_NEXT <= flash_do(15 downto 8);
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// GTIA_ENABLE_NEXT <= flash_do(19 downto 16);
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// -- 23 downto 20 reserved
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// ADC_VOLUME_NEXT <= flash_do_slow(21 downto 20);
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// SIO_DATA_VOLUME_NEXT <= flash_do_slow(23 downto 22);
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// PSG_FREQ_NEXT <= flash_do(25 downto 24);
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// PSG_STEREOMODE_NEXT <= flash_do(27 downto 26);
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// PSG_ENVELOPE16_NEXT <= flash_do(28);
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atari_chips/pokeyv2/pokeymax.vhd | ||
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signal SATURATE_REG : std_logic;
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signal POST_DIVIDE_REG : std_logic_vector(7 downto 0);
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signal GTIA_ENABLE_REG : std_logic_vector(3 downto 0);
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signal ADC_VOLUME_REG : std_logic_vector(1 downto 0);
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signal SIO_DATA_VOLUME_REG : std_logic_vector(1 downto 0);
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signal VERSION_LOC_REG : std_logic_vector(2 downto 0);
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signal PAL_REG : std_logic;
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... | ... | |
signal SATURATE_NEXT : std_logic;
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signal POST_DIVIDE_NEXT : std_logic_vector(7 downto 0);
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signal GTIA_ENABLE_NEXT : std_logic_vector(3 downto 0);
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signal ADC_VOLUME_NEXT : std_logic_vector(1 downto 0);
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signal SIO_DATA_VOLUME_NEXT : std_logic_vector(1 downto 0);
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signal VERSION_LOC_NEXT : std_logic_vector(2 downto 0);
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signal PAL_NEXT : std_logic;
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... | ... | |
end if;
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POST_DIVIDE_REG <= "10100000"; -- 1/2 5v, 3/4 1v
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GTIA_ENABLE_REG <= "1100"; -- external only
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ADC_VOLUME_REG <= "11"; -- 0=silent,1=1x,2=2x,3=4x
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SIO_DATA_VOLUME_REG <= "10"; -- 0=silent,1=quieter,2=normal,3=louder
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CONFIG_ENABLE_REG <= '0';
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VERSION_LOC_REG <= (others=>'0');
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PAL_REG <= '1';
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... | ... | |
SATURATE_REG <= SATURATE_NEXT;
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POST_DIVIDE_REG <= POST_DIVIDE_NEXT;
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GTIA_ENABLE_REG <= GTIA_ENABLE_NEXT;
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ADC_VOLUME_REG <= ADC_VOLUME_NEXT;
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SIO_DATA_VOLUME_REG <= SIO_DATA_VOLUME_NEXT;
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CONFIG_ENABLE_REG <= CONFIG_ENABLE_NEXT;
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VERSION_LOC_REG <= VERSION_LOC_NEXT;
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PAL_REG <= PAL_NEXT;
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... | ... | |
CONFIG_ENABLE_REG,
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POST_DIVIDE_REG,
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GTIA_ENABLE_REG,
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ADC_VOLUME_REG,
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SIO_DATA_VOLUME_REG,
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VERSION_LOC_REG,
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PSG_FREQ_REG,
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PSG_STEREOMODE_REG,
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... | ... | |
POST_DIVIDE_NEXT <= POST_DIVIDE_REG;
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GTIA_ENABLE_NEXT <= GTIA_ENABLE_REG;
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ADC_VOLUME_NEXT <= ADC_VOLUME_REG;
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SIO_DATA_VOLUME_NEXT <= SIO_DATA_VOLUME_REG;
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CONFIG_ENABLE_NEXT <= CONFIG_ENABLE_REG;
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... | ... | |
-- 6-7 reserved
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POST_DIVIDE_NEXT <= flash_do_slow(15 downto 8);
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GTIA_ENABLE_NEXT <= flash_do_slow(19 downto 16);
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-- 23 downto 20 reserved
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ADC_VOLUME_NEXT <= flash_do_slow(21 downto 20);
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SIO_DATA_VOLUME_NEXT <= flash_do_slow(23 downto 22);
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PSG_FREQ_NEXT <= flash_do_slow(25 downto 24);
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PSG_STEREOMODE_NEXT <= flash_do_slow(27 downto 26);
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PSG_ENVELOPE16_NEXT <= flash_do_slow(28);
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... | ... | |
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if (addr_decoded4(3)='1') then
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GTIA_ENABLE_NEXT <= WRITE_DATA(3 downto 0);
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ADC_VOLUME_NEXT <= WRITE_DATA(5 downto 4);
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SIO_DATA_VOLUME_NEXT <= WRITE_DATA(7 downto 6);
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end if;
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if (addr_decoded4(4)='1') then
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... | ... | |
if (addr_decoded4(3)='1') then
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CONFIG_DO <= (others=>'0');
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CONFIG_DO(3 downto 0) <= GTIA_ENABLE_REG;
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--CONFIG_DO(7 downto 4) <= SIO_ENABLE_REG; -- if we implement
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if (enable_adc=1) then -- Should allow optimiser to remove since nothing else reads it
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CONFIG_DO(5 downto 4) <= ADC_VOLUME_REG;
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end if;
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CONFIG_DO(7 downto 6) <= SIO_DATA_VOLUME_REG;
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end if;
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if (addr_decoded4(4)='1') then
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... | ... | |
generic map (COUNT=>128)
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port map(clk=>CLK49152,reset_n=>reset_n,enable_in=>enable_reset_min_max_pre,enable_out=>enable_reset_min_max);
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process(adc_reg,adc_output,adc_valid)
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process(adc_reg,adc_output,adc_valid,ADC_VOLUME_REG)
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variable adc_shrunk : signed(20 downto 0);
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begin
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adc_next <= adc_reg;
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if (adc_valid='1') then
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adc_shrunk := signed(not(adc_output(20)) & adc_output(19 downto 0));
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adc_next <= adc_shrunk(18 downto (18-16+1)); --*2
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case ADC_VOLUME_REG is
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when "01" =>
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adc_next <= adc_shrunk(20 downto (20-16+1)); --*1
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when "10" =>
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adc_next <= adc_shrunk(19 downto (19-16+1)); --*2
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when "11" =>
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adc_next <= adc_shrunk(18 downto (18-16+1)); --*4
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when others =>
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adc_next <= (others=>'0');
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end case;
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end if;
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end process;
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... | ... | |
end if;
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end process;
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process(adc_reg,adc_enabled_reg,adc_out_signed,SIO_RXD_SYNC)
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process(adc_reg,adc_enabled_reg,adc_out_signed,SIO_RXD_SYNC,SIO_DATA_VOLUME_REG)
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begin
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adc_use_next <= adc_use_reg;
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if (adc_enabled_reg>=32) then
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adc_use_next <= adc_out_signed;
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else
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adc_use_next(11) <= SIO_RXD_SYNC;
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case SIO_DATA_VOLUME_REG is
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when "01" =>
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adc_use_next(10) <= SIO_RXD_SYNC;
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when "10" =>
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adc_use_next(11) <= SIO_RXD_SYNC;
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when "11" =>
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adc_use_next(12) <= SIO_RXD_SYNC;
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when others =>
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end case;
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end if;
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end process;
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... | ... | |
end generate adc_on;
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adc_off : if enable_adc=0 generate
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SIO_AUDIO(15 downto 12) <= (others=>'0');
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SIO_AUDIO(11) <= SIO_RXD_SYNC;
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SIO_AUDIO(10 downto 0) <= (others=>'0');
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process(SIO_DATA_VOLUME_REG)
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begin
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SIO_AUDIO(15 downto 0) <= (others=>'0');
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case SIO_DATA_VOLUME_REG is
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when "01" =>
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SIO_AUDIO(10) <= SIO_RXD_SYNC;
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when "10" =>
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SIO_AUDIO(11) <= SIO_RXD_SYNC;
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when "11" =>
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SIO_AUDIO(12) <= SIO_RXD_SYNC;
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when others =>
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end case;
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end process;
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end generate adc_off;
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paddle_lvds_on : if paddle_lvds=1 generate
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Also available in: Unified diff
Added volume for SIO DATA and ADC