Project

General

Profile

component paddle_gpio is
port (
dout : out std_logic_vector(7 downto 0); -- export
din : in std_logic_vector(7 downto 0) := (others => 'X'); -- export
pad_io : inout std_logic_vector(7 downto 0) := (others => 'X'); -- export
pad_io_b : inout std_logic_vector(7 downto 0) := (others => 'X'); -- export
oe : in std_logic_vector(7 downto 0) := (others => 'X') -- export
);
end component paddle_gpio;

(52-52/106)