Revision 127
Added by markw about 11 years ago
| common/components/scandoubler.vhdl | ||
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colour_enable : in std_logic;
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doubled_enable : in std_logic;
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scanlines_on : in std_logic := '0';
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-- GTIA interface
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colour_in : in std_logic_vector(7 downto 0);
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| ... | ... | |
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signal vga_hsync_reg : std_logic;
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signal vga_hsync_start : std_logic;
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signal vga_hsync_end : std_logic;
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signal vga_odd_reg : std_logic;
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signal vga_odd_next : std_logic;
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begin
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-- register
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| ... | ... | |
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buffer_select_reg <= '0';
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vga_hsync_reg <= '0';
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vga_odd_reg <= '0';
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elsif (clk'event and clk='1') then
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r_reg <= r_next;
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g_reg <= g_next;
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| ... | ... | |
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hsync_in_reg <= hsync_in;
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vga_hsync_reg <= vga_hsync_next;
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vga_odd_reg <= vga_odd_next;
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end if;
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end process;
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| ... | ... | |
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end process;
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-- output
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process(vga_hsync_reg,vga_hsync_end,output_address_reg,doubled_enable)
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process(vga_hsync_reg,vga_hsync_end,output_address_reg,doubled_enable,vga_odd_reg)
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begin
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output_address_next <= output_address_reg;
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vga_hsync_start<='0';
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vga_hsync_next <= vga_hsync_reg;
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vga_odd_next <= vga_odd_reg;
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if (doubled_enable = '1') then
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output_address_next <= std_logic_vector(unsigned(output_address_reg)+1);
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| ... | ... | |
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if (vga_hsync_end = '1') then
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vga_hsync_next <= '0';
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vga_odd_next <= not(vga_odd_reg);
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end if;
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end process;
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| ... | ... | |
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port map(clk=>clk,sync_reset=>'0',data_in=>vga_hsync_start,enable=>doubled_enable,reset_n=>reset_n,data_out=>vga_hsync_end);
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-- display
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process(colour_reg,vsync_reg,vga_hsync_reg,hsync_reg,colour_in,vsync_in,hsync_in,colour_enable,doubled_enable,vga,composite_on_hsync,buffer_select_reg,linea_out,lineb_out)
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process(colour_reg,vsync_reg,vga_hsync_reg,hsync_reg,colour_in,vsync_in,hsync_in,colour_enable,doubled_enable,vga,composite_on_hsync,buffer_select_reg,linea_out,lineb_out, scanlines_on, vga_odd_reg)
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begin
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colour_next <= colour_reg;
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vsync_next <= vsync_reg;
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| ... | ... | |
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else
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-- vga mode, store all inputs - then play back!
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if (buffer_select_reg = '0') then
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colour_next <= linea_out; -- todo, smoothly increase/decrease...
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if (scanlines_on ='1' and vga_odd_reg='1') then
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colour_next(7 downto 4) <= linea_out(7 downto 4);
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colour_next(3) <= '0';
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colour_next(2 downto 0) <= linea_out(3 downto 1);
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else
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colour_next <= linea_out;
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end if;
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else
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colour_next <= lineb_out;
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if (scanlines_on ='1' and vga_odd_reg='1') then
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colour_next(7 downto 4) <= lineb_out(7 downto 4);
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colour_next(3) <= '0';
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colour_next(2 downto 0) <= lineb_out(3 downto 1);
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else
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colour_next <= lineb_out;
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end if;
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end if;
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vsync_next <= not(vsync_in);
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Also available in: Unified diff
Added scanlines support