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<?xml version="1.0" encoding="UTF-8"?>
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<wave_config>
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<wave_state>
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</wave_state>
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<db_ref_list>
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<db_ref path="antic.wdb" id="1" type="auto">
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<top_modules>
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<top_module name="antic_tb" />
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<top_module name="attributes" />
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<top_module name="math_real" />
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<top_module name="numeric_std" />
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<top_module name="std_logic_1164" />
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<top_module name="std_logic_arith" />
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<top_module name="std_logic_misc" />
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<top_module name="std_logic_textio" />
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<top_module name="std_logic_unsigned" />
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<top_module name="textio" />
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</top_modules>
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</db_ref>
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</db_ref_list>
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<WVObjectSize size="36" />
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<wave_markers>
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<marker time="517213670600" label="" />
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</wave_markers>
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<wvobject fp_name="/antic_tb/reset_n" type="logic" db_ref_id="1">
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<obj_property name="ElementShortName">reset_n</obj_property>
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<obj_property name="ObjectShortName">reset_n</obj_property>
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</wvobject>
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<wvobject fp_name="/antic_tb/clk_a" type="logic" db_ref_id="1">
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<obj_property name="ElementShortName">clk_a</obj_property>
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<obj_property name="ObjectShortName">clk_a</obj_property>
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</wvobject>
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<wvobject fp_name="/antic_tb/cpu_addr" type="array" db_ref_id="1">
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<obj_property name="ElementShortName">cpu_addr[15:0]</obj_property>
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<obj_property name="ObjectShortName">cpu_addr[15:0]</obj_property>
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<obj_property name="Radix">HEXRADIX</obj_property>
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</wvobject>
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<wvobject fp_name="/antic_tb/cpu_data_in" type="array" db_ref_id="1">
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<obj_property name="ElementShortName">cpu_data_in[7:0]</obj_property>
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<obj_property name="ObjectShortName">cpu_data_in[7:0]</obj_property>
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<obj_property name="Radix">HEXRADIX</obj_property>
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</wvobject>
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<wvobject fp_name="/antic_tb/cpu_wr_en" type="logic" db_ref_id="1">
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<obj_property name="ElementShortName">cpu_wr_en</obj_property>
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<obj_property name="ObjectShortName">cpu_wr_en</obj_property>
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</wvobject>
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<wvobject fp_name="/antic_tb/memory_ready_antic" type="logic" db_ref_id="1">
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<obj_property name="ElementShortName">memory_ready_antic</obj_property>
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<obj_property name="ObjectShortName">memory_ready_antic</obj_property>
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</wvobject>
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<wvobject fp_name="/antic_tb/memory_ready_cpu" type="logic" db_ref_id="1">
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<obj_property name="ElementShortName">memory_ready_cpu</obj_property>
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<obj_property name="ObjectShortName">memory_ready_cpu</obj_property>
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</wvobject>
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<wvobject fp_name="/antic_tb/memory_data_in" type="array" db_ref_id="1">
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<obj_property name="ElementShortName">memory_data_in[7:0]</obj_property>
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<obj_property name="ObjectShortName">memory_data_in[7:0]</obj_property>
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<obj_property name="Radix">HEXRADIX</obj_property>
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</wvobject>
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<wvobject fp_name="/antic_tb/antic_enable_179" type="logic" db_ref_id="1">
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<obj_property name="ElementShortName">antic_enable_179</obj_property>
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<obj_property name="ObjectShortName">antic_enable_179</obj_property>
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</wvobject>
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<wvobject fp_name="/antic_tb/enable_179_memwait" type="logic" db_ref_id="1">
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<obj_property name="ElementShortName">enable_179_memwait</obj_property>
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<obj_property name="ObjectShortName">enable_179_memwait</obj_property>
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</wvobject>
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<wvobject fp_name="/antic_tb/cpu_shared_enable" type="logic" db_ref_id="1">
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<obj_property name="ElementShortName">cpu_shared_enable</obj_property>
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<obj_property name="ObjectShortName">cpu_shared_enable</obj_property>
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</wvobject>
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<wvobject fp_name="/antic_tb/an" type="array" db_ref_id="1">
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<obj_property name="ElementShortName">an[2:0]</obj_property>
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<obj_property name="ObjectShortName">an[2:0]</obj_property>
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<obj_property name="Radix">HEXRADIX</obj_property>
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</wvobject>
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<wvobject fp_name="/antic_tb/cc_out_orig" type="logic" db_ref_id="1">
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<obj_property name="ElementShortName">cc_out_orig</obj_property>
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<obj_property name="ObjectShortName">cc_out_orig</obj_property>
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</wvobject>
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<wvobject fp_name="/antic_tb/cc_out_used" type="logic" db_ref_id="1">
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<obj_property name="ElementShortName">cc_out_used</obj_property>
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<obj_property name="ObjectShortName">cc_out_used</obj_property>
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</wvobject>
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<wvobject fp_name="/antic_tb/cc_out_used_doubled" type="logic" db_ref_id="1">
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<obj_property name="ElementShortName">cc_out_used_doubled</obj_property>
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<obj_property name="ObjectShortName">cc_out_used_doubled</obj_property>
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</wvobject>
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<wvobject fp_name="/antic_tb/fetch" type="logic" db_ref_id="1">
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<obj_property name="ElementShortName">fetch</obj_property>
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<obj_property name="ObjectShortName">fetch</obj_property>
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</wvobject>
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<wvobject fp_name="/antic_tb/fetch_address" type="array" db_ref_id="1">
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<obj_property name="ElementShortName">fetch_address[15:0]</obj_property>
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<obj_property name="ObjectShortName">fetch_address[15:0]</obj_property>
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<obj_property name="Radix">HEXRADIX</obj_property>
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</wvobject>
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<wvobject fp_name="/antic_tb/refresh" type="logic" db_ref_id="1">
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<obj_property name="ElementShortName">refresh</obj_property>
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<obj_property name="ObjectShortName">refresh</obj_property>
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</wvobject>
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<wvobject fp_name="/antic_tb/antic1/hcount_out" type="array" db_ref_id="1">
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<obj_property name="ElementShortName">hcount_out[7:0]</obj_property>
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<obj_property name="ObjectShortName">hcount_out[7:0]</obj_property>
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<obj_property name="Radix">HEXRADIX</obj_property>
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</wvobject>
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<wvobject fp_name="/antic_tb/antic1/vcount_out" type="array" db_ref_id="1">
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<obj_property name="ElementShortName">vcount_out[8:0]</obj_property>
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<obj_property name="ObjectShortName">vcount_out[8:0]</obj_property>
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<obj_property name="Radix">HEXRADIX</obj_property>
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</wvobject>
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<wvobject fp_name="/antic_tb/antic1/dma_clock_character_name" type="logic" db_ref_id="1">
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<obj_property name="ElementShortName">dma_clock_character_name</obj_property>
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<obj_property name="ObjectShortName">dma_clock_character_name</obj_property>
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</wvobject>
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<wvobject fp_name="/antic_tb/antic1/dma_clock_character_inc" type="logic" db_ref_id="1">
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<obj_property name="ElementShortName">dma_clock_character_inc</obj_property>
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<obj_property name="ObjectShortName">dma_clock_character_inc</obj_property>
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</wvobject>
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<wvobject fp_name="/antic_tb/antic1/dma_clock_bitmap_data" type="logic" db_ref_id="1">
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<obj_property name="ElementShortName">dma_clock_bitmap_data</obj_property>
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<obj_property name="ObjectShortName">dma_clock_bitmap_data</obj_property>
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</wvobject>
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<wvobject fp_name="/antic_tb/antic1/dma_clock_character_data" type="logic" db_ref_id="1">
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<obj_property name="ElementShortName">dma_clock_character_data</obj_property>
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<obj_property name="ObjectShortName">dma_clock_character_data</obj_property>
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</wvobject>
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<wvobject fp_name="/antic_tb/antic1/character_reg" type="array" db_ref_id="1">
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<obj_property name="ElementShortName">character_reg[7:0]</obj_property>
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<obj_property name="ObjectShortName">character_reg[7:0]</obj_property>
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<obj_property name="Radix">HEXRADIX</obj_property>
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</wvobject>
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<wvobject fp_name="/antic_tb/antic1/displayed_character_reg" type="array" db_ref_id="1">
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<obj_property name="ElementShortName">displayed_character_reg[7:0]</obj_property>
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<obj_property name="ObjectShortName">displayed_character_reg[7:0]</obj_property>
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<obj_property name="Radix">HEXRADIX</obj_property>
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</wvobject>
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<wvobject fp_name="/antic_tb/antic1/character_reg" type="array" db_ref_id="1">
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<obj_property name="ElementShortName">character_reg[7:0]</obj_property>
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<obj_property name="ObjectShortName">character_reg[7:0]</obj_property>
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<obj_property name="Radix">HEXRADIX</obj_property>
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</wvobject>
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<wvobject fp_name="/antic_tb/antic1/display_shift_reg" type="array" db_ref_id="1">
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<obj_property name="ElementShortName">display_shift_reg[7:0]</obj_property>
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<obj_property name="ObjectShortName">display_shift_reg[7:0]</obj_property>
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<obj_property name="Radix">HEXRADIX</obj_property>
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</wvobject>
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<wvobject fp_name="/antic_tb/antic1/instruction_reg" type="array" db_ref_id="1">
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<obj_property name="ElementShortName">instruction_reg[7:0]</obj_property>
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<obj_property name="ObjectShortName">instruction_reg[7:0]</obj_property>
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<obj_property name="Radix">HEXRADIX</obj_property>
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</wvobject>
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<wvobject fp_name="/antic_tb/antic1/line_buffer_address_reg" type="array" db_ref_id="1">
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<obj_property name="ElementShortName">line_buffer_address_reg[7:0]</obj_property>
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<obj_property name="ObjectShortName">line_buffer_address_reg[7:0]</obj_property>
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<obj_property name="Radix">HEXRADIX</obj_property>
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</wvobject>
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<wvobject fp_name="/antic_tb/antic1/line_buffer_write" type="logic" db_ref_id="1">
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<obj_property name="ElementShortName">line_buffer_write</obj_property>
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<obj_property name="ObjectShortName">line_buffer_write</obj_property>
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</wvobject>
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<wvobject fp_name="/antic_tb/antic1/enable_shift" type="logic" db_ref_id="1">
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<obj_property name="ElementShortName">enable_shift</obj_property>
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<obj_property name="ObjectShortName">enable_shift</obj_property>
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</wvobject>
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<wvobject fp_name="/antic_tb/antic1/playfield_load" type="logic" db_ref_id="1">
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<obj_property name="ElementShortName">playfield_load</obj_property>
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<obj_property name="ObjectShortName">playfield_load</obj_property>
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</wvobject>
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<wvobject fp_name="/antic_tb/antic1/delay_display_shift_reg" type="array" db_ref_id="1">
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<obj_property name="ElementShortName">delay_display_shift_reg[24:0]</obj_property>
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<obj_property name="ObjectShortName">delay_display_shift_reg[24:0]</obj_property>
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<obj_property name="Radix">HEXRADIX</obj_property>
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</wvobject>
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<wvobject fp_name="/antic_tb/antic1/antic_ready" type="logic" db_ref_id="1">
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<obj_property name="ElementShortName">antic_ready</obj_property>
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<obj_property name="ObjectShortName">antic_ready</obj_property>
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</wvobject>
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<wvobject fp_name="/antic_tb/antic1/wsync_delay/data_in" type="logic" db_ref_id="1">
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<obj_property name="ElementShortName">data_in</obj_property>
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<obj_property name="ObjectShortName">data_in</obj_property>
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</wvobject>
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</wave_config>
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