Revision 1096
Added by markw about 5 years ago
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END pia;
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ARCHITECTURE vhdl OF pia IS
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component synchronizer IS
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PORT
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(
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CLK : IN STD_LOGIC;
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RAW : IN STD_LOGIC;
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SYNC : OUT STD_LOGIC
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);
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END component;
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COMPONENT complete_address_decoder IS
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generic (width : natural := 1);
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PORT
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signal cb2_edge_reg : std_logic;
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begin
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ca1_synchronizer : synchronizer
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port map (clk=>clk, raw=>CA1, sync=>CA1_SYNC);
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ca2_synchronizer : synchronizer
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port map (clk=>clk, raw=>CA2_IN, sync=>CA2_IN_SYNC);
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cb1_synchronizer : synchronizer
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port map (clk=>clk, raw=>CB1, sync=>CB1_SYNC);
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cb2_synchronizer : synchronizer
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port map (clk=>clk, raw=>CB2_IN, sync=>CB2_IN_SYNC);
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-- register
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process(clk,reset_n)
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begin
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irqa_reg <= irqa_next;
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irqb_reg <= irqb_next;
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CA1_reg <= CA1;
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CA2_reg <= CA2_in;
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CB1_reg <= CB1;
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CB2_reg <= CB2_in;
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CA1_reg <= CA1_SYNC;
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CA2_reg <= CA2_in_SYNC;
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CB1_reg <= CB1_SYNC;
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CB2_reg <= CB2_in_SYNC;
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CA2_output_reg <= CA2_output_next;
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CB2_output_reg <= CB2_output_next;
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| ... | ... | |
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-- irq handing
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-- TODO REVIEW, this stuff is complicated! I think Atari does not need it anyway...
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process (irqa_reg, porta_control_next, porta_control_reg, read_ora, write_ora, ca2_output_reg, CA1, CA1_reg, ca2_in, ca2_reg, ca1_edge_reg, ca2_edge_reg)
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process (irqa_reg, porta_control_next, porta_control_reg, read_ora, write_ora, ca2_output_reg, CA1_SYNC, CA1_reg, ca2_in_SYNC, ca2_reg, ca1_edge_reg, ca2_edge_reg)
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begin
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irqa_next(1) <= irqa_reg(1) and not(read_ora);
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irqa_next(0) <= irqa_reg(0) and not(read_ora);
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ca2_output_next <= ca2_output_reg;
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if (CA1 = '1' and CA1_reg = '0') then
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if (CA1_SYNC = '1' and CA1_reg = '0') then
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irqa_next(1) <= ca1_edge_reg;
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end if;
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if (CA1 = '0' and CA1_reg = '1') then
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if (CA1_SYNC = '0' and CA1_reg = '1') then
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irqa_next(1) <= not(ca1_edge_reg);
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end if;
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if (CA2_in = '1' and CA2_reg = '0') then
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if (CA2_in_SYNC = '1' and CA2_reg = '0') then
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irqa_next(0) <= ca2_edge_reg;
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end if;
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if (CA2_in = '0' and CA2_reg = '1') then
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if (CA2_in_SYNC = '0' and CA2_reg = '1') then
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irqa_next(0) <= not(ca2_edge_reg);
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end if;
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| ... | ... | |
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end process;
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process (irqb_reg, portb_control_next, portb_control_reg, read_orb, write_orb, cb2_output_reg, CB1, CB1_reg, cb2_in, cb2_reg, cb1_edge_reg, cb2_edge_reg)
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process (irqb_reg, portb_control_next, portb_control_reg, read_orb, write_orb, cb2_output_reg, CB1_SYNC, CB1_reg, cb2_in_SYNC, cb2_reg, cb1_edge_reg, cb2_edge_reg)
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begin
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irqb_next(1) <= irqb_reg(1) and not(read_orb);
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irqb_next(0) <= irqb_reg(0) and not(read_orb);
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cb2_output_next <= cb2_output_reg;
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if (CB1 = '1' and CB1_reg = '0') then
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if (CB1_SYNC = '1' and CB1_reg = '0') then
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irqb_next(1) <= cb1_edge_reg;
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end if;
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if (CB1 = '0' and CB1_reg = '1') then
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if (CB1_SYNC = '0' and CB1_reg = '1') then
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irqb_next(1) <= not(cb1_edge_reg);
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end if;
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if (CB2_in = '1' and CB2_reg = '0') then
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if (CB2_in_SYNC = '1' and CB2_reg = '0') then
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irqb_next(0) <= cb2_edge_reg;
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end if;
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if (CB2_in = '0' and CB2_reg = '1') then
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if (CB2_in_SYNC = '0' and CB2_reg = '1') then
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irqb_next(0) <= not(cb2_edge_reg);
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end if;
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Also available in: Unified diff
Added sychronizer to pia