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LIBRARY ieee;
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USE ieee.std_logic_1164.all;
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USE ieee.numeric_std.all;
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ENTITY sram_mux IS
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PORT (
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clk : in std_logic;
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clk7x : in std_logic;
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reset_n : in std_logic;
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sram_addr : out std_logic_vector(19 downto 0);
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sram_data_out : out std_logic_vector(7 downto 0);
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sram_drive_data : out std_logic;
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sram_we_n : out std_logic;
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atari_bus_request : in std_logic;
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atari_sram_select : in std_logic;
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atari_address : in std_logic_vector(16 downto 0);
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atari_w_n : in std_logic;
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atari_write_data : in std_logic_vector(7 downto 0);
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veronica_address : in std_logic_vector(16 downto 0);
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veronica_sram_select : in std_logic;
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veronica_w_n : in std_logic;
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veronica_write_data : in std_logic_vector(7 downto 0)
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);
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END sram_mux;
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ARCHITECTURE vhdl OF sram_mux IS
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signal sram_we_n_next : std_logic;
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signal sram_we_n_reg : std_logic;
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signal sram_drive_data_next : std_logic;
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signal sram_drive_data_reg : std_logic;
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signal sram_write_data_next : std_logic_vector(7 downto 0);
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signal sram_write_data_reg : std_logic_vector(7 downto 0);
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signal tick_next : std_logic;
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signal tick_reg : std_logic;
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signal tick_last_fast_next : std_logic;
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signal tick_last_fast_reg : std_logic;
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signal tick_fast_next : std_logic_vector(6 downto 0);
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signal tick_fast_reg : std_logic_vector(6 downto 0);
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signal tick_mask : std_logic_vector(6 downto 0);
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begin
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-- Back to back writes from 65816?
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process(veronica_address, veronica_write_data, veronica_w_n, veronica_sram_select,
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atari_bus_request, atari_address,atari_write_data, atari_w_n, atari_sram_select, tick_fast_reg,
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sram_we_n_next)
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begin
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sram_addr <= (others=>'0');
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sram_write_data_next <= (others=>'0');
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sram_drive_data_next <= '0';
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if (atari_bus_request='1') then
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sram_addr(16 downto 0) <= atari_address;
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sram_write_data_next <= atari_write_data;
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sram_we_n_next <= (atari_w_n or not(atari_sram_select) or tick_fast_reg(6));
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else
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sram_addr(16 downto 0) <= veronica_address;
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sram_write_data_next <= veronica_write_data;
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sram_we_n_next <= (veronica_w_n or not(veronica_sram_select) or tick_fast_reg(6));
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end if;
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sram_drive_data_next <= not(sram_we_n_next or tick_fast_reg(0) or tick_fast_reg(1) or tick_fast_reg(6));
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end process;
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--
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-- 12345
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-- 01111
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-- 00000
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process(clk,reset_n)
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begin
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if (reset_n='0') then
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tick_reg <= '0';
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elsif (clk'event and clk='1') then
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tick_reg <= tick_next;
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end if;
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end process;
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tick_next <= not(tick_reg);
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process(clk7x,reset_n)
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begin
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if (reset_n='0') then
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tick_fast_reg <= (others=>'0');
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tick_last_fast_reg <= '0';
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sram_we_n_reg <= '1';
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sram_drive_data_reg <= '0';
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sram_write_data_reg <= (others=>'0');
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elsif (clk7x'event and clk7x='1') then
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tick_fast_reg <= tick_fast_next;
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tick_last_fast_reg <= tick_last_fast_next;
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sram_we_n_reg <= sram_we_n_next;
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sram_drive_data_reg <= sram_drive_data_next;
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sram_write_data_reg <= sram_write_data_next;
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end if;
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end process;
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tick_last_fast_next <= tick_reg;
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tick_fast_next <= tick_fast_reg(5 downto 1)&(tick_reg xor tick_last_fast_reg)&tick_fast_reg(6);
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-- 55 addr, 45 write pulse, 20 we -> drive
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-- 71.4 total -> 7x clock-> about 10ns
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-- 10 (we high), 60 (we low) 1 000 000
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-- 30 (no drive), 40 (drive) 0 001 111
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sram_we_n <= sram_we_n_reg;
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sram_drive_data <= sram_drive_data_reg;
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sram_data_out <= sram_write_data_reg;
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end vhdl;
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