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# -------------------------------------------------------------------------- #
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#
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# Copyright (C) 1991-2009 Altera Corporation
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# Your use of Altera Corporation's design tools, logic functions
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# and other software and tools, and its AMPP partner logic
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# functions, and any output files from any of the foregoing
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# (including device programming or simulation files), and any
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# associated documentation or information are expressly subject
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# to the terms and conditions of the Altera Program License
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# Subscription Agreement, Altera MegaCore Function License
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# Agreement, or other applicable license agreement, including,
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# without limitation, that your use is for the sole purpose of
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# programming logic devices manufactured by Altera and sold by
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# Altera or its authorized distributors. Please refer to the
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# applicable agreement for further details.
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#
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# -------------------------------------------------------------------------- #
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#
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# Quartus II
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# Version 9.0 Build 132 02/25/2009 SJ Web Edition
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# Date created = 20:12:08 December 25, 2009
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#
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# -------------------------------------------------------------------------- #
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#
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# Notes:
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#
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# 1) The default values for assignments are stored in the file:
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# atari5200core_mcc_assignment_defaults.qdf
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# If this file doesn't exist, see file:
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# assignment_defaults.qdf
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#
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# 2) Altera recommends that you do not modify this file. This
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# file is updated automatically by the Quartus II software
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# and any changes you make may be lost or overwritten.
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#
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# -------------------------------------------------------------------------- #
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set_global_assignment -name DEVICE EP4CE15E22C7
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set_global_assignment -name FAMILY "Cyclone IV E"
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set_global_assignment -name TOP_LEVEL_ENTITY atari5200core_mcc
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set_global_assignment -name ORIGINAL_QUARTUS_VERSION 9.0
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set_global_assignment -name PROJECT_CREATION_TIME_DATE "20:12:08 DECEMBER 25, 2009"
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set_global_assignment -name LAST_QUARTUS_VERSION "13.0 SP1"
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set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
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set_global_assignment -name USE_GENERATED_PHYSICAL_CONSTRAINTS OFF -section_id eda_blast_fpga
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set_global_assignment -name CYCLONEII_OPTIMIZATION_TECHNIQUE SPEED
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set_global_assignment -name DEVICE_FILTER_PACKAGE "ANY QFP"
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set_global_assignment -name DEVICE_FILTER_PIN_COUNT 144
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set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 7
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set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
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set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
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set_global_assignment -name CYCLONEIII_CONFIGURATION_DEVICE EPCS128
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set_global_assignment -name GENERATE_RBF_FILE ON
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set_global_assignment -name FORCE_CONFIGURATION_VCCIO ON
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set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "3.3-V LVCMOS"
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set_global_assignment -name CYCLONEII_RESERVE_NCEO_AFTER_CONFIGURATION "USE AS REGULAR IO"
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set_global_assignment -name ALLOW_ANY_ROM_SIZE_FOR_RECOGNITION ON
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set_global_assignment -name RESERVE_DATA0_AFTER_CONFIGURATION "USE AS REGULAR IO"
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set_global_assignment -name RESERVE_DATA1_AFTER_CONFIGURATION "USE AS REGULAR IO"
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set_global_assignment -name RESERVE_FLASH_NCE_AFTER_CONFIGURATION "USE AS REGULAR IO"
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set_global_assignment -name RESERVE_DCLK_AFTER_CONFIGURATION "USE AS REGULAR IO"
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set_global_assignment -name FITTER_EFFORT "STANDARD FIT"
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set_global_assignment -name ENABLE_SIGNALTAP ON
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set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC OFF
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set_global_assignment -name SIMULATION_MODE TIMING
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set_location_assignment PIN_46 -to AUDIO_L
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set_location_assignment PIN_49 -to AUDIO_R
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set_location_assignment PIN_55 -to FPGA_CLK
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set_location_assignment PIN_42 -to SD_CLK
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set_location_assignment PIN_43 -to SD_CMD
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set_location_assignment PIN_44 -to SD_DAT3
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set_location_assignment PIN_52 -to SD_DAT0
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set_location_assignment PIN_59 -to SDRAM_A[0]
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set_location_assignment PIN_58 -to SDRAM_A[1]
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set_location_assignment PIN_51 -to SDRAM_A[2]
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set_location_assignment PIN_50 -to SDRAM_A[3]
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set_location_assignment PIN_132 -to SDRAM_A[4]
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set_location_assignment PIN_125 -to SDRAM_A[5]
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set_location_assignment PIN_121 -to SDRAM_A[6]
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set_location_assignment PIN_120 -to SDRAM_A[7]
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set_location_assignment PIN_119 -to SDRAM_A[8]
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set_location_assignment PIN_115 -to SDRAM_A[9]
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set_location_assignment PIN_60 -to SDRAM_A[10]
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set_location_assignment PIN_114 -to SDRAM_A[11]
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set_location_assignment PIN_113 -to SDRAM_A[12]
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set_location_assignment PIN_111 -to SDRAM_CLK
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set_location_assignment PIN_110 -to SDRAM_DQMH_n
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set_location_assignment PIN_71 -to SDRAM_DQML_n
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set_location_assignment PIN_106 -to SDRAM_DQ[8]
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set_location_assignment PIN_105 -to SDRAM_DQ[9]
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set_location_assignment PIN_104 -to SDRAM_DQ[10]
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set_location_assignment PIN_103 -to SDRAM_DQ[11]
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set_location_assignment PIN_101 -to SDRAM_DQ[12]
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set_location_assignment PIN_100 -to SDRAM_DQ[13]
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set_location_assignment PIN_99 -to SDRAM_DQ[14]
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set_location_assignment PIN_98 -to SDRAM_DQ[15]
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set_location_assignment PIN_72 -to SDRAM_DQ[7]
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set_location_assignment PIN_76 -to SDRAM_DQ[6]
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set_location_assignment PIN_77 -to SDRAM_DQ[5]
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set_location_assignment PIN_80 -to SDRAM_DQ[4]
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set_location_assignment PIN_83 -to SDRAM_DQ[3]
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set_location_assignment PIN_85 -to SDRAM_DQ[2]
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set_location_assignment PIN_86 -to SDRAM_DQ[1]
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set_location_assignment PIN_87 -to SDRAM_DQ[0]
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set_location_assignment PIN_68 -to SDRAM_CAS_n
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set_location_assignment PIN_66 -to SDRAM_CS_n
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set_location_assignment PIN_64 -to SDRAM_BA[1]
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set_location_assignment PIN_65 -to SDRAM_BA[0]
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set_location_assignment PIN_67 -to SDRAM_RAS_n
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set_location_assignment PIN_69 -to SDRAM_WE_n
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set_location_assignment PIN_112 -to SDRAM_CKE
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set_location_assignment PIN_144 -to VGA_G[0]
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set_location_assignment PIN_143 -to VGA_G[1]
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set_location_assignment PIN_142 -to VGA_G[2]
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set_location_assignment PIN_141 -to VGA_G[3]
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set_location_assignment PIN_137 -to VGA_B[0]
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set_location_assignment PIN_136 -to VGA_B[1]
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set_location_assignment PIN_135 -to VGA_B[2]
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set_location_assignment PIN_133 -to VGA_B[3]
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set_location_assignment PIN_12 -to CFG_CLK
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set_location_assignment PIN_8 -to CFG_CS_n
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set_location_assignment PIN_13 -to CFG_DIN
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set_location_assignment PIN_6 -to CFG_DOUT
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set_location_assignment PIN_31 -to dplus1
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set_location_assignment PIN_30 -to dminus1
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set_location_assignment PIN_33 -to dplus2
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set_location_assignment PIN_32 -to dminus2
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set_instance_assignment -name FAST_INPUT_REGISTER ON -to CFG_DIN
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set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to CFG_CLK
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to CFG_CS_n
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to CFG_DOUT
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_A
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_BA
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_CAS_n
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_CS_n
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQMH_n
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQML_n
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_RAS_n
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_WE_n
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to VGA_B
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to VGA_G
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to VGA_HS
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to VGA_R
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to VGA_VS
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set_instance_assignment -name IO_MAXIMUM_TOGGLE_RATE "0 MHz" -to VGA_B[3]
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set_global_assignment -name LL_ROOT_REGION ON -section_id "Root Region"
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set_global_assignment -name LL_MEMBER_STATE LOCKED -section_id "Root Region"
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set_global_assignment -name USE_SIGNALTAP_FILE atari.stp
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set_location_assignment PLL_2 -to "clk_reset:clk_rst_inst|pll_main:main_inst"
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set_instance_assignment -name CLOCK_TO_OUTPUT_DELAY 1 -to SDRAM_A[0]
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set_instance_assignment -name CLOCK_TO_OUTPUT_DELAY 1 -to SDRAM_A[1]
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set_instance_assignment -name CLOCK_TO_OUTPUT_DELAY 1 -to SDRAM_A[2]
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set_instance_assignment -name CLOCK_TO_OUTPUT_DELAY 1 -to SDRAM_A[3]
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set_instance_assignment -name CLOCK_TO_OUTPUT_DELAY 1 -to SDRAM_A[4]
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set_instance_assignment -name CLOCK_TO_OUTPUT_DELAY 1 -to SDRAM_A[5]
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set_instance_assignment -name CLOCK_TO_OUTPUT_DELAY 1 -to SDRAM_A[6]
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set_instance_assignment -name CLOCK_TO_OUTPUT_DELAY 1 -to SDRAM_A[8]
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set_instance_assignment -name CLOCK_TO_OUTPUT_DELAY 1 -to SDRAM_A[9]
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set_instance_assignment -name CLOCK_TO_OUTPUT_DELAY 1 -to SDRAM_A[10]
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set_instance_assignment -name CLOCK_TO_OUTPUT_DELAY 1 -to SDRAM_A[11]
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set_instance_assignment -name CLOCK_TO_OUTPUT_DELAY 1 -to SDRAM_DQ[0]
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set_instance_assignment -name CLOCK_TO_OUTPUT_DELAY 1 -to SDRAM_DQ[1]
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set_instance_assignment -name CLOCK_TO_OUTPUT_DELAY 1 -to SDRAM_DQ[2]
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set_instance_assignment -name CLOCK_TO_OUTPUT_DELAY 1 -to SDRAM_DQ[6]
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set_instance_assignment -name CLOCK_TO_OUTPUT_DELAY 1 -to SDRAM_DQ[7]
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set_instance_assignment -name CLOCK_TO_OUTPUT_DELAY 1 -to SDRAM_DQ[8]
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set_instance_assignment -name CLOCK_TO_OUTPUT_DELAY 1 -to SDRAM_DQ[10]
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set_instance_assignment -name CLOCK_TO_OUTPUT_DELAY 1 -to SDRAM_DQ[11]
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set_instance_assignment -name CLOCK_TO_OUTPUT_DELAY 1 -to SDRAM_DQ[12]
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set_instance_assignment -name CLOCK_TO_OUTPUT_DELAY 1 -to SDRAM_DQ[14]
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set_instance_assignment -name CLOCK_TO_OUTPUT_DELAY 1 -to SDRAM_DQ[15]
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set_instance_assignment -name CLOCK_TO_OUTPUT_DELAY 1 -to SDRAM_BA[0]
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set_instance_assignment -name CLOCK_TO_OUTPUT_DELAY 1 -to SDRAM_CS_n
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set_instance_assignment -name CLOCK_TO_OUTPUT_DELAY 1 -to SDRAM_DQMH_n
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set_instance_assignment -name CLOCK_TO_OUTPUT_DELAY 1 -to SDRAM_DQML_n
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set_instance_assignment -name CLOCK_TO_OUTPUT_DELAY 1 -to SDRAM_RAS_n
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set_instance_assignment -name CLOCK_TO_OUTPUT_DELAY 1 -to SDRAM_WE_n
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set_global_assignment -name ADV_NETLIST_OPT_SYNTH_WYSIWYG_REMAP ON
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set_global_assignment -name AUTO_SHIFT_REGISTER_RECOGNITION ALWAYS
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set_global_assignment -name REMOVE_REDUNDANT_LOGIC_CELLS ON
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set_global_assignment -name IGNORE_LCELL_BUFFERS ON
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set_global_assignment -name IGNORE_CASCADE_BUFFERS ON
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set_location_assignment PLL_4 -to "clk_reset:clk_rst_inst|pll_5M_pal_ntsc:pll_5m_inst" -disable
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set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW"
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set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
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set_global_assignment -name QIP_FILE usbpll.qip
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set_global_assignment -name QIP_FILE pal_pll.qip
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set_global_assignment -name QIP_FILE pll_downstream_pal.qip
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set_global_assignment -name QIP_FILE ntsc_pll.qip
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set_global_assignment -name QIP_FILE pll_downstream_ntsc.qip
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set_global_assignment -name QIP_FILE remote_update.qip
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set_global_assignment -name VHDL_FILE delayed_reconfig.vhd
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set_global_assignment -name SDC_FILE atari5200core.sdc
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set_global_assignment -name VERILOG_FILE sdram_ctrl_3_ports.v
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set_global_assignment -name VHDL_FILE zpu_rom.vhdl
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set_global_assignment -name VHDL_FILE atari5200core_mcc.vhd
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set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
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set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
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set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
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set_global_assignment -name USE_CONFIGURATION_DEVICE OFF
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set_global_assignment -name CRC_ERROR_OPEN_DRAIN OFF
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set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -rise
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set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -fall
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set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -rise
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set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -fall
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set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
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