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-- Cart bank switching and memory access core
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--
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-- Copyright (C) 2011-2014 Matthias Reichl <hias@horus.com>
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--
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-- This program is free software; you can redistribute it and/or modify
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-- it under the terms of the Lesser GNU General Public License as published by
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-- the Free Software Foundation; either version 2 of the License, or
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-- (at your option) any later version.
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--
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-- This program is distributed in the hope that it will be useful,
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-- but WITHOUT ANY WARRANTY; without even the implied warranty of
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-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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-- GNU General Public License for more details.
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--
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-- You should have received a copy of the GNU General Public License
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-- along with this program; if not, write to the Free Software
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-- Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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library IEEE;
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use IEEE.STD_LOGIC_1164.ALL;
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use IEEE.STD_LOGIC_ARITH.ALL;
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use IEEE.NUMERIC_STD.ALL;
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library work;
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entity CartLogic is
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Port ( clk: in std_logic;
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clk_enable: in std_logic;
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cart_mode: in std_logic_vector(5 downto 0);
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a: in std_logic_vector (12 downto 0);
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cctl_n: std_logic;
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d_in: in std_logic_vector(7 downto 0);
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rw: in std_logic;
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s4_n: in std_logic;
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s5_n: in std_logic;
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s4_n_out: out std_logic;
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s5_n_out: out std_logic;
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rd4: out std_logic;
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rd5: out std_logic;
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cart_address: out std_logic_vector(20 downto 0);
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cart_address_enable: out boolean;
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cctl_dout: out std_logic_vector(7 downto 0);
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cctl_dout_enable: out boolean
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);
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end CartLogic;
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architecture vhdl of CartLogic is
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-- general cart configuration
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signal cfg_bank: std_logic_vector(20 downto 13) := (others => '0');
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signal cfg_enable: std_logic := '1';
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subtype cart_mode_type is std_logic_vector(5 downto 0);
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-- 8k modes
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constant cart_mode_off: cart_mode_type := "000000";
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constant cart_mode_8k: cart_mode_type := "000001";
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constant cart_mode_atarimax1: cart_mode_type := "000010";
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constant cart_mode_atarimax8: cart_mode_type := "000011";
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constant cart_mode_oss: cart_mode_type := "000100";
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constant cart_mode_sdx64: cart_mode_type := "001000";
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constant cart_mode_diamond64: cart_mode_type := "001001";
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constant cart_mode_express64: cart_mode_type := "001010";
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constant cart_mode_atrax_128: cart_mode_type := "001100";
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constant cart_mode_williams_64: cart_mode_type := "001101";
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-- 16k modes
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--constant cart_mode_flexi: cart_mode_type := "100000";
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constant cart_mode_16k: cart_mode_type := "100001";
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constant cart_mode_megamax16: cart_mode_type := "100010";
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constant cart_mode_blizzard_16: cart_mode_type := "100011";
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constant cart_mode_sic: cart_mode_type := "100100";
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constant cart_mode_mega_16: cart_mode_type := "101000";
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constant cart_mode_mega_32: cart_mode_type := "101001";
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constant cart_mode_mega_64: cart_mode_type := "101010";
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constant cart_mode_mega_128: cart_mode_type := "101011";
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constant cart_mode_mega_256: cart_mode_type := "101100";
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constant cart_mode_mega_512: cart_mode_type := "101101";
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constant cart_mode_mega_1024: cart_mode_type := "101110";
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constant cart_mode_mega_2048: cart_mode_type := "101111";
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constant cart_mode_xegs_32: cart_mode_type := "110000";
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constant cart_mode_xegs_64: cart_mode_type := "110001";
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constant cart_mode_xegs_128: cart_mode_type := "110010";
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constant cart_mode_xegs_256: cart_mode_type := "110011";
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constant cart_mode_xegs_512: cart_mode_type := "110100";
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constant cart_mode_xegs_1024: cart_mode_type := "110101";
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constant cart_mode_sxegs_32: cart_mode_type := "111000";
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constant cart_mode_sxegs_64: cart_mode_type := "111001";
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constant cart_mode_sxegs_128: cart_mode_type := "111010";
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constant cart_mode_sxegs_256: cart_mode_type := "111011";
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constant cart_mode_sxegs_512: cart_mode_type := "111100";
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constant cart_mode_sxegs_1024: cart_mode_type := "111101";
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signal cart_mode_prev: cart_mode_type := cart_mode_off;
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-- OSS cart emulation
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signal oss_bank: std_logic_vector(1 downto 0) := "00";
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-- sic cart 8xxx/axxx enable
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signal sic_8xxx_enable: std_logic := '0';
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signal sic_axxx_enable: std_logic := '1';
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signal access_8xxx: boolean;
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signal access_axxx: boolean;
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signal reset_n: std_logic := '1';
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begin
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access_8xxx <= ( s4_n = '0');
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access_axxx <= ( s5_n = '0');
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-- pass through s4/s5 if cart mode is off
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set_passthrough: process(s4_n, s5_n, cart_mode)
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begin
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if (cart_mode = cart_mode_off) then
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s4_n_out <= s4_n;
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s5_n_out <= s5_n;
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else
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s4_n_out <= '1';
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s5_n_out <= '1';
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end if;
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end process set_passthrough;
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-- remember previous cartridge mode
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set_cart_mode_prev: process(clk)
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begin
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if rising_edge(clk) then
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cart_mode_prev <= cart_mode;
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end if;
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end process set_cart_mode_prev;
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-- generate reset if cartridge mode has changed
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generate_reset: process(cart_mode, cart_mode_prev)
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begin
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if (cart_mode = cart_mode_prev) then
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reset_n <= '1';
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else
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reset_n <= '0';
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end if;
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end process generate_reset;
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-- read back config registers
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config_io: process(a, rw, cctl_n,
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cfg_bank,
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cart_mode,
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sic_8xxx_enable, sic_axxx_enable)
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begin
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cctl_dout_enable <= false;
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cctl_dout <= x"ff";
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if (cctl_n = '0') then
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-- sic register readback at $D500-$D51F
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if (rw = '1') and (cart_mode = cart_mode_sic) and (a(7 downto 5) = "000") then
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cctl_dout_enable <= true;
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-- bit 7 = 0 means flash is write protected
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cctl_dout <= "0" & (not sic_axxx_enable) & sic_8xxx_enable & cfg_bank(18 downto 14);
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end if;
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end if;
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end process config_io;
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set_config: process(clk)
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begin
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if rising_edge(clk) then
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if (reset_n = '0') then
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cfg_bank <= (others => '0');
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cfg_enable <= '1';
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oss_bank <= "01";
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sic_8xxx_enable <= '0';
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sic_axxx_enable <= '1';
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-- cart specific initialization
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case cart_mode is
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when cart_mode_atarimax8 =>
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cfg_bank <= x"7F"; -- startup in last bank
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when others => null;
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end case;
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else
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if (clk_enable = '1') and (cctl_n = '0') then
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if (rw = '0') then
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-- modes using data lines to switch banks
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-- (s)xegs bank select
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if (cart_mode(5 downto 4) = cart_mode_xegs_32(5 downto 4)) then
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-- sxegs disable via bit 7
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if (cart_mode(3) = '1') then
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cfg_enable <= not d_in(7);
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end if;
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case cart_mode is
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when cart_mode_xegs_32 | cart_mode_sxegs_32 =>
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cfg_bank(14 downto 13) <= d_in(1 downto 0);
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when cart_mode_xegs_64 | cart_mode_sxegs_64 =>
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cfg_bank(15 downto 13) <= d_in(2 downto 0);
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when cart_mode_xegs_128 | cart_mode_sxegs_128 =>
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cfg_bank(16 downto 13) <= d_in(3 downto 0);
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when cart_mode_xegs_256 | cart_mode_sxegs_256 =>
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cfg_bank(17 downto 13) <= d_in(4 downto 0);
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when cart_mode_xegs_512 | cart_mode_sxegs_512 =>
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cfg_bank(18 downto 13) <= d_in(5 downto 0);
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when cart_mode_xegs_1024 | cart_mode_sxegs_1024 =>
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cfg_bank(19 downto 13) <= d_in(6 downto 0);
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when others =>
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null;
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end case;
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end if;
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-- megacart bank select
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if (cart_mode(5 downto 3) = cart_mode_mega_32(5 downto 3)) then
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-- disable via bit 7
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cfg_enable <= not d_in(7);
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case cart_mode is
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when cart_mode_mega_32 =>
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cfg_bank(14 downto 14) <= d_in(0 downto 0);
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when cart_mode_mega_64 =>
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cfg_bank(15 downto 14) <= d_in(1 downto 0);
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when cart_mode_mega_128 =>
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cfg_bank(16 downto 14) <= d_in(2 downto 0);
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when cart_mode_mega_256 =>
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cfg_bank(17 downto 14) <= d_in(3 downto 0);
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when cart_mode_mega_512 =>
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cfg_bank(18 downto 14) <= d_in(4 downto 0);
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when cart_mode_mega_1024 =>
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cfg_bank(19 downto 14) <= d_in(5 downto 0);
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when cart_mode_mega_2048 =>
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cfg_bank(20 downto 14) <= d_in(6 downto 0);
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when others =>
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null;
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end case;
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end if;
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-- atrax 128
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if (cart_mode = cart_mode_atrax_128) then
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cfg_enable <= not d_in(7);
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cfg_bank(16 downto 13)<= d_in(3 downto 0);
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end if;
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-- blizzard
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if (cart_mode = cart_mode_blizzard_16) then
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cfg_enable <= '0';
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end if;
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-- sic
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if (cart_mode = cart_mode_sic) and (a(7 downto 5) = "000") then
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sic_8xxx_enable <= d_in(5);
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sic_axxx_enable <= not d_in(6);
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cfg_bank(18 downto 14) <= d_in(4 downto 0);
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end if;
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end if; -- rw = 0
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-- cart config using addresses, ignore read/write
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case cart_mode is
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when cart_mode_oss =>
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oss_bank <= a(0) & NOT a(3);
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when cart_mode_atarimax1 =>
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-- D500-D50F: set bank, enable
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if (a(7 downto 4) = x"0") then
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cfg_bank(16 downto 13) <= a(3 downto 0);
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cfg_enable <= '1';
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end if;
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-- D510-D51F: disable
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if (a(7 downto 4) = x"1") then
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cfg_enable <= '0';
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end if;
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when cart_mode_atarimax8 =>
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-- D500-D57F: set bank, enable
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if (a(7) = '0') then
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cfg_bank(19 downto 13) <= a(6 downto 0);
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cfg_enable <= '1';
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else
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-- D580-D5FF: disable
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cfg_enable <= '0';
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end if;
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when cart_mode_megamax16 =>
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-- D500-D57F: set 16k bank, enable
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if (a(7) = '0') then
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cfg_bank(20 downto 14) <= a(6 downto 0);
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cfg_enable <= '1';
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else
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cfg_enable <= '0';
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end if;
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when cart_mode_williams_64 =>
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if (a(7 downto 4) = x"0") then
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cfg_enable <= not a(3);
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cfg_bank(15 downto 13) <= a(2 downto 0);
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end if;
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when cart_mode_sdx64 =>
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if (a(7 downto 4) = x"E") then
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cfg_enable <= not a(3);
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cfg_bank(15 downto 13) <= not a(2 downto 0);
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end if;
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when cart_mode_diamond64 =>
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if (a(7 downto 4) = x"D") then
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cfg_enable <= not a(3);
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cfg_bank(15 downto 13) <= not a(2 downto 0);
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end if;
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when cart_mode_express64 =>
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if (a(7 downto 4) = x"7") then
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cfg_enable <= not a(3);
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cfg_bank(15 downto 13) <= not a(2 downto 0);
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end if;
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when others => null;
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end case;
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end if;
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end if;
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end if;
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end process set_config;
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access_cart_data: process(a, rw, access_8xxx, access_axxx,
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cfg_bank, cfg_enable,
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cart_mode,
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oss_bank,
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sic_8xxx_enable, sic_axxx_enable)
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variable bool_rd4: boolean;
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variable bool_rd5: boolean;
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begin
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cart_address <= cfg_bank & a(12 downto 0);
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bool_rd4 := false;
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bool_rd5 := (cfg_enable = '1');
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cart_address_enable <= (cfg_enable = '1') and access_axxx;
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if (cart_mode(5) = '1') then -- default for 16k carts
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bool_rd4 := (cfg_enable = '1');
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cart_address_enable <= (cfg_enable = '1') and (access_8xxx or access_axxx);
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end if;
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case cart_mode is
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when cart_mode_8k |
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cart_mode_atarimax1 | cart_mode_atarimax8 |
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cart_mode_atrax_128 | cart_mode_williams_64 |
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cart_mode_sdx64 | cart_mode_diamond64 | cart_mode_express64 =>
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null;
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when cart_mode_16k | cart_mode_megamax16 | cart_mode_blizzard_16 =>
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if (access_8xxx) then
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cart_address(13) <= '0';
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else
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cart_address(13) <= '1';
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end if;
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when cart_mode_oss =>
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if (oss_bank = "00") then
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bool_rd5 := false;
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cart_address_enable <= false;
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else
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cart_address(13) <= oss_bank(1) and (not a(12));
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cart_address(12) <= oss_bank(0) and (not a(12));
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end if;
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when cart_mode_xegs_32 |cart_mode_sxegs_32 =>
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if (access_axxx) then
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cart_address(14 downto 13) <= (others => '1');
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end if;
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when cart_mode_xegs_64 | cart_mode_sxegs_64 =>
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if (access_axxx) then
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cart_address(15 downto 13) <= (others => '1');
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end if;
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when cart_mode_xegs_128 | cart_mode_sxegs_128 =>
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if (access_axxx) then
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cart_address(16 downto 13) <= (others => '1');
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end if;
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when cart_mode_xegs_256 | cart_mode_sxegs_256 =>
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if (access_axxx) then
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cart_address(17 downto 13) <= (others => '1');
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end if;
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when cart_mode_xegs_512 | cart_mode_sxegs_512 =>
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if (access_axxx) then
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cart_address(18 downto 13) <= (others => '1');
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end if;
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when cart_mode_xegs_1024 | cart_mode_sxegs_1024 =>
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if (access_axxx) then
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cart_address(19 downto 13) <= (others => '1');
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end if;
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when cart_mode_mega_16 | cart_mode_mega_32 | cart_mode_mega_64 | cart_mode_mega_128 |
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cart_mode_mega_256 | cart_mode_mega_512 | cart_mode_mega_1024 | cart_mode_mega_2048 =>
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if (access_8xxx) then
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cart_address(13) <= '0';
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else
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cart_address(13) <= '1';
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end if;
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when cart_mode_sic =>
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bool_rd4 := (cfg_enable = '1') and (sic_8xxx_enable = '1');
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bool_rd5 := (cfg_enable = '1') and (sic_axxx_enable = '1');
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cart_address_enable <= (access_8xxx and (cfg_enable = '1') and (sic_8xxx_enable = '1'))
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or
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(access_axxx and (cfg_enable = '1') and (sic_axxx_enable = '1'));
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if (access_8xxx) then
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cart_address(13) <= '0';
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else
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cart_address(13) <= '1';
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end if;
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when others =>
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bool_rd4 := false;
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bool_rd5 := false;
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cart_address_enable <= false;
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end case;
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if (bool_rd4) then
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rd4 <= '1';
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else
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rd4 <= '0';
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end if;
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if (bool_rd5) then
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rd5 <= '1';
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else
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rd5 <= '0';
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end if;
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-- disable writes
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if (rw = '0') then
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cart_address_enable <= false;
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end if;
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end process access_cart_data;
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end vhdl;
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