EclaireXL

/*

WARNING: Do NOT edit the input and output ports in this file in a text

editor if you plan to continue editing the block that represents it in

the Block Editor! File corruption is VERY likely to occur.

*/

/*

Copyright (C) 1991-2012 Altera Corporation

Your use of Altera Corporation's design tools, logic functions

and other software and tools, and its AMPP partner logic

functions, and any output files from any of the foregoing

(including device programming or simulation files), and any

associated documentation or information are expressly subject

to the terms and conditions of the Altera Program License

Subscription Agreement, Altera MegaCore Function License

Agreement, or other applicable license agreement, including,

without limitation, that your use is for the sole purpose of

programming logic devices manufactured by Altera and sold by

Altera or its authorized distributors. Please refer to the

applicable agreement for further details.

*/

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(symbol

(rect 0 0 248 184)

(text "pll" (rect 118 0 133 16)(font "Arial" (font_size 10)))

(text "inst" (rect 8 168 25 180)(font "Arial" ))

(port

(pt 0 64)

(input)

(text "inclk0" (rect 0 0 31 14)(font "Arial" (font_size 8)))

(text "inclk0" (rect 4 50 29 63)(font "Arial" (font_size 8)))

(line (pt 0 64)(pt 40 64))

)

(port

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(pt 248 112)

(output)

(text "locked" (rect 0 0 36 14)(font "Arial" (font_size 8)))

(text "locked" (rect 213 98 242 111)(font "Arial" (font_size 8)))

)

(drawing

(text "Cyclone III" (rect 186 168 417 347)(font "Arial" ))

(text "inclk0 frequency: 5.000 MHz" (rect 50 59 218 129)(font "Arial" ))

(text "Operation Mode: Normal" (rect 50 72 199 155)(font "Arial" ))

(text "Clk " (rect 51 93 116 197)(font "Arial" ))

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)