repo2/sockit/pll_pal_sim/cadence/ncsim_setup.sh
| 302 | markw | ||
| 311 | markw | # (C) 2001-2015 Altera Corporation. All rights reserved.
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| 302 | markw | # Your use of Altera Corporation's design tools, logic functions and
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# other software and tools, and its AMPP partner logic functions, and
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# any output files any of the foregoing (including device programming
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# or simulation files), and any associated documentation or information
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# are expressly subject to the terms and conditions of the Altera
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# Program License Subscription Agreement, Altera MegaCore Function
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# License Agreement, or other applicable license agreement, including,
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# without limitation, that your use is for the sole purpose of
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# programming logic devices manufactured by Altera and sold by Altera
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# or its authorized distributors. Please refer to the applicable
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# agreement for further details.
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| 311 | markw | # ACDS 14.0 200 linux 2015.01.04.13:35:35
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| 302 | markw | ||
# ----------------------------------------
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# ncsim - auto-generated simulation script
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# ----------------------------------------
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# initialize variables
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TOP_LEVEL_NAME="pll_pal"
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QSYS_SIMDIR="./../"
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QUARTUS_INSTALL_DIR="/home/markw/fpga/altera/14.0/quartus/"
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SKIP_FILE_COPY=0
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SKIP_DEV_COM=0
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SKIP_COM=0
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SKIP_ELAB=0
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SKIP_SIM=0
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USER_DEFINED_ELAB_OPTIONS=""
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USER_DEFINED_SIM_OPTIONS="-input \"@run 100; exit\""
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# ----------------------------------------
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# overwrite variables - DO NOT MODIFY!
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# This block evaluates each command line argument, typically used for
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# overwriting variables. An example usage:
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# sh <simulator>_setup.sh SKIP_ELAB=1 SKIP_SIM=1
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for expression in "$@"; do
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eval $expression
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if [ $? -ne 0 ]; then
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echo "Error: This command line argument, \"$expression\", is/has an invalid expression." >&2
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exit $?
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fi
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done
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# ----------------------------------------
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# initialize simulation properties - DO NOT MODIFY!
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ELAB_OPTIONS=""
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SIM_OPTIONS=""
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if [[ `ncsim -version` != *"ncsim(64)"* ]]; then
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:
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else
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:
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fi
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# ----------------------------------------
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# create compilation libraries
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mkdir -p ./libraries/work/
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mkdir -p ./libraries/altera/
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mkdir -p ./libraries/lpm/
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mkdir -p ./libraries/sgate/
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mkdir -p ./libraries/altera_mf/
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mkdir -p ./libraries/altera_lnsim/
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mkdir -p ./libraries/cyclonev/
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# ----------------------------------------
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# copy RAM/ROM files to simulation directory
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# ----------------------------------------
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# compile device library files
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if [ $SKIP_DEV_COM -eq 0 ]; then
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ncvhdl -v93 "$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_syn_attributes.vhd" -work altera
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ncvhdl -v93 "$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_standard_functions.vhd" -work altera
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ncvhdl -v93 "$QUARTUS_INSTALL_DIR/eda/sim_lib/alt_dspbuilder_package.vhd" -work altera
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ncvhdl -v93 "$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_europa_support_lib.vhd" -work altera
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ncvhdl -v93 "$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_primitives_components.vhd" -work altera
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ncvhdl -v93 "$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_primitives.vhd" -work altera
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ncvhdl -v93 "$QUARTUS_INSTALL_DIR/eda/sim_lib/220pack.vhd" -work lpm
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ncvhdl -v93 "$QUARTUS_INSTALL_DIR/eda/sim_lib/220model.vhd" -work lpm
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ncvhdl -v93 "$QUARTUS_INSTALL_DIR/eda/sim_lib/sgate_pack.vhd" -work sgate
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ncvhdl -v93 "$QUARTUS_INSTALL_DIR/eda/sim_lib/sgate.vhd" -work sgate
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ncvhdl -v93 "$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_mf_components.vhd" -work altera_mf
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ncvhdl -v93 "$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_mf.vhd" -work altera_mf
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ncvlog -sv "$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_lnsim.sv" -work altera_lnsim
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ncvhdl -v93 "$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_lnsim_components.vhd" -work altera_lnsim
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ncvlog "$QUARTUS_INSTALL_DIR/eda/sim_lib/cadence/cyclonev_atoms_ncrypt.v" -work cyclonev
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ncvhdl -v93 "$QUARTUS_INSTALL_DIR/eda/sim_lib/cyclonev_atoms.vhd" -work cyclonev
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ncvhdl -v93 "$QUARTUS_INSTALL_DIR/eda/sim_lib/cyclonev_components.vhd" -work cyclonev
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fi
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# ----------------------------------------
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# compile design files in correct order
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if [ $SKIP_COM -eq 0 ]; then
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ncvhdl -v93 "$QSYS_SIMDIR/pll_pal.vho"
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fi
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# ----------------------------------------
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# elaborate top level design
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if [ $SKIP_ELAB -eq 0 ]; then
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ncelab -access +w+r+c -namemap_mixgen -relax $ELAB_OPTIONS $USER_DEFINED_ELAB_OPTIONS $TOP_LEVEL_NAME
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fi
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# ----------------------------------------
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# simulate
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if [ $SKIP_SIM -eq 0 ]; then
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eval ncsim -licqueue $SIM_OPTIONS $USER_DEFINED_SIM_OPTIONS $TOP_LEVEL_NAME
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fi
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