repo2/firmware_eclairexl/video_modes.c
| 972 | markw | #include <stdio.h>
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#include <string.h>
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#include <stdlib.h>
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#include <byteswap.h>
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typedef enum {MODE_NTSC_5994=0,MODE_NTSC_60=1,MODE_PAL_50=2,MODE_PAL_ORIG=3,MODE_NTSC_ORIG=4} video_pll_mode;
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char const * mode_description[] =
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{
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"1440x576 50Hz interlace",
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"720x576 50Hz",
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"1280x720 50Hz",
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"1920x1080 50Hz interlace",
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"1440x480 59.94Hz interlace",
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"720x480 59.94Hz",
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"1280x720 60Hz",
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"1920x1080 60Hz interlace"
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};
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typedef unsigned short uint16_t;
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uint16_t crtc_registers[] =
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{
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/*pal576i*/
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126, /*h_syncLen*/
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138, /*h_preActiveLen*/
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1440, /*h_activeLen*/
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24, /*h_postActiveLen*/
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3, /*v_syncLen*/
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19, /*v_preActiveLen*/
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288, /*v_activeLen*/
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2, /*v_postActiveLen*/
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1, /*v_interlace*/
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864, /*v_interlaceDelayLen*/
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21, /*mode */
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3, /*clock select - 27MHz or 74.25MHz - TODO*/
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/*pal576p*/
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64, /*h_syncLen*/
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68, /*h_preActiveLen*/
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720, /*h_activeLen*/
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12, /*h_postActiveLen*/
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5, /*v_syncLen*/
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39, /*v_preActiveLen*/
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576, /*v_activeLen*/
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5, /*v_postActiveLen*/
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0, /*v_interlace*/
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0, /*v_interlaceDelayLen*/
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17, /*mode */
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3, /*clock select - 27MHz or 74.25MHz - TODO*/
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/*pal720p*/
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40, /*h_syncLen*/
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220, /*h_preActiveLen*/
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1280, /*h_activeLen*/
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440, /*h_postActiveLen*/
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5, /*v_syncLen*/
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20, /*v_preActiveLen*/
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720, /*v_activeLen*/
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5, /*v_postActiveLen*/
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0, /*v_interlace*/
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0, /*v_interlaceDelayLen*/
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19, /*mode */
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2, /*clock select - 27MHz or 74.25MHz - TODO*/
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/* pal 1080i */
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44, /*h_syncLen*/
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148, /*h_preActiveLen*/
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1920, /*h_activeLen*/
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528, /*h_postActiveLen*/
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5, /*v_syncLen*/
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15, /*v_preActiveLen*/
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540, /*v_activeLen*/
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2, /*v_postActiveLen*/
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1, /*v_interlace*/
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1320, /*v_interlaceDelayLen*/
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20, /*mode*/
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2, /*clock select - 27MHz or 74.25MHz - TODO*/
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/*ntsc480i*/
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124, /*h_syncLen*/
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114, /*h_preActiveLen*/
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1440, /*h_activeLen*/
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38, /*h_postActiveLen*/
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3, /*v_syncLen*/
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15, /*v_preActiveLen*/
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240, /*v_activeLen*/
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4, /*v_postActiveLen*/
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1, /*v_interlace*/
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858, /*v_interlaceDelayLen*/
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6, /*mode */
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3, /*clock select - 27MHz or 74.25MHz - TODO*/
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/*ntsc480p*/
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62, /*h_syncLen*/
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60, /*h_preActiveLen*/
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720, /*h_activeLen*/
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16, /*h_postActiveLen*/
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6, /*v_syncLen*/
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30, /*v_preActiveLen*/
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480, /*v_activeLen*/
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9, /*v_postActiveLen*/
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0, /*v_interlace*/
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0, /*v_interlaceDelayLen*/
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2, /*mode */
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3, /*clock select - 27MHz or 74.25MHz - TODO*/
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/* ntsc720p*/
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40, /*h_syncLen*/
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220, /*h_preActiveLen*/
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1280, /*h_activeLen*/
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110, /*h_postActiveLen*/
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5, /*v_syncLen*/
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20, /*v_preActiveLen*/
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720, /*v_activeLen*/
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5, /*v_postActiveLen*/
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0, /*v_interlace*/
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0, /*v_interlaceDelayLen*/
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4, /*mode */
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2, /*clock select - 27MHz or 74.25MHz - TODO*/
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/* ntsc 1080i */
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44, /*h_syncLen*/
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148, /*h_preActiveLen*/
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1920, /*h_activeLen*/
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88, /*h_postActiveLen*/
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5, /*v_syncLen*/
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15, /*v_preActiveLen*/
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540, /*v_activeLen*/
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2, /*v_postActiveLen*/
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1, /*v_interlace*/
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1100, /*v_interlaceDelayLen*/
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5, /*mode */
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2 /*clock select - 27MHz or 74.25MHz - TODO*/
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};
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uint16_t scaler_registers[] =
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{
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400,400,328,164,328,1, /*pal576i*/
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1024,1024,1,
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400,400,328,164,164,2, /*pal576p*/
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1024,512,2,
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400,225,700,291,291,2, /*pal720p*/
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576,426,2,
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400,300,786,218,436,1, /*pal1080i*/
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768,568,1,
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400,400,328,164,328,1, /*ntsc480i*/
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1024,1024,1,
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400,400,328,164,164,2, /*ntsc480p*/
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1024,512,2,
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400,225,834,291,291,2, /*ntsc720p*/
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576,358,2,
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400,300,936,218,436,1, /*ntsc1080i*/
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768,478,1
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};
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video_pll_mode const mode_freqs[] =
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{
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MODE_PAL_50,
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MODE_PAL_50,
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MODE_PAL_50,
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MODE_PAL_50,
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MODE_NTSC_5994,
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MODE_NTSC_5994,
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MODE_NTSC_60,
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MODE_NTSC_60
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};
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/* mode layout
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* 0 :name
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64 :crtc
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128:scaler
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192:freq
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*/
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int main(void)
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{
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int nummodes = 8;
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char * buffer = malloc(nummodes*256);
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memset(buffer,0,nummodes*256);
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for (int i=0;i!=nummodes*12;++i)
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crtc_registers[i] = __bswap_16 (crtc_registers[i]);
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for (int i=0;i!=nummodes*9;++i)
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scaler_registers[i] = __bswap_16 (scaler_registers[i]);
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for (int i=0;i!=nummodes;++i)
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{
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char * base = buffer+i*256;
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strcpy(base,mode_description[i]);
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memcpy(base+64,crtc_registers+(12*i),12*2);
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memcpy(base+128,scaler_registers+(9*i),9*2);
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memcpy(base+192,&mode_freqs[i],1);
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}
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FILE * f = fopen("video_modes.rom","w");
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fwrite(buffer,1,nummodes*256,f);
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fclose(f);
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return 0;
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}
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