repo2/common/components/usbhostslave/trunk/RTL/serialInterfaceEngine/usbSerialInterfaceEngine.v
| 264 | markw | //////////////////////////////////////////////////////////////////////
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//// ////
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//// usbSerialInterfaceEngine.v ////
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//// ////
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//// This file is part of the usbhostslave opencores effort.
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//// <http://www.opencores.org/cores//> ////
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//// ////
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//// Module Description: ////
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////
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//// ////
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//// To Do: ////
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////
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//// ////
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//// Author(s): ////
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//// - Steve Fielding, sfielding@base2designs.com ////
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//// ////
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//////////////////////////////////////////////////////////////////////
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//// ////
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//// Copyright (C) 2004 Steve Fielding and OPENCORES.ORG ////
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//// ////
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//// This source file may be used and distributed without ////
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//// restriction provided that this copyright statement is not ////
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//// removed from the file and that any derivative work contains ////
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//// the original copyright notice and the associated disclaimer. ////
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//// ////
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//// This source file is free software; you can redistribute it ////
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//// and/or modify it under the terms of the GNU Lesser General ////
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//// Public License as published by the Free Software Foundation; ////
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//// either version 2.1 of the License, or (at your option) any ////
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//// later version. ////
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//// ////
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//// This source is distributed in the hope that it will be ////
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//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
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//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
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//// PURPOSE. See the GNU Lesser General Public License for more ////
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//// details. ////
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//// ////
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//// You should have received a copy of the GNU Lesser General ////
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//// Public License along with this source; if not, download it ////
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//// from <http://www.opencores.org/lgpl.shtml> ////
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//// ////
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//////////////////////////////////////////////////////////////////////
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//
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`include "timescale.v"
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module usbSerialInterfaceEngine(
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clk, rst,
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//readUSBWireData
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USBWireDataIn,
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USBWireDataInTick,
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//writeUSBWireData
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USBWireDataOut,
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USBWireCtrlOut,
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USBWireDataOutTick,
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//SIEReceiver
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connectState,
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//processRxBit
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resumeDetected,
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//processRxByte
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RxCtrlOut,
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RxDataOutWEn,
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RxDataOut,
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//SIETransmitter
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SIEPortCtrlIn,
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SIEPortDataIn,
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SIEPortTxRdy,
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SIEPortWEn,
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//lineControlUpdate
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fullSpeedPolarity,
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fullSpeedBitRate,
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noActivityTimeOut,
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noActivityTimeOutEnable
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);
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input clk, rst;
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//readUSBWireData
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input [1:0] USBWireDataIn;
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output USBWireDataInTick;
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output noActivityTimeOut;
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input noActivityTimeOutEnable;
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//writeUSBWireData
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output [1:0] USBWireDataOut;
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output USBWireCtrlOut;
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output USBWireDataOutTick;
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//SIEReceiver
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output [1:0] connectState;
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//processRxBit
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output resumeDetected;
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//processRxByte
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output [7:0] RxCtrlOut;
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output RxDataOutWEn;
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output [7:0] RxDataOut;
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//SIETransmitter
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input [7:0] SIEPortCtrlIn;
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input [7:0] SIEPortDataIn;
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output SIEPortTxRdy;
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input SIEPortWEn;
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//lineControlUpdate
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input fullSpeedPolarity;
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input fullSpeedBitRate;
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wire clk, rst;
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//readUSBWireData
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wire [1:0] USBWireDataIn;
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wire USBWireDataInTick;
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//writeUSBWireData
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wire [1:0] USBWireDataOut;
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wire USBWireCtrlOut;
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wire noActivityTimeOut;
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wire USBWireDataOutTick;
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//SIEReceiver
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wire [1:0] connectState;
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//processRxBit
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wire resumeDetected;
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//processRxByte
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wire [7:0] RxCtrlOut;
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wire RxDataOutWEn;
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wire [7:0] RxDataOut;
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//SIETransmitter
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wire [7:0] SIEPortCtrlIn;
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wire [7:0] SIEPortDataIn;
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wire SIEPortTxRdy;
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wire SIEPortWEn;
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//lineControlUpdate
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wire fullSpeedPolarity;
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wire fullSpeedBitRate;
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//internal wiring
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wire processRxBitsWEn;
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wire processRxBitRdy;
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wire [1:0] RxWireDataFromWireRx;
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wire RxWireDataWEn;
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wire TxWireActiveDrive;
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wire [1:0] TxBitsFromArbToWire;
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wire TxCtrlFromArbToWire;
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wire USBWireRdy;
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wire USBWireWEn;
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wire USBWireReadyFromTxArb;
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wire prcTxByteCtrl;
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wire [1:0] prcTxByteData;
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wire prcTxByteGnt;
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wire prcTxByteReq;
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wire prcTxByteWEn;
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wire SIETxCtrl;
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wire [1:0] SIETxData;
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wire SIETxGnt;
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wire SIETxReq;
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wire SIETxWEn;
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wire [7:0] TxByteFromSIEToPrcTxByte;
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wire [7:0] TxCtrlFromSIEToPrcTxByte;
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wire [1:0] JBit;
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wire [1:0] KBit;
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wire processRxByteWEn;
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wire [7:0] RxDataFromPrcRxBitToPrcRxByte;
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wire [7:0] RxCtrlFromPrcRxBitToPrcRxByte;
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wire processRxByteRdy;
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//Rx CRC
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wire RxCRC16En;
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wire [15:0] RxCRC16Result;
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wire RxCRC16UpdateRdy;
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wire RxCRC5En;
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wire [4:0] RxCRC5Result;
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wire RxCRC5_8Bit;
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wire [7:0] RxCRCData;
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wire RxRstCRC;
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wire RxCRC5UpdateRdy;
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//Tx CRC
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wire TxCRC16En;
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wire [15:0] TxCRC16Result;
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wire TxCRC16UpdateRdy;
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wire TxCRC5En;
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wire [4:0] TxCRC5Result;
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wire TxCRC5_8Bit;
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wire [7:0] TxCRCData;
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wire TxRstCRC;
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wire TxCRC5UpdateRdy;
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wire processTxByteRdy;
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wire processTxByteWEn;
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wire SIEFsRate;
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wire TxFSRateFromSIETxToPrcTxByte;
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wire prcTxByteFSRate;
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wire FSRateFromArbiterToWire;
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wire RxWireActive;
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lineControlUpdate u_lineControlUpdate
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(.fullSpeedPolarity(fullSpeedPolarity),
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.fullSpeedBitRate(fullSpeedBitRate),
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.JBit(JBit),
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.KBit(KBit) );
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SIEReceiver u_SIEReceiver
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(
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.RxWireDataIn(RxWireDataFromWireRx),
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.RxWireDataWEn(RxWireDataWEn),
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.clk(clk),
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.connectState(connectState),
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.rst(rst) );
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processRxBit u_processRxBit
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(.JBit(JBit),
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.KBit(KBit),
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.RxBitsIn(RxWireDataFromWireRx),
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.RxCtrlOut(RxCtrlFromPrcRxBitToPrcRxByte),
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.RxDataOut(RxDataFromPrcRxBitToPrcRxByte),
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.clk(clk),
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.processRxBitRdy(processRxBitRdy),
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.processRxBitsWEn(RxWireDataWEn),
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.processRxByteWEn(processRxByteWEn),
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.resumeDetected(resumeDetected),
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.rst(rst),
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.processRxByteRdy(processRxByteRdy),
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.RxWireActive(RxWireActive),
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.fullSpeedBitRate(fullSpeedBitRate)
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);
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processRxByte u_processRxByte
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(.CRC16En(RxCRC16En),
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.CRC16Result(RxCRC16Result),
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.CRC16UpdateRdy(RxCRC16UpdateRdy),
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.CRC5En(RxCRC5En),
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.CRC5Result(RxCRC5Result),
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.CRC5_8Bit(RxCRC5_8Bit),
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.CRC5UpdateRdy(RxCRC5UpdateRdy),
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.CRCData(RxCRCData),
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.RxByteIn(RxDataFromPrcRxBitToPrcRxByte),
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.RxCtrlIn(RxCtrlFromPrcRxBitToPrcRxByte),
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.RxCtrlOut(RxCtrlOut),
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.RxDataOutWEn(RxDataOutWEn),
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.RxDataOut(RxDataOut),
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.clk(clk),
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.processRxDataInWEn(processRxByteWEn),
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.rst(rst),
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.rstCRC(RxRstCRC),
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.processRxByteRdy(processRxByteRdy) );
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updateCRC5 RxUpdateCRC5
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(.rstCRC(RxRstCRC),
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.CRCResult(RxCRC5Result),
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.CRCEn(RxCRC5En),
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.CRC5_8BitIn(RxCRC5_8Bit),
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.dataIn(RxCRCData),
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.ready(RxCRC5UpdateRdy),
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.clk(clk),
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.rst(rst) );
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updateCRC16 RxUpdateCRC16
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(.rstCRC(RxRstCRC),
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.CRCResult(RxCRC16Result),
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.CRCEn(RxCRC16En),
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.dataIn(RxCRCData),
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.ready(RxCRC16UpdateRdy),
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.clk(clk),
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.rst(rst) );
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SIETransmitter u_SIETransmitter
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(.CRC16En(TxCRC16En),
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.CRC16Result(TxCRC16Result),
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.CRC5En(TxCRC5En),
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.CRC5Result(TxCRC5Result),
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.CRC5_8Bit(TxCRC5_8Bit),
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.CRCData(TxCRCData),
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.CRC5UpdateRdy(TxCRC5UpdateRdy),
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.CRC16UpdateRdy(TxCRC16UpdateRdy),
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.JBit(JBit),
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.KBit(KBit),
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.SIEPortCtrlIn(SIEPortCtrlIn),
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.SIEPortDataIn(SIEPortDataIn),
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.SIEPortTxRdy(SIEPortTxRdy),
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.SIEPortWEn(SIEPortWEn),
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.TxByteOutCtrl(TxCtrlFromSIEToPrcTxByte),
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.TxByteOut(TxByteFromSIEToPrcTxByte),
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.USBWireCtrl(SIETxCtrl),
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.USBWireData(SIETxData),
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.USBWireGnt(SIETxGnt),
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.USBWireRdy(USBWireReadyFromTxArb),
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.USBWireReq(SIETxReq),
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.USBWireWEn(SIETxWEn),
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.clk(clk),
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.processTxByteRdy(processTxByteRdy),
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.processTxByteWEn(processTxByteWEn),
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.rst(rst),
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.rstCRC(TxRstCRC),
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.USBWireFullSpeedRate(SIEFsRate),
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.TxByteOutFullSpeedRate(TxFSRateFromSIETxToPrcTxByte),
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.fullSpeedRateIn(fullSpeedBitRate)
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);
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updateCRC5 TxUpdateCRC5
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(.rstCRC(TxRstCRC),
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.CRCResult(TxCRC5Result),
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.CRCEn(TxCRC5En),
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.CRC5_8BitIn(TxCRC5_8Bit),
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.dataIn(TxCRCData),
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.ready(TxCRC5UpdateRdy),
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.clk(clk),
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.rst(rst) );
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updateCRC16 TxUpdateCRC16
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(.rstCRC(TxRstCRC),
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.CRCResult(TxCRC16Result),
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.CRCEn(TxCRC16En),
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.dataIn(TxCRCData),
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.ready(TxCRC16UpdateRdy),
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.clk(clk),
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.rst(rst) );
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processTxByte u_processTxByte
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(.JBit(JBit),
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.KBit(KBit),
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.TxByteCtrlIn(TxCtrlFromSIEToPrcTxByte),
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.TxByteIn(TxByteFromSIEToPrcTxByte),
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.USBWireCtrl(prcTxByteCtrl),
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.USBWireData(prcTxByteData),
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.USBWireGnt(prcTxByteGnt),
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.USBWireRdy(USBWireReadyFromTxArb),
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.USBWireReq(prcTxByteReq),
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.USBWireWEn(prcTxByteWEn),
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.clk(clk),
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.processTxByteRdy(processTxByteRdy),
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.processTxByteWEn(processTxByteWEn),
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.rst(rst),
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.USBWireFullSpeedRate(prcTxByteFSRate),
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.TxByteFullSpeedRateIn(TxFSRateFromSIETxToPrcTxByte)
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);
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USBTxWireArbiter u_USBTxWireArbiter
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(.SIETxCtrl(SIETxCtrl),
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.SIETxData(SIETxData),
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.SIETxGnt(SIETxGnt),
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.SIETxReq(SIETxReq),
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.SIETxWEn(SIETxWEn),
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.TxBits(TxBitsFromArbToWire),
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.TxCtl(TxCtrlFromArbToWire),
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.USBWireRdyIn(USBWireRdy),
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.USBWireRdyOut(USBWireReadyFromTxArb),
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.USBWireWEn(USBWireWEn),
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.clk(clk),
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.prcTxByteCtrl(prcTxByteCtrl),
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.prcTxByteData(prcTxByteData),
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.prcTxByteGnt(prcTxByteGnt),
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.prcTxByteReq(prcTxByteReq),
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.prcTxByteWEn(prcTxByteWEn),
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.rst(rst),
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.SIETxFSRate(SIEFsRate),
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.prcTxByteFSRate(prcTxByteFSRate),
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.TxFSRate(FSRateFromArbiterToWire)
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);
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writeUSBWireData u_writeUSBWireData
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(.TxBitsIn(TxBitsFromArbToWire),
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.TxBitsOut(USBWireDataOut),
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.TxDataOutTick(USBWireDataOutTick),
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.TxCtrlIn(TxCtrlFromArbToWire),
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.TxCtrlOut(USBWireCtrlOut),
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.USBWireRdy(USBWireRdy),
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.USBWireWEn(USBWireWEn),
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.TxWireActiveDrive(TxWireActiveDrive),
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.fullSpeedRate(FSRateFromArbiterToWire),
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.clk(clk),
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.rst(rst)
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);
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readUSBWireData u_readUSBWireData
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(.RxBitsIn(USBWireDataIn),
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.RxDataInTick(USBWireDataInTick),
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.RxBitsOut(RxWireDataFromWireRx),
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.SIERxRdyIn(processRxBitRdy),
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.SIERxWEn(RxWireDataWEn),
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.fullSpeedRate(fullSpeedBitRate),
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.TxWireActiveDrive(TxWireActiveDrive),
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.clk(clk),
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.rst(rst),
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.noActivityTimeOut(noActivityTimeOut),
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.RxWireActive(RxWireActive),
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.noActivityTimeOutEnable(noActivityTimeOutEnable)
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);
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endmodule
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