repo2/chameleon2/atari800core.sdc
| 872 | markw | create_clock -period 50MHz [get_ports CLK50M]
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derive_pll_clocks
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derive_clock_uncertainty
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set_clock_groups -asynchronous \
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-group { clk50m } \
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-group { \
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\gen_pal_pll:chameleon_pll2|altpll_component|auto_generated|pll1|clk[0]
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\gen_pal_pll:chameleon_pll2|altpll_component|auto_generated|pll1|clk[1]
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\gen_pal_pll:chameleon_pll2|altpll_component|auto_generated|pll1|clk[2]
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}
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