repo2/chameleon/chameleon_1khz.vhd
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--
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-- Turbo Chameleon
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--
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-- Multi purpose FPGA expansion for the Commodore 64 computer
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--
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-- -----------------------------------------------------------------------
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-- Copyright 2005-2011 by Peter Wendrich (pwsoft@syntiac.com)
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-- http://www.syntiac.com/chameleon.html
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--
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-- This source file is free software: you can redistribute it and/or modify
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-- it under the terms of the GNU Lesser General Public License as published
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-- by the Free Software Foundation, either version 3 of the License, or
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-- (at your option) any later version.
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--
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-- This source file is distributed in the hope that it will be useful,
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-- but WITHOUT ANY WARRANTY; without even the implied warranty of
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-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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-- GNU General Public License for more details.
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--
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-- You should have received a copy of the GNU General Public License
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-- along with this program. If not, see <http://www.gnu.org/licenses/>.
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--
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-- -----------------------------------------------------------------------
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--
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-- 1 Khz clock source
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--
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-- -----------------------------------------------------------------------
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-- clk - system clock input
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-- ena_1mhz - 1 Mhz input, signal must be one cycle high each micro-second.
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-- ena_1khz - 1 Khz output. Signal is one cycle '1' each 1 millisecond.
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-- -----------------------------------------------------------------------
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library IEEE;
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use IEEE.STD_LOGIC_1164.ALL;
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use IEEE.numeric_std.all;
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-- -----------------------------------------------------------------------
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entity chameleon_1khz is
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port (
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clk : in std_logic;
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ena_1mhz : in std_logic;
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ena_1khz : out std_logic
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);
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end entity;
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-- -----------------------------------------------------------------------
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architecture rtl of chameleon_1khz is
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constant maxcount : integer := 999;
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signal cnt : integer range 0 to maxcount := maxcount;
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signal ena_out : std_logic := '0';
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begin
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ena_1khz <= ena_out;
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process(clk)
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begin
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if rising_edge(clk) then
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ena_out <= '0';
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if ena_1mhz = '1' then
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if cnt = 0 then
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cnt <= maxcount;
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ena_out <= '1';
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else
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cnt <= cnt - 1;
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end if;
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end if;
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end if;
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end process;
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end architecture;
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