EclaireXL

02/08/2018

FO 09:21 PM v18

I've been trying out some other parts of the hardware in advance of the new boards. The clock generator and the i2c video support are confirmed as working. Also the sd card detection line.
I've put these to initial use in v18 as follo... foft

FO 09:09 PM Bug #47 (Closed): CORE 13 - Paddle, Touchtablet issues

foft

FO 09:08 PM Bug #47: CORE 13 - Paddle, Touchtablet issues

In the next run of boards we are added a variable resistor to allow adjusting the level the paddle detector uses.
For old boards, use a decent PSU! foft

FO 09:06 PM Feature #24 (Closed): A board with Atari SOUL!!!! (ROM in block ram support)

Added basic support, see related issue.
I still plan to do the flash reading later. foft

FO 07:56 PM Feature #24 (In Progress): A board with Atari SOUL!!!! (ROM in block ram support)

foft

FO 09:05 PM Feature #37: SD card insertion support

Confirmed that SD detect works.
Added primitive insert/eject support. Its kind of crap, but it works...
Boot with no SD card means -> 320KB compy 1x, HDMI if connected, VGA if connected, otherwise RGB 15KHz. NTSC (more monitors com... foft

FO 07:57 PM Feature #37: SD card insertion support

Another place we need to check hardware before new boards... foft

FO 07:56 PM Feature #37 (In Progress): SD card insertion support

foft

FO 07:55 PM Feature #14 (Closed): Svideo core for first prototype

I don't see composite and svideo as core outputs, much worse quality even when perfectly done. I'm pretty happy with the current state, sometimes the TV controls need adjusting a little but that isn't a big problem. foft

FO 07:53 PM Bug #56 (Closed): Galaxian Cartridge crash

Working fine on recent cores foft

02/07/2018

FO 09:14 PM Feature #12 (Closed): Set up redmine backups!

foft

FO 09:14 PM Feature #12: Set up redmine backups!

My second disk died before I moved it to the NAS. Never mind though, recovered the data. Now backup is to my nas since I do not have a 2nd disk! foft

FO 09:13 PM Bug #17 (Closed): NTSC crashing on some builds

On second thoughts... closing until we see it again. foft

FO 09:11 PM Bug #17: NTSC crashing on some builds

Not seen this for months, think it was an issue around this time that has been fixed. Marking as normal priority for now. foft

FO 08:51 PM Feature #7: Implement I2C vga/hdmi support

Added to the video settings 'VGA connected' and 'HDMI connected' which look for the start of the DDC sequence '00FF' foft

FO 08:25 PM Feature #7: Implement I2C vga/hdmi support

Setting back to normal since the hardware side is working fine. foft

FO 08:25 PM Feature #7: Implement I2C vga/hdmi support

HDMI is working too... “00 FF FF FF FF FF FF 00 10 AC … foft

FO 08:23 PM Feature #7: Implement I2C vga/hdmi support

VGA is working... receiving “00 FF FF FF FF FF FF 00 10 AC …"
Now for HDMI foft

FO 08:00 PM Feature #7: Implement I2C vga/hdmi support

I had the pin assignments backwards. I can now write 4/5 to the control register and read it back. This should be channel select.
Next up... checking that what I write makes it to the VGA and HDMI port. I guess I could try speaking t... foft

02/06/2018

FO 09:38 PM Feature #7: Implement I2C vga/hdmi support

Looking on signaltap looks like slave reads of the control register are not working. Hmmm. foft

FO 09:36 PM Feature #7: Implement I2C vga/hdmi support

Picoscope has i2c debugging and linux drivers:-) Installed them and will connect that up and take a look tomorrow. foft

FO 09:28 PM Feature #7: Implement I2C vga/hdmi support

Writing some code to say:
select channel1
read selected channel
write to random slave on channel1
select channel0
read selected channel
write to random slave on channel0
Might be working, but need to work out how to check...... foft

SA 09:15 PM Feature #15: Implement programmable PLL

foft wrote:
> OK, confirmed this chip is working. I programmed it over i2c and am now getting two different clocks output on CLK0 and CLK2 - 10MHz and 30MHz as I set up in the clk generator software.
> ...
Congrats! ;-) sadosp

FO 08:49 PM Feature #15: Implement programmable PLL

OK, confirmed this chip is working. I programmed it over i2c and am now getting two different clocks output on CLK0 and CLK2 - 10MHz and 30MHz as I set up in the clk generator software.
Going to mark this back as normal priority since I... foft

02/05/2018

FO 09:58 PM Feature #15: Implement programmable PLL

Been adding i2c to the zpu. Mostly working I think, a few timing issues to solve. foft

02/04/2018

FO 09:59 PM Feature #15: Implement programmable PLL

To do this I need to add i2c support to the ZPU. I'm out of ROM space without easy fixes. There is actually quite a lot space even on the EBA2, so adding 8K extra for now. Currently it was using bit 15 to decide rom/ram. I made it use 14... foft

AD 09:24 PM Feature #15: Implement programmable PLL

Going to power this up urgently before new boards made, to check hardware side is fine. admin

FO 09:23 PM Feature #15: Implement programmable PLL

Attached the note on how to program manually (without clock builder help) foft

FO 09:22 PM Feature #15: Implement programmable PLL

Attached header file for programming clk0->10MHz and clk1->30MHz.
These are generated with clock builder pro, downloaded from ic vendor web site. foft

AD 09:25 PM Feature #7: Implement I2C vga/hdmi support

Going to at least check this chip is wired properly before the new boards are ordered admin

AD 09:24 PM Bug #18 (Closed): Power on Switch

Panos fixed this for the next run admin

02/02/2018

FO 10:30 PM v17 out and new boards

The high-res antic work is still ongoing but I think this is now stable enough for general use.
* High res antic support (2x and 4x colour clock)
* High res antic disables pbi (so works at 1x cpu)
* Sophia style 2 colour high res (p... foft

01/14/2018

FO 11:12 AM Feature #3: High resolution antic support

So antic output looks near perfect. Some blue blobs on the left which I need to investiate. The shift register is clear so not sure where they come from! foft

FO 11:11 AM Feature #3: High resolution antic support

Still not onto GTIA! Doing some debugging on the non display parts of antic output. Improved my visualation tools to help with this. Here we have:
i) DMA clock (4 bits)
ii) Display shift reg
iii) AN0-2 output
iv) GTIA colour (+ some ... foft