EclaireXL

need to write something here too

Simple core that iterates over the gpio pin by pin

Hello world a800 core build, not yet tried on hardware

starting to write some test cores

Reminder of BGA placement tabs

Added eclaireXL 1.2 board revision BOM

Plugged in the sram model to check timings

Need to review further, but these changes seem to bring the 65816 core to life somewhat

Added testbenches. Do not respond to bus cycles that do not target the cart

sram model for tb

Moved memory timing bridge inside slave_timing, its an internal detail really

Adjusted delays and verified in sim

Trivial but important fixes, thanks to quartus warnings

70ns accuracy is not enough for reliable Atari bus sampling, use faster clock we are already using for sram

Register bus_data before we write it

Fixed c0 decode and made more explicit

Simulated and repaired 6502 bus and sram bus

constraint all cart input/outputs - 1.79MHz so not a problem. Improve sram constraints - including adding a bit of hold time.

register output data

Missed commit

Simulated/corrected sram back-back write timings

First cut implementation of veronica clone for ultimate cart - does not work yet, but getting close. Project to try out Rob Finchs 65816 core.

Fix airstrike 1 loading - have to nak sector 0

HDMI port

Added boms with digikey part numbers - obvious check yourself too before ordering!