Project

General

Profile

« Previous | Next » 

Revision 84

Added by markw about 11 years ago

Added scandoubler. Build some variants.

View differences:

makeqsf
my @vhdl = glob ("$_/*.vhd");
push @vhdl, glob ("$_/*.vhdl");
my @verilog = glob ("$_/*.v");
my @qip = glob ("$_/*.qip");
foreach (@verilog)
{
......
{
print QSF_OUT "set_global_assignment -name VHDL_FILE $_\n";
}
foreach (@qip)
{
print QSF_OUT "set_global_assignment -name QIP_FILE $_\n";
}
}
close (QSF_OUT);

Also available in: Unified diff