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Revision 1510

Added by markw 1 day ago

Use natural signed/unsigned source depending on which chip. Mix with signed, with a dc blocker. Add a bit more dither to make the mid level voltage acceptable through the sigma delta, since it now sits a 2.5v for silence (internally, external is ac coupled). This fixes the sample engine clicks when playing mod files due to the sample engine volume being applied on unsigned converted samples, which gave a dc bias betwen samples. Paula samples have to end/start at signed midpoint you see.

View differences:

adpcm.vhdl
select_channel : out std_logic_vector(1 downto 0); -- ask for current data for this channel
store : OUT std_logic;
data_out : OUT std_logic_vector(15 downto 0); -- current output
data_out : OUT std_logic_vector(15 downto 0); -- current output (signed)
dirty : IN STD_LOGIC_VECTOR(3 downto 0); -- channel needs updating
......
decstep_next <= unsigned(decstepnext(6 downto 0));
end process;
data_out(15) <= not(acc_mux(15));
data_out(14 downto 0) <= std_logic_vector(acc_mux(14 downto 0));
data_out <= std_logic_vector(acc_mux);
select_channel <= sel;
step_addr <= std_logic_vector(decstep_mux);

Also available in: Unified diff