Project

General

Profile

« Previous | Next » 

Revision 1510

Added by markw 1 day ago

Use natural signed/unsigned source depending on which chip. Mix with signed, with a dc blocker. Add a bit more dither to make the mid level voltage acceptable through the sigma delta, since it now sits a 2.5v for silence (internally, external is ac coupled). This fixes the sample engine clicks when playing mod files due to the sample engine volume being applied on unsigned converted samples, which gave a dc bias betwen samples. Paula samples have to end/start at signed midpoint you see.

View differences:

pokeymax.vhd
signal WRITE_DATA : std_logic_vector(7 downto 0);
signal DEVICE_ADDR : std_logic_vector(3 downto 0);
signal POKEY_AUDIO_0 : unsigned(15 downto 0);
signal POKEY_AUDIO_1 : unsigned(15 downto 0);
signal POKEY_AUDIO_2 : unsigned(15 downto 0);
signal POKEY_AUDIO_3 : unsigned(15 downto 0);
signal POKEY_AUDIO_UNSIGNED : UNSIGNED_AUDIO_TYPE(3 downto 0);
signal AUDIO_0_UNSIGNED : unsigned(15 downto 0);
signal AUDIO_1_UNSIGNED : unsigned(15 downto 0);
signal AUDIO_2_UNSIGNED : unsigned(15 downto 0);
signal AUDIO_3_UNSIGNED : unsigned(15 downto 0);
signal AUDIO_MIXED_SIGNED : SIGNED_AUDIO_TYPE(3 downto 0);
signal AUDIO_0_SIGMADELTA : std_logic;
signal AUDIO_1_SIGMADELTA : std_logic;
......
-- SID
signal SID_CLK_ENABLE : std_logic;
signal SID_AUDIO : SID_AUDIO_TYPE(1 downto 0);
signal SID_AUDIO_SIGNED : SIGNED_AUDIO_TYPE(1 downto 0);
signal SID_FLASH1_ADDR : std_logic_vector(16 downto 0);
signal SID_FLASH1_ROMREQUEST : std_logic;
signal SID_FLASH1_ROMREADY : std_logic;
......
signal PSG_ENABLE_2Mhz : std_logic;
signal PSG_ENABLE_1Mhz : std_logic;
signal PSG_ENABLE : std_logic;
signal PSG_AUDIO : PSG_AUDIO_TYPE(1 downto 0);
signal PSG_AUDIO_UNSIGNED : UNSIGNED_AUDIO_TYPE(1 downto 0);
signal PSG_CHANNEL : PSG_CHANNEL_TYPE(5 downto 0);
signal PSG_CHANGED : std_logic_vector(1 downto 0);
......
signal FANCY_ENABLE : std_logic;
signal FANCY_SWITCH : std_logic;
signal A4_DETECTED : std_logic;
signal GTIA_AUDIO : std_logic;
signal GTIA_AUDIO_OUT : std_logic;
signal GTIA_AUDIO_SIGNED : signed(15 downto 0);
signal EXT_INT : std_logic_vector(20 downto 0);
......
signal CONFIG_ENABLE_NEXT: std_logic;
-- SAMPLE/COVOX
signal SAMPLE_AUDIO : SAMPLE_AUDIO_TYPE(1 downto 0);
signal SAMPLE_AUDIO_SIGNED : SIGNED_AUDIO_TYPE(1 downto 0);
signal SAMPLE_IRQ : std_logic;
signal SAMPLE_RAM_ADDRESS : std_logic_vector(15 downto 0);
signal SAMPLE_RAM_WRITE_ENABLE : std_logic;
......
signal fir_data_address :std_logic_vector(9 downto 0);
signal fir_data_ready :std_logic;
signal SIO_AUDIO : unsigned(15 downto 0);
signal SIO_AUDIO_UNSIGNED : unsigned(15 downto 0);
-- paddles
signal PADDLE_ADJ : std_logic_vector(7 downto 0);
......
else return RIGHT;
end if;
end function min;
function unsigned_to_signed(audio_in : unsigned(15 downto 0)) return signed is
variable ret : std_logic_vector(15 downto 0);
begin
ret(15) := not(audio_in(15));
ret(14 downto 0) := std_logic_vector(audio_in(14 downto 0));
return signed(ret);
end function unsigned_to_signed;
function signed_to_unsigned(audio_in : signed(15 downto 0)) return unsigned is
variable ret : std_logic_vector(15 downto 0);
begin
ret(15) := not(audio_in(15));
ret(14 downto 0) := std_logic_vector(audio_in(14 downto 0));
return unsigned(ret);
end function signed_to_unsigned;
BEGIN
EXT <= (others=>'Z');
......
EXT_INT(ext_bits downto 1) <= EXT;
synchronizer_gtia_audio : entity work.synchronizer
port map (clk=>clk, raw=>EXT_INT(gtia_audio_bit), sync=>GTIA_AUDIO);
port map (clk=>clk, raw=>EXT_INT(gtia_audio_bit), sync=>GTIA_AUDIO_OUT);
synchronizer_fancy_enable : entity work.synchronizer
port map (clk=>clk, raw=>EXT_INT(fancy_switch_bit), sync=>FANCY_SWITCH);
......
CHANNEL_1 => CHANNEL1SUM_REG,
CHANNEL_2 => CHANNEL2SUM_REG,
CHANNEL_3 => CHANNEL3SUM_REG,
VOLUME_OUT_0 => POKEY_AUDIO_0,
VOLUME_OUT_1 => POKEY_AUDIO_1,
VOLUME_OUT_2 => POKEY_AUDIO_2,
VOLUME_OUT_3 => POKEY_AUDIO_3,
VOLUME_OUT_0 => POKEY_AUDIO_UNSIGNED(0),
VOLUME_OUT_1 => POKEY_AUDIO_UNSIGNED(1),
VOLUME_OUT_2 => POKEY_AUDIO_UNSIGNED(2),
VOLUME_OUT_3 => POKEY_AUDIO_UNSIGNED(3),
PROFILE_ADDR => POKEY_PROFILE_ADDR,
PROFILE_REQUEST => POKEY_PROFILE_REQUEST,
PROFILE_READY => POKEY_PROFILE_READY,
......
-- SID
--------------------------------------------------------
sid_off : if enable_sid=0 generate
SID_AUDIO(0) <= (others=>'0');
SID_AUDIO(1) <= (others=>'0');
SID_AUDIO_SIGNED(0) <= to_signed(0,16);
SID_AUDIO_SIGNED(1) <= to_signed(0,16);
SID_DO(0) <= (others=>'0');
SID_DO(1) <= (others=>'0');
SID_DRIVE_DO(0) <= '0';
......
--POT_X => (others=>'0'),
--POT_Y => (others=>'0'),
--EXTFILTER_EN => '0',
AUDIO => SID_AUDIO(0),
AUDIO => SID_AUDIO_SIGNED(0),
SIDTYPE => SID_FILTER1_REG(0),
EXT => "0"&SID_FILTER1_REG(1),
......
--POT_X => (others=>'0'),
--POT_Y => (others=>'0'),
--EXTFILTER_EN => '0',
AUDIO => SID_AUDIO(1),
AUDIO => SID_AUDIO_SIGNED(1),
SIDTYPE => SID_FILTER2_REG(0),
EXT => "0"&SID_FILTER2_REG(1),
......
-- PSG
--------------------------------------------------------
psg_off : if enable_psg=0 generate
PSG_AUDIO(0) <= (others=>'0');
PSG_AUDIO(1) <= (others=>'0');
PSG_AUDIO_UNSIGNED(0) <= to_unsigned(0,16);
PSG_AUDIO_UNSIGNED(1) <= to_unsigned(0,16);
PSG_DO(0) <= (others=>'0');
PSG_DO(1) <= (others=>'0');
end generate psg_off;
......
CHANNEL_MASK_1=>PSG_MIX1, --LABC:RABC
CHANNEL_MASK_2=>PSG_MIX2,
AUDIO_OUT_1 => PSG_AUDIO(0),
AUDIO_OUT_2 => PSG_AUDIO(1),
AUDIO_OUT_1 => PSG_AUDIO_UNSIGNED(0),
AUDIO_OUT_2 => PSG_AUDIO_UNSIGNED(1),
--PROFILE_SELECT=>PSG_PROFILESEL_REG,
PROFILE_ADDR => PSG_PROFILE_ADDR,
......
covox_off : if enable_covox=0 generate
SAMPLE_IRQ <= '0';
SAMPLE_DO <= (others=>'0');
SAMPLE_AUDIO(0) <= (others=>'0');
SAMPLE_AUDIO(1) <= (others=>'0');
SAMPLE_AUDIO_SIGNED(0) <= to_signed(0,16);
SAMPLE_AUDIO_SIGNED(1) <= to_signed(0,16);
ADPCM_STEP_REQUEST <= '0';
end generate covox_off;
......
ADDR => ADDR_IN(1 downto 0),
DI => WRITE_DATA(7 downto 0),
DO => SAMPLE_DO,
AUDIO0 => SAMPLE_AUDIO(0),
AUDIO1 => SAMPLE_AUDIO(1)
AUDIO0 => SAMPLE_AUDIO_SIGNED(0),
AUDIO1 => SAMPLE_AUDIO_SIGNED(1)
);
end generate covox_on;
......
ADDR => ADDR_IN(4 downto 0),
DI => WRITE_DATA(7 downto 0),
DO => SAMPLE_DO,
AUDIO0 => SAMPLE_AUDIO(0),
AUDIO1 => SAMPLE_AUDIO(1),
AUDIO0 => SAMPLE_AUDIO_SIGNED(0),
AUDIO1 => SAMPLE_AUDIO_SIGNED(1),
IRQ => SAMPLE_IRQ,
RAM_ADDR => SAMPLE_RAM_ADDRESS,
......
-------------------------------------------------------
-- AUDIO mixing
GTIA_AUDIO_SIGNED(15) <= not(GTIA_AUDIO_OUT);
GTIA_AUDIO_SIGNED(14 downto 0) <= to_signed(0,15);
mixer1 : entity work.mixer
PORT MAP
(
......
POST_DIVIDE => POST_DIVIDE_REG,
DETECT_RIGHT => DETECT_RIGHT_REG,
FANCY_ENABLE => FANCY_ENABLE,
GTIA_EN => GTIA_ENABLE_REG,
ADC_EN => "1100",
B_CH0_EN => GTIA_ENABLE_REG,
B_CH1_EN => "1100",
CH0 => POKEY_AUDIO_0,
CH1 => POKEY_AUDIO_1,
CH2 => POKEY_AUDIO_2,
CH3 => POKEY_AUDIO_3,
CH4 => unsigned(SAMPLE_AUDIO(0)),
CH5 => unsigned(SAMPLE_AUDIO(1)),
CH6 => unsigned(SID_AUDIO(0)),
CH7 => unsigned(SID_AUDIO(1)),
CH8 => unsigned(PSG_AUDIO(0)),
CH9 => unsigned(PSG_AUDIO(1)),
CHA(14 downto 0) => (others=>'0'),
CHA(15) => GTIA_AUDIO,
CHB => SIO_AUDIO,
L_CH0 => unsigned_to_signed(POKEY_AUDIO_UNSIGNED(0)),
R_CH0 => unsigned_to_signed(POKEY_AUDIO_UNSIGNED(1)),
L_CH1 => unsigned_to_signed(POKEY_AUDIO_UNSIGNED(2)),
R_CH1 => unsigned_to_signed(POKEY_AUDIO_UNSIGNED(3)),
L_CH2 => SAMPLE_AUDIO_SIGNED(0),
R_CH2 => SAMPLE_AUDIO_SIGNED(1),
L_CH3 => SID_AUDIO_SIGNED(0),
R_CH3 => SID_AUDIO_SIGNED(1),
L_CH4 => unsigned_to_signed(PSG_AUDIO_UNSIGNED(0)),
R_CH4 => unsigned_to_signed(PSG_AUDIO_UNSIGNED(1)),
B_CH0 => GTIA_AUDIO_SIGNED,
B_CH1 => unsigned_to_signed(SIO_AUDIO_UNSIGNED),
AUDIO_0_UNSIGNED => AUDIO_0_UNSIGNED,
AUDIO_1_UNSIGNED => AUDIO_1_UNSIGNED,
AUDIO_2_UNSIGNED => AUDIO_2_UNSIGNED,
AUDIO_3_UNSIGNED => AUDIO_3_UNSIGNED
AUDIO_0_SIGNED => AUDIO_MIXED_SIGNED(0),
AUDIO_1_SIGNED => AUDIO_MIXED_SIGNED(1),
AUDIO_2_SIGNED => AUDIO_MIXED_SIGNED(2),
AUDIO_3_SIGNED => AUDIO_MIXED_SIGNED(3)
);
--approx line level by using 5V/4 -> ok 1.25V, should be ok approx
......
clk => clk,
clk2 => CLK116,
ENABLE_179 => ENABLE_CYCLE,
audin => AUDIO_0_UNSIGNED,
audin => signed_to_unsigned(AUDIO_MIXED_SIGNED(0)),
AUDOUT => AUDIO_0_SIGMADELTA
);
......
clk => clk,
clk2 => CLK106,
ENABLE_179 => ENABLE_CYCLE,
audin => AUDIO_1_UNSIGNED,
audin => signed_to_unsigned(AUDIO_MIXED_SIGNED(1)),
AUDOUT => AUDIO_1_SIGMADELTA
);
......
clk => clk,
clk2 => CLK116,
ENABLE_179 => ENABLE_CYCLE,
audin => AUDIO_2_UNSIGNED,
audin => signed_to_unsigned(AUDIO_MIXED_SIGNED(2)),
AUDOUT => AUDIO_2_SIGMADELTA
);
......
clk => clk,
clk2 => CLK106,
ENABLE_179 => ENABLE_CYCLE,
audin => AUDIO_3_UNSIGNED,
audin => signed_to_unsigned(AUDIO_MIXED_SIGNED(3)),
AUDOUT => AUDIO_3_SIGMADELTA
);
......
PORT MAP
(
CLK => clk,
AUDIO_IN => audio_2_unsigned,
AUDIO_IN => signed_to_unsigned(AUDIO_MIXED_SIGNED(2)),
SAMPLE_IN => enable_cycle,
AUDIO_OUT => audio_2_filtered
);
......
PORT MAP
(
CLK => clk,
AUDIO_IN => audio_3_unsigned,
AUDIO_IN => signed_to_unsigned(AUDIO_MIXED_SIGNED(3)),
SAMPLE_IN => enable_cycle,
AUDIO_OUT => audio_3_filtered
);
......
adc_out_signed <= adc_in_signed;
end generate fir_off;
SIO_AUDIO <= unsigned(not(adc_use_reg(15))&adc_use_reg(14 downto 0));
SIO_AUDIO_UNSIGNED <= unsigned(not(adc_use_reg(15))&adc_use_reg(14 downto 0));
process(adc_reg,adc_output,adc_valid,ADC_VOLUME_REG)
variable adc_shrunk : signed(19 downto 0);
......
adc_off : if enable_adc=0 generate
process(SIO_DATA_VOLUME_REG)
begin
SIO_AUDIO(15 downto 0) <= (others=>'0');
SIO_AUDIO_UNSIGNED(15 downto 0) <= (others=>'0');
case SIO_DATA_VOLUME_REG is
when "01" =>
SIO_AUDIO(10) <= SIO_RXD_ADC;
SIO_AUDIO_UNSIGNED(10) <= SIO_RXD_ADC;
when "10" =>
SIO_AUDIO(11) <= SIO_RXD_ADC;
SIO_AUDIO_UNSIGNED(11) <= SIO_RXD_ADC;
when "11" =>
SIO_AUDIO(12) <= SIO_RXD_ADC;
SIO_AUDIO_UNSIGNED(12) <= SIO_RXD_ADC;
when others =>
end case;
end process;

Also available in: Unified diff