Revision 1464
Added by markw 7 months ago
| pokeymax.vhd | ||
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rst : in std_logic;
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adc_lvds_pin : in std_logic;
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adc_fb_pin : out std_logic;
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adc_output : out std_logic_vector(20 downto 0);
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adc_output : out std_logic_vector(19 downto 0);
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adc_valid : out std_logic
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);
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end component;
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| ... | ... | |
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signal enable_reset_min_max : std_logic;
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signal adc_valid : std_logic;
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signal adc_output : std_logic_vector(20 downto 0);
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signal adc_output : std_logic_vector(19 downto 0);
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signal adc_lvds_pin : std_logic;
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signal adc_fb_pin : std_logic;
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| ... | ... | |
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port map(clk=>CLK49152,reset_n=>reset_n,enable_in=>enable_reset_min_max_pre,enable_out=>enable_reset_min_max);
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process(adc_reg,adc_output,adc_valid,ADC_VOLUME_REG)
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variable adc_shrunk : signed(20 downto 0);
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variable adc_shrunk : signed(19 downto 0);
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begin
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adc_next <= adc_reg;
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if (adc_valid='1') then
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adc_shrunk := signed(not(adc_output(20)) & adc_output(19 downto 0));
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adc_shrunk := signed(not(adc_output(19)) & adc_output(18 downto 0));
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case ADC_VOLUME_REG is
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when "01" =>
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adc_next <= adc_shrunk(20 downto (20-16+1)); --*1
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adc_next <= adc_shrunk(19 downto (19-16+1)); --*1
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when "10" =>
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adc_next <= adc_shrunk(19 downto (19-16+1)); --*2
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adc_next <= adc_shrunk(18 downto (18-16+1)); --*2
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when "11" =>
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adc_next <= adc_shrunk(18 downto (18-16+1)); --*4
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adc_next <= adc_shrunk(17 downto (17-16+1)); --*4
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when others =>
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adc_next <= (others=>'0');
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end case;
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end if;
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end process;
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process(adc_out_signed,adc_min_reg,adc_max_reg,adc_diff_reg,enable_reset_min_max,adc_enabled_reg)
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process(adc_out_signed,adc_min_reg,adc_max_reg,adc_diff_reg,enable_reset_min_max,adc_enabled_reg,adc_volume_reg)
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variable detected : std_logic;
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variable threshold : unsigned(11 downto 0);
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begin
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adc_min_next <= adc_min_reg;
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adc_max_next <= adc_max_reg;
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| ... | ... | |
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if (adc_out_signed(15 downto 4)>adc_max_reg) then
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adc_max_next <= adc_out_signed(15 downto 4);
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end if;
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case adc_volume_reg is
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when "01" =>
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threshold := to_unsigned(8,12);
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when "10" =>
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threshold := to_unsigned(16,12);
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when others =>
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threshold := to_unsigned(32,12);
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end case;
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if (enable_reset_min_max='1') then
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detected := '0';
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if (adc_diff_reg>16) then
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if (adc_diff_reg>threshold) then
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detected := '1';
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end if;
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if (detected='1' and adc_enabled_reg<63) then
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Also available in: Unified diff
Correct adc silence threshold for 1x/2x. Correct ADC BITLEN for CIC_STAGES*log2(OVERSAMPLE_RATE)