Revision 1400
Added by markw about 1 year ago
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signal PS2DAT : std_logic;
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-- adc
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signal count_reg : unsigned(7 downto 0);
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signal count_next : unsigned(7 downto 0);
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signal sum_reg : unsigned(7 downto 0);
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signal sum_next : unsigned(7 downto 0);
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| ... | ... | |
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signal toggle_reg : std_logic_vector(255 downto 0);
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signal toggle_next : std_logic_vector(255 downto 0);
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signal decimate_reg : unsigned(3 downto 0);
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signal decimate_next : unsigned(3 downto 0);
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signal ADC_FILTERED1 : unsigned(15 downto 0);
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signal ADC_FILTERED2 : unsigned(15 downto 0);
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| ... | ... | |
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DETECT_RIGHT => DETECT_RIGHT_REG,
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FANCY_ENABLE => FANCY_ENABLE,
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GTIA_EN => GTIA_ENABLE_REG,
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ADC_EN => "1100",
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CH0 => POKEY_AUDIO_0,
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CH1 => POKEY_AUDIO_1,
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| ... | ... | |
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CHA(11) => SIO_RXD_SYNC,
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CHA(10 downto 0) => (others=>'0'),
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CHA(15) => GTIA_AUDIO,
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CHB => ADC_FILTERED2,
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AUDIO_0_UNSIGNED => AUDIO_0_UNSIGNED,
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AUDIO_1_UNSIGNED => AUDIO_1_UNSIGNED,
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| ... | ... | |
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process(clk,reset_n)
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begin
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if (reset_n='0') then
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count_reg <= (others=>'0');
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toggle_reg <= (others=>'0');
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sum_reg <= (others=>'0');
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decimate_reg <= (others=>'0');
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sample_reg <= (others=>'0');
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elsif (clk'event and clk='1') then
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count_reg <= count_next;
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toggle_reg <= toggle_next;
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sum_reg <= sum_next;
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decimate_reg <= decimate_next;
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sample_reg <= sample_next;
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end if;
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end process;
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| ... | ... | |
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tx_in(0) => toggle_reg(0),
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tx_out(0) => ADC_TX_P
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);
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-- ADC_TX <= toggle_reg(0);
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lvds_rx0: lvds_rx
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port map(
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| ... | ... | |
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clock => CLK,
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q(0) => toggle_next(0)
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);
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-- toggle_next(0) <= not(ext_in);
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toggle_next(255 downto 1) <= toggle_reg(254 downto 0);
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adcfilter : entity work.simple_low_pass_filter
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| ... | ... | |
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AUDIO_OUT => ADC_FILTERED2
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);
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process(count_reg,sum_reg,sample_reg,toggle_reg,decimate_reg)
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process(sum_reg,sample_reg,toggle_reg)
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begin
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count_next <= count_reg;
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sum_next <= sum_reg;
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sample_next <= sample_reg;
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decimate_next <= decimate_reg;
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if (toggle_reg(255)='1' and toggle_reg(0)='0') then
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sum_next <= sum_reg -1;
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| ... | ... | |
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end generate adc_off;
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paddle_lvds_on : if paddle_lvds=1 generate
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--PADDLE_ADJ <= PADDLE_P;
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--PADDLE_P <= (others=>'0') when POTRESET='1' else (others=>'Z');
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-- lvds
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-- paddle_lvds_tx0: lvds_tx
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-- port map(
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-- tx_in(0) => toggle_reg(0),
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-- tx_out(0) => PADDLE_P(0)
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-- );
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-- ADC_TX <= toggle_reg(0);
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paddle_lvds_rx0: paddle_gpio
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port map(
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dout => PADDLE_ADJ,
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Also available in: Unified diff
Mix ADC in