Revision 1335
Added by markw almost 4 years ago
| build.sh | ||
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`cp slave_timing_6502$bus.vhd $dir/slave_timing_6502.vhd`;
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`cp swapbits $dir`;
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`cp $type*.sdc $dir`;
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`cp $type$board.sdc $dir/$type.sdc`;
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`cp $type*.qpf $dir`;
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`cp -r int_osc* $dir`;
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`cp -r pll* $dir`;
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Also available in: Unified diff
Correct v3 sdc file, was effectively entirely missing which broke flash timing. Still needs more work since the sigma delta inputs are effectively not properly constrained.