Torid support for mcc
Torid works!
Shrunk some logging
Changed from iprintf to hub_debugf, so save rom when enabling iprintf
Debugged usb logging a little
Some primitive ram test code - disabled for now
Not sure quite what I was trying to do here, but it works. Fix 0 size writes?!
Added eclairexl to build
DE1 connector spacing (20mm). Improved mounting holes.
Torid support - untested as yet. Its not HID but hack it to work! TODO: more generic support
Moved traces away from mounting holes to remove risk of taking out traces with screws... Harder than expected!
Fixed audio connector footprint/location. Fixed oscilator footprint (fitted but was too large). Added 16 pin support for serial init rom. Moved reset switch location to allow this. Added pull ups and decoupling to ADC (still untested). Added some more 2.5mm drill holes on the right for stencil positioning. Increased 2.5mm drill size by 1 notch (was too small to fit). Added solder pads for din connectors. Fixed footprint for phono connector. Increased resistor array size to allow fixing by hand more easily. Added pin headers to allow bypassing resistor arrays in case of issues soldering thsm! Added pin header borders to board to make it clear how much space is needed around them for sockets. Made room for jtag pin header socket. Increased version to v1.1. Added decoupling cap to oscillator. Added voltage test point header. Power ADC by 5V (it allows 2.7V to 5.5v but higher reduces changes of breaking it by high voltage inputs I think). Think thats it. Will review a bit then make the next board revision.
Way to scanning for bad connections on gpio ports and store in ram
ip for loading into passive serial chip - not included for now
add vga clock. Revert keyboard response change, it was correct before there are just gpio shorts/bad conns
Set chip type for builds with internal rom and ram
run quartus!
debugged
Add low drive strength, particularly while checking for shorts!
fix keyboard. Add a hardware test gpio version to just turn on each pin in turn.
Added internal rom ram mode
Eagle projects for the DE1 and EclaireXL breakout boards. Also the project for the EclaireXL mainboard. The breakboard boards are tested, though there are a few known issues to fix (connect that airwire at the least!!). The EclaireXL is untested as yet.
Debugged usb logging
usb debug support to fix torid
Disable playfield DMA when mode dmactl(1 downto 0)=="00". Fixes turmoil and spider city. I am sure I also need to fix the dma clock since this is not a case I really thought anything used. Still it passes acid and fixes these games so committing as is. Thanks to Phaeron for the help with this one!
Allow 2nd joypad to press select too
Added return to boot menu to a800 mcc cores
Hold select(pause) for 5 seconds to return to boot menu
Typo for reset
Firmware changes for 5200 joystick control in the menu
Fix menu control with stick on 5200. Add escape support by pressing both stick triggers. Make accidental reboot harder on 5200. Now reboot is on right stick + trigger on both platforms. Still on trig2 for a800 which only has one fire button.
Paddle fixes. Enable pokey even when only ZPU active. Fix allpot.
Started on USB support. Added builds for A2 and A9. A2 will be standard and I acquired a few A9s to play with!
Set up pll for PAL and real clock
No idea what this is or why I checked it in;-)
Fixed antic seperate bank switching
Allow both joysticks to control menu. Some small USB fixes.
Allow 2nd joystick to control menu. Some small USB fixes.
Updated firmware
Added bin file, a header stripped bit needed for sd card
Rebuild of ZPU firmware to pick up SIO patches from Hias
Patches to improve SIO from Hias. Many thanks!
Official wireless controller support
Add aeon lite to official build - I have built my board now and checked it works ok.
New memory map
Added memory map
Added support for mcc wireless joypad
command missing from sensitivity list
Use both SDRAM chips, support 576KB modes. Space was left in the memory map for the turbo freezer, but for now I cannot get it to fit in the LX9.
Aeon lite memory map improvements.
Use generics for system settings like other cores. The plan is to use a settings file eventually and pll reconfig. For now...
Removed this version, the other one sounds better
Now running on my board. Temporarily using papilio memory mapping - just 512KB.
Reverted the change that broke acid
Stimer should not reset serial port. Reset audio output flip-flops on stimer. TODO: This breaks an acid test, but that is another bug I think this was hiding.
Fixed linux build
Add breakout board support. Pass clockin/clockout to pokey (untested).
Made the same as Robins version, which worked!
Patch from Hias to fix dropped command packets. Many thanks for digging into this!
Added missing file
Do not disable AVR, having it reset screws things up. Switch PS2 back to port1. Add LEDs for SIO state.
Infer a multipler for pokey lookup
Added synchronizer
Reverted antic highres "fixes" that break numen. circa r256/257
Simple memory saving support - to help debugging
Fix 480i interlace. Vsync needs to be on exactly the right row, also the AN2 must be disabled by clearing bits 0 or 1 on dmactl.
Added Drive turbo selection. Fixed a few builds. Added which target is building to output. Run up to 3 jobs at once during build.
Run 2 jobs at once
Split the concept of hsync, vsync and composite sync. When composite sync used tie vsync high. The offset hsync pulse of pal/hsync is only present for 15khz composite sync. Remove rom selection since its unused.
fix sockit path
Scanlines were broken by last change (were alternating each frame)
Do not background - not got enough ram here
Added RGBHV
Latest firmware and added papilio duo to build scripts
Add weak pull-ups on data lines for cartridge/pbi
Allow 64k carts to work. Switch keyboard to PS2 port 2.
Changed mem addresses
The banks have a hole from 64k-256k, use this for the os rom, freeze and directory cache
papilio duo support
Switched DAC
Aded papilio duo
Added low memory type 2 - for papilio and its 512k
Resync output to input hsync
Added multiple build types
Added 32 bit sram access to make zpu work
fixed ucf use
sram works, boots, keyboard works
Fixed PLL to more appropriate for PAL/NTSC with he 32MHz input clock. Should work now, although no ZPU yet!
replacing with pal/ntsc plls of correct input frequency
First cut of papilio duo support. NB: This does not work yet, notably PLL needs changing. Then sram needs wiring up to allow zpu to run.
Added inferred multiplier
EDBLL apparently works with lower drive strength - there are some crosstalk issues I read. Added GPIO lower drive strength. Removed 25ohm resistors.
Now builds ok - disabled some features to fit in device. Also optimised pokey mixer.
Space reduction to fit onto a Spartan 6 LX9. Allow disabling stereo and covox. Also replace pokey non-linear table with a piecewise linear function rather than a LUT