Allow SPI clock speed to be set by generic. It was running at half speed for 28MHz platforms vs 58MHz platforms. Need to improve spi speed since byte wise writing is too slow loading roms - 8 seconds on startup!
Antic refresh always takes one original cycle - this fixes turbo mode up to 4x on mcc
Added fkeys
Added missing spi component! Fix pokey instantiation. Fix pause.
Connect up snoop to allow ZPU to see the data it requested
Always complete sram request if we have no sram
Fixed turbo
No need for mmu to deal with refresh at all
Add an additional internal rom option - internal_rom=2, which for now just loops reading/writing 4 bytes. e.g. for testing new RAM setups
Re-connected SDRAM to DE1
Pass through video bigs
Added video bits to generic, since I am having to adjust this everywhere.
to_01 silenced sim, but caused build issues on Xilinx. If its invalid use 0
to_01 silenced sim, but caused build issues. If its invalid use 0.
Pass through some PBI signals needed for SDRAM
Expose pots, lightpen. Fix joystick bit ordering comments.
added ps2_keys_reg to sensitivity list (was missing)
Split ROM into its own process, to make it easier for Quartus to infer
Split up into 2 sections. Quartus will not infer the ram block with it mixed
Clock pause by pokey enable, so its a fixed speed even if system clock 28MHz,57MHz or otherwise
Renamed poly_* to pokey_poly_* since it is part of pokey
Cleaned up ZPU into slightly more generic form, though still clearly atari core targetted. Added inital tb, though needs rom to verify more. MIST sector side removed, but should be possible with external changes. Now ZPU instead has lots of GPIO.
Allow palette selection - with one option GTIA direct to allow external scandouble (with less memory)
Renamed sim script to match
Compiled/ran helloworld in sim. Appears fine...
First cut at simple toplevel for the atari800xl - needs checking with isim...
Make these generic to support Replay (28MHz) and the rest (57MHz)
Current unmerged vhdl for my Atari800 core and start at merging them into one tree with a common core