Infer a multipler for pokey lookup
Added synchronizer
Split the concept of hsync, vsync and composite sync. When composite sync used tie vsync high. The offset hsync pulse of pal/hsync is only present for 15khz composite sync. Remove rom selection since its unused.
Scanlines were broken by last change (were alternating each frame)
Resync output to input hsync
USB host from opencores - lgpl
Paddle on mist a800. Added NTSC palette. Added support for 4k and 8k roms to 5200 - need to wire up to cartlogic really...
Changes for Aeon lite - notably 1MB ram support and ise build warnings fixed
Added scanlines support
Allow more than 4 bits of precision
Fixed turbo
Re-connected SDRAM to DE1
to_01 silenced sim, but caused build issues on Xilinx. If its invalid use 0
Split up into 2 sections. Quartus will not infer the ram block with it mixed
Cleaned up ZPU into slightly more generic form, though still clearly atari core targetted. Added inital tb, though needs rom to verify more. MIST sector side removed, but should be possible with external changes. Now ZPU instead has lots of GPIO.
Current unmerged vhdl for my Atari800 core and start at merging them into one tree with a common core