Activity
From 04/08/2017 to 05/07/2017
05/04/2017
- FO 09:25 PM Feature #13: 32x speed cpu without wait states
- Nope, this is not going to be so simple... Massive timing violations.
05/02/2017
- FO 10:15 PM Feature #14: Svideo core for first prototype
- Debugged in isim to get lots of overflow/underflow/blanking/burst incorrect cases!
Added colour bars and asserts for under/overflow. Looks like we have more space than I thought to allow slightly higher luma scaling (224/256). Verifying... - FO 06:40 AM Feature #14: Svideo core for first prototype
- Scaled luma with 64 space for chroma - when in composite mode only. No point throwing away svideo brightness.
Added composite to video selection menu - since the G pin is used for both it can't be generated together.
Built for v1 a...
04/26/2017
- FO 08:54 PM Feature #14: Svideo core for first prototype
- Setting this up in the simulator so I can understand chroma better.
The problem seems to be that I've used all the space for luma and chroma is a sine wave +-255. For some reason it only allows space of 32 though - which is odd! Anywa... - FO 08:51 PM Feature #13: 32x speed cpu without wait states
- I have something working on the simulator - alone. Now need to plug it into the core proper to see if it works. Will probably need some clever timequest rules too, since the read/write deadlines are different now.
04/24/2017
- FO 10:14 PM Feature #14: Svideo core for first prototype
- Should add that this should not be done for direct chroma output for svideo... Since that is still on a 0-0.7V DAC output.
- FO 10:14 PM Feature #14: Svideo core for first prototype
- Panos tried out a new core with composite only - on green using the sync pin. Looks brighter but just black and white - on several TVS.
I think its black and white because...
Basically I re-scaled Y to use the full DAC range. Compo... - FO 07:58 PM Feature #14 (Closed): Svideo core for first prototype
- Waiting the Chinese sun to rising, I decide to proceed with the "video mod" of our v 1.0 board. So I desolder the "vsync" pin 12 of video dac, and solder it again using a "kynar cable" to a near via, which drive directly to F15 of FPGA.
...
04/12/2017
- FO 10:07 PM Feature #13 (In Progress): 32x speed cpu without wait states
- Trying simply feeding in the clock at twice the speed to see if it passes timing!
04/11/2017
- SA 09:46 PM Feature #1: Svideo sync line support
- admin wrote:
> Doesn't look too hard to change. In the svideo component they do this for luma:
> ...
\
In all the cases we need to connect the sync pin of dac on a I/O of fpga?
- FO 08:35 PM Feature #1 (Resolved): Svideo sync line support
- Implemented in test core, probably will need some debugging...
04/08/2017
- FO 08:08 PM Feature #13 (New): 32x speed cpu without wait states
- The whole system is clocked at 32*original clock. However the 6502 turbo is limited to 16x due to the ram speed, since a block ram access cycle takes 2 cycles. Try to clock the block ram at 64* original clock as a quick win to get 32x tu...