EclaireXL

04/26/2017

FO 08:54 PM Feature #14: Svideo core for first prototype

Setting this up in the simulator so I can understand chroma better.
The problem seems to be that I've used all the space for luma and chroma is a sine wave +-255. For some reason it only allows space of 32 though - which is odd! Anywa... foft

FO 08:51 PM Feature #13: 32x speed cpu without wait states

I have something working on the simulator - alone. Now need to plug it into the core proper to see if it works. Will probably need some clever timequest rules too, since the read/write deadlines are different now. foft

04/24/2017

FO 10:14 PM Feature #14: Svideo core for first prototype

Should add that this should not be done for direct chroma output for svideo... Since that is still on a 0-0.7V DAC output. foft

FO 10:14 PM Feature #14: Svideo core for first prototype

Panos tried out a new core with composite only - on green using the sync pin. Looks brighter but just black and white - on several TVS.
I think its black and white because...
Basically I re-scaled Y to use the full DAC range. Compo... foft

FO 07:58 PM Feature #14 (Closed): Svideo core for first prototype

Waiting the Chinese sun to rising, I decide to proceed with the "video mod" of our v 1.0 board. So I desolder the "vsync" pin 12 of video dac, and solder it again using a "kynar cable" to a near via, which drive directly to F15 of FPGA.
... foft

04/12/2017

FO 10:07 PM Feature #13 (In Progress): 32x speed cpu without wait states

Trying simply feeding in the clock at twice the speed to see if it passes timing! foft

04/11/2017

SA 09:46 PM Feature #1: Svideo sync line support

admin wrote:
> Doesn't look too hard to change. In the svideo component they do this for luma:
> ...
\
In all the cases we need to connect the sync pin of dac on a I/O of fpga?
sadosp

FO 08:35 PM Feature #1 (Resolved): Svideo sync line support

Implemented in test core, probably will need some debugging... foft

04/08/2017

FO 08:08 PM Feature #13 (New): 32x speed cpu without wait states

The whole system is clocked at 32*original clock. However the 6502 turbo is limited to 16x due to the ram speed, since a block ram access cycle takes 2 cycles. Try to clock the block ram at 64* original clock as a quick win to get 32x tu... foft

04/07/2017

FO 09:37 PM Feature #2 (In Progress): PBI support

foft

FO 08:57 PM Feature #12 (In Progress): Set up redmine backups!

Adding svn backups too while at it.
Need to do these to the raid instead of to another local disk though really...
foft

FO 08:41 PM Feature #12: Set up redmine backups!

Added file backups
Both these are as crons under postgres_backup user foft

FO 08:23 PM Feature #12: Set up redmine backups!

Added postgres backups.
TODO: verify it runs from cron ok foft

FO 07:53 PM Bug #9 (Rejected): Fix svn repository

Decided to just disable this - its complicated enough anyway an the svn can already be checked out or browsed. foft

FO 07:45 PM Feature #10 (Closed): Set up email in redmine

Found password, set up config and tested ok. foft

04/05/2017

FO 10:06 PM Feature #12 (Closed): Set up redmine backups!

Set up backups for this... foft

FO 09:13 PM Bug #9: Fix svn repository

Removed for now foft

AD 09:12 PM Feature #10: Set up email in redmine

Need password! admin

FO 06:59 AM Feature #11 (New): Non-uk keyboard support (custom keyboard mapping)

Only a uk keyboard with stickers is supported right now.
Make this remappable via a file. foft

04/04/2017

FO 09:12 PM Feature #10 (Closed): Set up email in redmine

foft

FO 09:12 PM Bug #9: Fix svn repository

via redmine... foft

FO 09:11 PM Bug #9 (Rejected): Fix svn repository

Repository is not working foft

AD 09:08 PM Feature #8 (Closed): Implement 4 channel ADC

The one channel ADC on the v1 board is replaced by a four channel one on the v2 board.
Modify the implementation to support this admin

AD 09:07 PM Feature #7 (New): Implement I2C vga/hdmi support

Try the I2C support on the new board.
Initially for presence detection
Latest for checking modes
Its via a mux chip so we can independently address both ports admin

AD 09:06 PM Bug #6 (Closed): HDMI audio poor quality

I removed a low division in the audio output to meet timing. I suspect this should be replaced with a proper low pass filter. admin

AD 09:05 PM Bug #5 (Closed): SIDE2 does not work

SIDE1 works fine, but SIDE2 does not work. I contacted Sebastian and he kindly send me some details. Need to look into this. Suspect its down to dynamic RD4/RD5. admin

FO 08:51 PM Bug #4 (Closed): Galaxian flickers on scrolling - when using real cartridge

Galaxian flickers on scrolling when using a real cartridge. This does not happen when using the virtual cartridge.
I suspect its down to the antic writes happening on the 2nd colour clock of a cycle rather than the first. Might be wor... foft

FO 08:48 PM Feature #3 (New): High resolution antic support

DMACTL bit 5 is normally playfield dma on.
In the core bit 6 is also supported to allow
10 - 2x colour clock - allowing 640x240 - or gtia 160x240
11 - 4x colour clock - allowing 1280x240 - or gtia 320x240
The core of the support ... foft

FO 08:45 PM Feature #2 (Closed): PBI support

Implement PBI support:
Done:
PBI_A
PBI_D
PBI_CLK
PBI_RW_N
PBI_IRQ_N
PBI_RST_N
High priority:
PBI_EXTSEL_N
PBI_MPD_N
PBI_REF_N (including turbo freezer hack)
These are tricky because they are sampled at different ... foft

FO 08:30 PM Feature #1: Svideo sync line support

A comment foft

AD 08:20 PM Feature #1 (Closed): Svideo sync line support

Doesn't look too hard to change. In the svideo component they do this for luma:
luma = (84*R+164*G+32*B + 58880)/512 (i.e. 115-255 on dac)
luma (sync) = 0 (i.e. 0 on dac during sync peri... admin