Activity

From 04/09/2017 to 05/08/2017

FO 10:08 PM EclaireXL Feature #8 (In Progress): Implement 4 channel ADC: Written initial support based on data sheet and simulated. Not yet built into test core or tried on real hardware.
So far all four channels sampled, but only SIO input connected to core. foft

FO 09:25 PM EclaireXL Feature #13: 32x speed cpu without wait states: Nope, this is not going to be so simple... Massive timing violations. foft

FO 08:27 PM EclaireXL Missing parts: Panos is waiting for the last few remaining parts to arrive. Most notably the FT232 USB chip. We're expecting they will arrive later this week. foft

FO 10:15 PM EclaireXL Feature #14: Svideo core for first prototype: Debugged in isim to get lots of overflow/underflow/blanking/burst incorrect cases!
Added colour bars and asserts for under/overflow. Looks like we have more space than I thought to allow slightly higher luma scaling (224/256). Verifying... foft
FO 06:40 AM EclaireXL Feature #14: Svideo core for first prototype: Scaled luma with 64 space for chroma - when in composite mode only. No point throwing away svideo brightness.
Added composite to video selection menu - since the G pin is used for both it can't be generated together.
Built for v1 a... foft
FO 06:38 AM EclaireXL Sub PCB - now populated!: !sub-board-pop.jpg! foft

FO 09:06 PM EclaireXL Sub-board: Here is the first picture of a sub-board, which also arrived in Greece. None completed yet but all the parts fit - and they fit in the Mhero S R case.
!sub-board.jpg!
foft
FO 09:01 PM EclaireXL Video DAC regulator patch: Here is a picture of the patch Panos has skillfully applied to the boards.
!patch.jpg! foft
FO 08:58 PM EclaireXL Boards received: The boards arrived in Greece. Panos is in the process of adding some final parts and trying them out.
Some good news:
FPGA is seen on JTAG
FPGA can be flashed ok
The core runs, the USB keyboard is working, SD card access is workin... foft

SA 11:43 PM EclaireXL Document: Eclaire XL v1.0 Board Spec: Eclaire XL v1.0 Board Spec sadosp
SA 11:43 PM EclaireXL Eclaire XL v1.0.jpg: sadosp
SA 11:43 PM EclaireXL Eclaire XL v1.0 b.JPG: sadosp
SA 11:42 PM EclaireXL Eclaire XL v1.0 Spec.odt: sadosp
SA 11:42 PM EclaireXL Eclaire XL v1.0 Spec.jpg: sadosp
FO 08:54 PM EclaireXL Feature #14: Svideo core for first prototype: Setting this up in the simulator so I can understand chroma better.
The problem seems to be that I've used all the space for luma and chroma is a sine wave +-255. For some reason it only allows space of 32 though - which is odd! Anywa... foft
FO 08:51 PM EclaireXL Feature #13: 32x speed cpu without wait states: I have something working on the simulator - alone. Now need to plug it into the core proper to see if it works. Will probably need some clever timequest rules too, since the read/write deadlines are different now. foft

FO 10:14 PM EclaireXL Feature #14: Svideo core for first prototype: Should add that this should not be done for direct chroma output for svideo... Since that is still on a 0-0.7V DAC output. foft
FO 10:14 PM EclaireXL Feature #14: Svideo core for first prototype: Panos tried out a new core with composite only - on green using the sync pin. Looks brighter but just black and white - on several TVS.
I think its black and white because...
Basically I re-scaled Y to use the full DAC range. Compo... foft
FO 07:58 PM EclaireXL Feature #14 (Closed): Svideo core for first prototype: Waiting the Chinese sun to rising, I decide to proceed with the "video mod" of our v 1.0 board. So I desolder the "vsync" pin 12 of video dac, and solder it again using a "kynar cable" to a near via, which drive directly to F15 of FPGA.
... foft
FO 07:56 PM EclaireXL Pictures!: The PCB company sent us an initial picture!
!v3board_small.jpg! foft

FO 10:19 PM EclaireXL Delays: We received an update from the PCB company. Unfortunately it wasn't to say 'shipping' as we'd hoped.
Instead they requested some more information for their machine setup, so apparently they have not started assembly yet as promised!
... foft

FO 10:07 PM EclaireXL Feature #13 (In Progress): 32x speed cpu without wait states: Trying simply feeding in the clock at twice the speed to see if it passes timing! foft

SA 09:46 PM EclaireXL Feature #1: Svideo sync line support: admin wrote:
> Doesn't look too hard to change. In the svideo component they do this for luma:
> ...
\
In all the cases we need to connect the sync pin of dac on a I/O of fpga?
sadosp
FO 08:35 PM EclaireXL Feature #1 (Resolved): Svideo sync line support: Implemented in test core, probably will need some debugging... foft

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