Index: de1_5200/zpu_rom.vhdl
===================================================================
--- de1_5200/zpu_rom.vhdl	(revision 197)
+++ de1_5200/zpu_rom.vhdl	(revision 198)
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Index: mcc216/zpu_rom.vhdl
===================================================================
--- mcc216/zpu_rom.vhdl	(revision 197)
+++ mcc216/zpu_rom.vhdl	(revision 198)
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 );
Index: mcctv/zpu_rom.vhdl
===================================================================
--- mcctv/zpu_rom.vhdl	(revision 197)
+++ mcctv/zpu_rom.vhdl	(revision 198)
@@ -180,8 +180,8 @@
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 );
Index: mist/zpu_rom.vhdl
===================================================================
--- mist/zpu_rom.vhdl	(revision 197)
+++ mist/zpu_rom.vhdl	(revision 198)
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@@ -3638,24 +3636,15 @@
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 X"00000000",
Index: replay/Replay.prj
===================================================================
--- replay/Replay.prj	(revision 197)
+++ replay/Replay.prj	(revision 198)
@@ -30,6 +30,7 @@
 Replay_JoyPS2.vhd
 Replay_Audio.vhd
 Replay_MousePointer.vhd
+cart_logic.vhd
 address_decoder.vhdl
 antic_counter.vhdl
 antic_dma_clock.vhdl
@@ -50,6 +51,7 @@
 pia.vhdl
 pokey_countdown_timer.vhdl
 pokey_keyboard_scanner.vhdl
+pokey_mixer_mux.vhdl
 pokey_mixer.vhdl
 pokey_noise_filter.vhdl
 pokey.vhdl
@@ -63,6 +65,7 @@
 syncreset_enable_divider.vhd
 wide_delay_line.vhdl
 basic.vhdl
+os_5200.vhdl
 os16.vhdl
 os2.vhdl
 os8.vhdl
Index: aeon_lite/zpu_rom.vhdl
===================================================================
--- aeon_lite/zpu_rom.vhdl	(revision 197)
+++ aeon_lite/zpu_rom.vhdl	(revision 198)
@@ -180,8 +180,8 @@
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-X"a938ff12",
-X"5271ff2e",
-X"98387270",
-X"81055433",
-X"74708105",
-X"5634ff12",
-X"5271ff2e",
-X"098106ea",
-X"387483e0",
-X"800c863d",
-X"0d047451",
-X"72708405",
-X"54087170",
-X"8405530c",
-X"72708405",
-X"54087170",
-X"8405530c",
-X"72708405",
-X"54087170",
-X"8405530c",
-X"72708405",
-X"54087170",
-X"8405530c",
-X"f0125271",
-X"8f26c938",
-X"83722795",
-X"38727084",
-X"05540871",
-X"70840553",
-X"0cfc1252",
-X"718326ed",
-X"387054ff",
-X"81390000",
+X"fc050870",
+X"83e0800c",
+X"51833d0d",
+X"83e08c0c",
+X"04000000",
 X"00ffffff",
 X"ff00ffff",
 X"ffff00ff",
@@ -3895,24 +3855,15 @@
 X"f4f5f6f7",
 X"f8f9fafb",
 X"fcfdfeff",
-X"70704740",
-X"2c704268",
-X"2c020202",
-X"02020202",
-X"02020202",
-X"02020202",
-X"02020202",
-X"02020241",
-X"00060000",
-X"00002af5",
-X"00002b36",
-X"00002b58",
-X"00002b77",
-X"00002b77",
-X"00002b77",
-X"00002b77",
-X"00002be7",
-X"00002c18",
+X"00002ac4",
+X"00002b05",
+X"00002b27",
+X"00002b4e",
+X"00002b4e",
+X"00002b4e",
+X"00002b4e",
+X"00002bbf",
+X"00002c11",
 X"25732025",
 X"73000000",
 X"2e2e0000",
@@ -3919,8 +3870,6 @@
 X"41545200",
 X"58464400",
 X"58455800",
-X"524f4d00",
-X"42494e00",
 X"43686f6f",
 X"73652000",
 X"66696c65",
@@ -3961,11 +3910,11 @@
 X"65202564",
 X"3a257320",
 X"25730000",
+X"4e4f4e45",
+X"00000000",
 X"43617274",
-X"72696467",
-X"6520386b",
-X"2073696d",
-X"706c6500",
+X"3a202573",
+X"00000000",
 X"45786974",
 X"00000000",
 X"61746172",
@@ -3975,18 +3924,59 @@
 X"69626173",
 X"2e726f6d",
 X"00000000",
+X"524f4d00",
+X"42494e00",
+X"43415200",
 X"6e616d65",
 X"20000000",
 X"00000000",
 X"00000000",
-X"00003d1c",
-X"00003d20",
-X"00003d28",
-X"00003d34",
-X"00003d40",
-X"00003d4c",
-X"00003d58",
-X"00003d5c",
+X"01010008",
+X"02210010",
+X"080d0040",
+X"090a0040",
+X"0a090040",
+X"0b080040",
+X"0c300020",
+X"0d310040",
+X"0e320080",
+X"0f040010",
+X"110c0080",
+X"17330100",
+X"18340200",
+X"1a280010",
+X"1b290020",
+X"1c2a0040",
+X"1d2b0080",
+X"1e2c0100",
+X"1f2d0200",
+X"21380020",
+X"22390040",
+X"233a0080",
+X"243b0100",
+X"253c0200",
+X"28230010",
+X"29020080",
+X"2a030400",
+X"38240200",
+X"00000000",
+X"70704740",
+X"2c704268",
+X"2c020202",
+X"02020202",
+X"02020202",
+X"02020202",
+X"02020202",
+X"02020241",
+X"00060000",
+X"00003c50",
+X"00003c54",
+X"00003c5c",
+X"00003c68",
+X"00003c74",
+X"00003c80",
+X"00003c8c",
+X"00003c90",
 X"72025f07",
 X"f807a900",
 X"8d04038d",
@@ -4114,6 +4104,16 @@
 X"00000000",
 X"00000000",
 X"00000000",
+X"00000000",
+X"00000000",
+X"00000000",
+X"00000000",
+X"00000000",
+X"00000000",
+X"00000000",
+X"00000000",
+X"00000000",
+X"00000000",
 X"00000000"
 
 );
Index: buildall.sh
===================================================================
--- buildall.sh	(revision 197)
+++ buildall.sh	(revision 198)
@@ -1,7 +1,7 @@
 export PATH=${PATH}:/home/markw/fpga/altera/13.0sp1/quartus/bin
 #export PATH=${PATH}:/home/markw/fpga/altera/14.0/quartus/bin
 cd de1
-./build.sh > build.log 2> build.err&
+./build.sh ALL > build.log 2> build.err&
 cd ../chameleon
 ./build.sh ALL > build.log 2> build.err&
 cd ../replay
@@ -10,6 +10,12 @@
 ./build.sh ALL > build.log 2> build.err&
 cd ../mcc216
 ./build.sh ALL &
+cd ../mcctv
+./build.sh ALL &
+cd ../mist_5200
+./build.sh ALL > build.log 2> build.err&
+cd de1_5200
+./build.sh ALL > build.log 2> build.err&
 
 # TODO variations?
 # TODO SOCkit
Index: chameleon/atari800core_chameleon.vhd
===================================================================
--- chameleon/atari800core_chameleon.vhd	(revision 197)
+++ chameleon/atari800core_chameleon.vhd	(revision 198)
@@ -227,6 +227,7 @@
 	signal reset_atari : std_logic;
 	signal pause_atari : std_logic;
 	SIGNAL speed_6502 : std_logic_vector(5 downto 0);
+	signal emulated_cartridge_select: std_logic_vector(5 downto 0);
 
 	SIGNAL PAL : std_logic;
 	SIGNAL COMPOSITE_ON_HSYNC : std_logic;
@@ -434,7 +435,8 @@
     		ROM_SELECT => rom_select,
 		PAL => PAL,
 		HALT => pause_atari,
-		THROTTLE_COUNT_6502 => speed_6502
+		THROTTLE_COUNT_6502 => speed_6502,
+		emulated_cartridge_select => emulated_cartridge_select
 	);
 
 -- video glue
@@ -1110,6 +1112,7 @@
 	speed_6502 <= zpu_out1(7 downto 2);
 	ram_select <= zpu_out1(10 downto 8);
 	rom_select <= zpu_out1(16 downto 11);
+	emulated_cartridge_select <= zpu_out1(22 downto 17);
 
 zpu_rom1: entity work.zpu_rom
 	port map(
Index: chameleon/zpu_rom.vhdl
===================================================================
--- chameleon/zpu_rom.vhdl	(revision 197)
+++ chameleon/zpu_rom.vhdl	(revision 198)
@@ -180,8 +180,8 @@
 X"00000000",
 X"00000000",
 X"71fc0608",
-X"0b0b80f8",
-X"80738306",
+X"0b0b80f7",
+X"f8738306",
 X"10100508",
 X"060b0b0b",
 X"88a20400",
@@ -228,7 +228,7 @@
 X"00000000",
 X"00000000",
 X"810b80fb",
-X"d80c5104",
+X"b00c5104",
 X"00000000",
 X"00000000",
 X"00000000",
@@ -300,8 +300,8 @@
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-X"757580f2",
-X"b02d5050",
+X"757580f3",
+X"c32d5050",
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@@ -310,7 +310,7 @@
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 X"e0880875",
-X"7580f0c4",
+X"7580f1d7",
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@@ -319,651 +319,681 @@
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-X"fc3d0d76",
-X"705255b3",
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-X"2e8e3873",
-X"335372ae",
-X"2e8638ff",
-X"1454ef39",
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-X"51b38f3f",
-X"83e08008",
-X"307083e0",
-X"80080780",
-X"2583e080",
-X"0c53863d",
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+X"83e0800c",
+X"853d0d83",
+X"e08c0c04",
 X"83e08c08",
-X"f8050883",
+X"0283e08c",
+X"0cff3d0d",
+X"800b83e0",
+X"8c08fc05",
+X"0c83e08c",
+X"08880508",
+X"8106ff11",
+X"70097083",
+X"e08c088c",
+X"05080683",
 X"e08c08fc",
-X"05080783",
-X"e08c08f8",
+X"05081183",
+X"e08c08fc",
 X"050c83e0",
-X"8c08fc05",
+X"8c088805",
 X"08812a83",
-X"e08c08fc",
+X"e08c0888",
 X"050c83e0",
 X"8c088c05",
-X"08812a83",
-X"e08c088c",
-X"050cff95",
-X"3983e08c",
-X"08900508",
-X"802e9338",
-X"83e08c08",
-X"88050870",
-X"83e08c08",
-X"f4050c51",
-X"913983e0",
-X"8c08f805",
-X"087083e0",
-X"8c08f405",
-X"0c5183e0",
-X"8c08f405",
-X"0883e080",
-X"0c853d0d",
-X"83e08c0c",
-X"0483e08c",
-X"080283e0",
-X"8c0cff3d",
-X"0d800b83",
+X"081083e0",
+X"8c088c05",
+X"0c515151",
+X"5183e08c",
+X"08880508",
+X"802e8438",
+X"ffab3983",
 X"e08c08fc",
-X"050c83e0",
-X"8c088805",
-X"088106ff",
-X"11700970",
-X"83e08c08",
-X"8c050806",
-X"83e08c08",
-X"fc050811",
-X"83e08c08",
-X"fc050c83",
-X"e08c0888",
-X"0508812a",
-X"83e08c08",
-X"88050c83",
-X"e08c088c",
-X"05081083",
-X"e08c088c",
-X"050c5151",
-X"515183e0",
-X"8c088805",
-X"08802e84",
-X"38ffab39",
-X"83e08c08",
-X"fc050870",
-X"83e0800c",
-X"51833d0d",
-X"83e08c0c",
-X"04fc3d0d",
-X"7670797b",
-X"55555555",
-X"8f72278c",
-X"38727507",
-X"83065170",
-X"802ea938",
-X"ff125271",
-X"ff2e9838",
-X"72708105",
-X"54337470",
-X"81055634",
-X"ff125271",
-X"ff2e0981",
-X"06ea3874",
-X"83e0800c",
-X"863d0d04",
-X"74517270",
-X"84055408",
-X"71708405",
-X"530c7270",
-X"84055408",
-X"71708405",
-X"530c7270",
-X"84055408",
-X"71708405",
-X"530c7270",
-X"84055408",
-X"71708405",
-X"530cf012",
-X"52718f26",
-X"c9388372",
-X"27953872",
-X"70840554",
-X"08717084",
-X"05530cfc",
-X"12527183",
-X"26ed3870",
-X"54ff8139",
+X"05087083",
+X"e0800c51",
+X"833d0d83",
+X"e08c0c04",
 X"00ffffff",
 X"ff00ffff",
 X"ffff00ff",
@@ -3895,24 +3893,15 @@
 X"f4f5f6f7",
 X"f8f9fafb",
 X"fcfdfeff",
-X"70704740",
-X"2c704268",
-X"2c020202",
-X"02020202",
-X"02020202",
-X"02020202",
-X"02020202",
-X"02020241",
-X"00060000",
-X"00002af7",
-X"00002b38",
-X"00002b5a",
-X"00002b79",
-X"00002b79",
-X"00002b79",
-X"00002b79",
+X"00002b5f",
+X"00002ba0",
+X"00002bc2",
 X"00002be9",
-X"00002c1a",
+X"00002be9",
+X"00002be9",
+X"00002be9",
+X"00002c5a",
+X"00002cac",
 X"25732025",
 X"73000000",
 X"2e2e0000",
@@ -3919,8 +3908,6 @@
 X"41545200",
 X"58464400",
 X"58455800",
-X"524f4d00",
-X"42494e00",
 X"43686f6f",
 X"73652000",
 X"66696c65",
@@ -3961,11 +3948,11 @@
 X"65202564",
 X"3a257320",
 X"25730000",
+X"4e4f4e45",
+X"00000000",
 X"43617274",
-X"72696467",
-X"6520386b",
-X"2073696d",
-X"706c6500",
+X"3a202573",
+X"00000000",
 X"45786974",
 X"00000000",
 X"61746172",
@@ -3975,18 +3962,59 @@
 X"69626173",
 X"2e726f6d",
 X"00000000",
+X"524f4d00",
+X"42494e00",
+X"43415200",
 X"6e616d65",
 X"20000000",
 X"00000000",
 X"00000000",
-X"00003d1c",
-X"00003d20",
+X"01010008",
+X"02210010",
+X"080d0040",
+X"090a0040",
+X"0a090040",
+X"0b080040",
+X"0c300020",
+X"0d310040",
+X"0e320080",
+X"0f040010",
+X"110c0080",
+X"17330100",
+X"18340200",
+X"1a280010",
+X"1b290020",
+X"1c2a0040",
+X"1d2b0080",
+X"1e2c0100",
+X"1f2d0200",
+X"21380020",
+X"22390040",
+X"233a0080",
+X"243b0100",
+X"253c0200",
+X"28230010",
+X"29020080",
+X"2a030400",
+X"38240200",
+X"00000000",
+X"70704740",
+X"2c704268",
+X"2c020202",
+X"02020202",
+X"02020202",
+X"02020202",
+X"02020202",
+X"02020241",
+X"00060000",
+X"00003ce8",
+X"00003cec",
+X"00003cf4",
+X"00003d00",
+X"00003d0c",
+X"00003d18",
+X"00003d24",
 X"00003d28",
-X"00003d34",
-X"00003d40",
-X"00003d4c",
-X"00003d58",
-X"00003d5c",
 X"72025f07",
 X"f807a900",
 X"8d04038d",
@@ -4086,34 +4114,6 @@
 X"65720000",
 X"00000000",
 X"00000000",
-X"00000000",
-X"00000000",
-X"00000000",
-X"00000000",
-X"00000000",
-X"00000000",
-X"00000000",
-X"00000000",
-X"00000000",
-X"00000000",
-X"00000000",
-X"00000000",
-X"00000000",
-X"00000000",
-X"00000000",
-X"00000000",
-X"00000000",
-X"00000000",
-X"00000000",
-X"00000000",
-X"00000000",
-X"00000000",
-X"00000000",
-X"00000000",
-X"00000000",
-X"00000000",
-X"00000000",
-X"00000000",
 X"00000000"
 
 );
Index: common/a8core/address_decoder.vhdl
===================================================================
--- common/a8core/address_decoder.vhdl	(revision 197)
+++ common/a8core/address_decoder.vhdl	(revision 198)
@@ -66,8 +66,7 @@
 	rom_in_ram : in std_logic;
 	
 	rom_select : in std_logic_vector(5 downto 0);
-	cart_select : in std_logic_vector(6 downto 0);
-	cart_activate : in std_logic;
+	cart_select : in std_logic_vector(5 downto 0);
 	
 	ram_select : in std_logic_vector(2 downto 0);
 	
@@ -110,6 +109,8 @@
 	CART_S4_n : out std_logic;
 	CART_S5_n : out std_logic;
 	CART_CCTL_n : out std_logic;
+
+	CART_TRIG3_OUT: out std_logic;
 	
 	-- width of access
 	WIDTH_8bit_ACCESS : out std_logic;
@@ -195,6 +196,22 @@
 	signal SDRAM_OS_ROM_ADDR : std_logic_vector(22 downto 0);
 	
 	signal sdram_only_bank : std_logic;
+
+	signal emu_cart_enable: std_logic;
+
+	signal emu_cart_cctl_n: std_logic;
+	signal emu_cart_data_in: std_logic_vector(7 downto 0);
+	signal emu_cart_rw: std_logic;
+	signal emu_cart_s4_n: std_logic;
+	signal emu_cart_s5_n: std_logic;
+	signal emu_cart_s4_n_out: std_logic;
+	signal emu_cart_s5_n_out: std_logic;
+	signal emu_cart_rd4: std_logic;
+	signal emu_cart_rd5: std_logic;
+	signal emu_cart_address: std_logic_vector(20 downto 0);
+	signal emu_cart_address_enable: boolean;
+	signal emu_cart_cctl_dout: std_logic_vector(7 downto 0);
+	signal emu_cart_cctl_dout_enable: boolean;
 	
 BEGIN
 		-- register
@@ -228,6 +245,41 @@
 			antic_fetch_real_reg <= antic_fetch_real_next;
 		end if;
 	end process;
+
+	-- emulated cart
+	emu_cart: entity work.CartLogic
+	port map (clk => clk,
+		cart_mode => cart_select(5 downto 0),
+		a => addr_next(12 downto 0),
+		cctl_n => emu_cart_cctl_n,
+		d_in => cpu_write_data,
+		rw => emu_cart_rw,
+		s4_n => emu_cart_s4_n,
+		s5_n => emu_cart_s5_n,
+		s4_n_out => emu_cart_s4_n_out,
+		s5_n_out => emu_cart_s5_n_out,
+		rd4 => emu_cart_rd4,
+		rd5 => emu_cart_rd5,
+		cart_address => emu_cart_address,
+		cart_address_enable => emu_cart_address_enable,
+		cctl_dout => emu_cart_cctl_dout,
+		cctl_dout_enable => emu_cart_cctl_dout_enable
+	);
+
+	process(cart_select)
+	begin
+		if (cart_select(5 downto 0) = "000000") then
+			emu_cart_enable <= '0';
+		else
+			emu_cart_enable <= '1';
+		end if;
+	end process;
+
+	-- use "real" cart as if it was stacked on top of the emulated cart
+	--cart_s4_n <= emu_cart_s4_n_out;
+	--cart_s5_n <= emu_cart_s5_n_out;
+
+	CART_TRIG3_OUT <= CART_RD5 or emu_cart_rd5;
 	
 	-- ANTIC FETCH
 	
@@ -255,7 +307,7 @@
 		notify_cpu <= '0';
 		notify_DMA <= '0';
 		state_next <= state_reg;
-		fetch_wait_next <= std_logic_vector(unsigned(fetch_wait_reg) +1);
+		fetch_wait_next <= std_logic_vector(unsigned(fetch_wait_reg) + to_unsigned(1,9));
 
 		addr_next <= addr_reg;
 		data_WRITE_next <= data_WRITE_reg;
@@ -433,7 +485,8 @@
 	-- +64k          - banks 256-259"100 0000 0000 1111 1111 1111" (TOP)
 	-- SCRATCH       - 4MB+64k-5MB
 	-- CARTS         -              "101 YYYY YYY0 0000 0000 0000" (BOT) - 2MB! 8kb banks
-	SDRAM_CART_ADDR      <= "101"&cart_select& "0000000000000";
+	--SDRAM_CART_ADDR      <= "101"&cart_select& "0000000000000";
+	SDRAM_CART_ADDR	<= "1" & emu_cart_address(20) & (not emu_cart_address(20)) & emu_cart_address(19 downto 0);
 	-- BASIC/OS ROM  -              "111 XXXX XX00 0000 0000 0000" (BOT) (BASIC IN SLOT 0!), 2nd to last 512K				
 	SDRAM_BASIC_ROM_ADDR <= "111"&"000000"   &"00000000000000";
 	SDRAM_OS_ROM_ADDR    <= "111"&rom_select &"00000000000000";
@@ -444,7 +497,7 @@
 gen_low_memory : if low_memory=1 generate
 
 	-- SRAM memory map (1024k) for Aeon Lite
-	SDRAM_CART_ADDR      <= "000" & "111" & cart_select(3 downto 0) & "0000000000000";
+	SDRAM_CART_ADDR      <= "000" & "111" & emu_cart_address(16 downto 0);
 	SDRAM_BASIC_ROM_ADDR <= "000" & "110" &                       "00000000000000000";
 	SDRAM_OS_ROM_ADDR    <= "000" & "110" & rom_select(2 downto 0) & "00000000000000";
 
@@ -458,8 +511,16 @@
 		portb, 
 		antic_fetch,
 		rom_select,
-		ram_select,cart_rd4,cart_rd5,
+		ram_select,
 		use_sdram,
+
+		-- cart stuff
+		cart_rd4,cart_rd5,
+		emu_cart_rd4,emu_cart_rd5,
+
+		emu_cart_enable,
+		emu_cart_address, emu_cart_address_enable,
+		emu_cart_cctl_dout, emu_cart_cctl_dout_enable,
 		
 		-- input data from n sources
 		GTIA_DATA,POKEY_DATA,POKEY2_DATA,PIA_DATA,ANTIC_DATA,CART_ROM_DATA,ROM_DATA,RAM_DATA,SDRAM_DATA,
@@ -476,7 +537,9 @@
 		
 		-- SDRAM base addresses
 		extended_self_test,extended_bank,sdram_only_bank,
-		SDRAM_BASIC_ROM_ADDR,SDRAM_CART_ADDR,SDRAM_OS_ROM_ADDR
+		SDRAM_BASIC_ROM_ADDR,
+		SDRAM_CART_ADDR,
+		SDRAM_OS_ROM_ADDR
 		
 	)
 	begin
@@ -505,7 +568,18 @@
 		CART_S4_n <= '1';
 		CART_S5_n <= '1';
 		CART_CCTL_n <= '1';
-		
+
+		emu_cart_s4_n <= '1';
+		emu_cart_s5_n <= '1';
+
+		emu_cart_cctl_n <= '1';
+
+		if (write_enable_next = '1') then
+			emu_cart_rw <= '0';
+		else
+			emu_cart_rw <= '1';
+		end if;
+
 		rom_request <= '0';
 		cart_request <= '0';
 		
@@ -577,16 +651,33 @@
 				-- CART_CONFIG -- TODO - wait for n cycles (for now non-turbo mode should work?)
 				when X"D5" =>
 					sdram_chip_select <= '0';
-					ram_chip_select <= '0';				
-					if ((CART_RD4 or CART_RD5) = '1') then
-						PBI_WR_ENABLE <= write_enable_next;
-						MEMORY_DATA(7 downto 0) <= CART_ROM_DATA;
-						cart_request <= start_request;
-						CART_CCTL_n <= '0';
-						request_complete <= CART_REQUEST_COMPLETE;
+					ram_chip_select <= '0';	
+
+					if (emu_cart_enable = '1') then
+						emu_cart_cctl_n <= '0';
+						if write_enable_next = '1' then
+							-- TODO: write to both emulated and real cart
+							request_complete <= '1';
+						else
+							-- read only from emulated
+							if emu_cart_cctl_dout_enable then
+								MEMORY_DATA(7 downto 0) <= emu_cart_cctl_dout;
+							else
+								MEMORY_DATA(7 downto 0) <= x"ff";
+							end if;
+							request_complete <= '1';
+						end if;
 					else
-						MEMORY_DATA(7 downto 0) <= X"FF";
-						request_complete <= '1';
+						if ((CART_RD4 or CART_RD5) = '1') then
+							PBI_WR_ENABLE <= write_enable_next;
+							MEMORY_DATA(7 downto 0) <= CART_ROM_DATA;
+							cart_request <= start_request;
+							CART_CCTL_n <= '0';
+							request_complete <= CART_REQUEST_COMPLETE;
+						else
+							MEMORY_DATA(7 downto 0) <= X"FF";
+							request_complete <= '1';
+						end if;
 					end if;
 					
 				when X"D6" =>
@@ -629,7 +720,22 @@
 					X"80"|X"81"|X"82"|X"83"|X"84"|X"85"|X"86"|X"87"|X"88"|X"89"|X"8A"|X"8B"|X"8C"|X"8D"|X"8E"|X"8F"
 					|X"90"|X"91"|X"92"|X"93"|X"94"|X"95"|X"96"|X"97"|X"98"|X"99"|X"9A"|X"9B"|X"9C"|X"9D"|X"9E"|X"9F" =>
 		
-					if (cart_rd4 = '1') then
+					if (emu_cart_enable = '1' and emu_cart_rd4 = '1') then
+						emu_cart_s4_n <= '0';
+						-- remap to SDRAM
+						if (emu_cart_address_enable) then
+							SDRAM_ADDR <= SDRAM_CART_ADDR;
+							MEMORY_DATA(7 downto 0) <= SDRAM_DATA(7 downto 0);
+							request_complete <= sdram_request_COMPLETE;
+							sdram_chip_select <= start_request;
+							ram_chip_select <= '0';
+						else
+							MEMORY_DATA(7 downto 0) <= x"ff";
+							request_complete <= '1';
+							sdram_chip_select <= '0';
+							ram_chip_select <= '0';
+						end if;
+					elsif (cart_rd4 = '1') then
 						MEMORY_DATA(7 downto 0) <= CART_ROM_DATA;
 						cart_request <= start_request;
 						CART_S4_n <= '0';
@@ -643,7 +749,22 @@
 					X"A0"|X"A1"|X"A2"|X"A3"|X"A4"|X"A5"|X"A6"|X"A7"|X"A8"|X"A9"|X"AA"|X"AB"|X"AC"|X"AD"|X"AE"|X"AF"
 					|X"B0"|X"B1"|X"B2"|X"B3"|X"B4"|X"B5"|X"B6"|X"B7"|X"B8"|X"B9"|X"BA"|X"BB"|X"BC"|X"BD"|X"BE"|X"BF" =>
 					
-					if (cart_rd5 = '1') then
+					if (emu_cart_enable = '1' and emu_cart_rd5 = '1') then
+						emu_cart_s5_n <= '0';
+						-- remap to SDRAM
+						if (emu_cart_address_enable) then
+							SDRAM_ADDR <= SDRAM_CART_ADDR;
+							MEMORY_DATA(7 downto 0) <= SDRAM_DATA(7 downto 0);
+							request_complete <= sdram_request_COMPLETE;							
+							sdram_chip_select <= start_request;
+							ram_chip_select <= '0';
+						else
+							MEMORY_DATA(7 downto 0) <= x"ff";
+							request_complete <= '1';
+							sdram_chip_select <= '0';
+							ram_chip_select <= '0';
+						end if;
+					elsif (cart_rd5 = '1') then
 						MEMORY_DATA(7 downto 0) <= CART_ROM_DATA;
 						cart_request <= start_request;
 						CART_S5_n <= '0';
Index: common/a8core/atari5200core.vhd
===================================================================
--- common/a8core/atari5200core.vhd	(revision 197)
+++ common/a8core/atari5200core.vhd	(revision 198)
@@ -383,7 +383,6 @@
 		 WRITE_DATA => WRITE_DATA,
 		 d6_wr_enable => open,
 		 cart_select => (others=>'0'),
-		 cart_activate => '0',
 		 rom_in_ram => ROM_IN_RAM);
 
 pokey1 : entity work.pokey
Index: common/a8core/atari800core.vhd
===================================================================
--- common/a8core/atari800core.vhd	(revision 197)
+++ common/a8core/atari800core.vhd	(revision 198)
@@ -173,8 +173,7 @@
 		-- Special config params
    		RAM_SELECT : in std_logic_vector(2 downto 0); -- 64K,128K,320KB Compy, 320KB Rambo, 576K Compy, 576K Rambo, 1088K, 4MB
     		ROM_SELECT : in std_logic_vector(5 downto 0); -- 16KB ROM Bank - 0 is illegal (slot used for BASIC!) TODO FIXME, change stupid slot 0 thing...
-		CART_EMULATION_SELECT : in std_logic_vector(6 downto 0); -- from where
-		CART_EMULATION_ACTIVATE : in std_logic; -- to where? TODO, these needs redoing and wiring up!
+		CART_EMULATION_SELECT : in std_logic_vector(5 downto 0);
 		PAL :  in STD_LOGIC;
 		USE_SDRAM :  in STD_LOGIC;
 		ROM_IN_RAM : in std_logic;
@@ -204,6 +203,8 @@
 -- GTIA
 SIGNAL	GTIA_SOUND :  STD_LOGIC;
 SIGNAL	CONSOL_OUT :  STD_LOGIC_VECTOR(3 downto 0);
+SIGNAL	CONSOL_IN :  STD_LOGIC_VECTOR(3 downto 0);
+SIGNAL  GTIA_TRIG_MERGED : STD_LOGIC_VECTOR(3 downto 0);
 
 SIGNAL	GTIA_DO :  STD_LOGIC_VECTOR(7 DOWNTO 0);
 SIGNAL	CACHE_GTIA_DO :  STD_LOGIC_VECTOR(7 DOWNTO 0);
@@ -279,6 +280,9 @@
 -- PBI
 SIGNAL PBI_ADDR_INT : std_logic_vector(15 downto 0);
 
+-- cart
+signal cart_trig3_out: std_logic;
+
 BEGIN 
 
 PBI_WIDTH_8bit_ACCESS <= WIDTH_8bit_access;
@@ -460,6 +464,7 @@
 		 CART_S4_n => CART_S4_n,
 		 CART_S5_n => CART_S5_N,
 		 CART_CCTL_n => CART_CCTL_N,
+		 CART_TRIG3_OUT => cart_trig3_out,
 		 WIDTH_8bit_ACCESS => WIDTH_8BIT_ACCESS,
 		 WIDTH_16bit_ACCESS => WIDTH_16BIT_ACCESS,
 		 WIDTH_32bit_ACCESS => WIDTH_32BIT_ACCESS,
@@ -474,7 +479,6 @@
 		 WRITE_DATA => WRITE_DATA,
 		 d6_wr_enable => covox_write_enable,
 		 cart_select => CART_EMULATION_SELECT,
-		 cart_activate => CART_EMULATION_ACTIVATE,
 		 rom_in_ram => ROM_IN_RAM);
 
 pokey1 : entity work.pokey
@@ -501,6 +505,8 @@
 		 DATA_OUT => POKEY_DO,
 		 keyboard_scan => KEYBOARD_SCAN);
 
+CONSOL_IN <= '1'&CONSOL_OPTION&CONSOL_SELECT&CONSOL_START;
+GTIA_TRIG_MERGED <= cart_trig3_out & GTIA_TRIG(2 downto 0); -- NOTE, inputs ignored, careful when adding 4 joystick support
 		 	 
 gtia1 : entity work.gtia
 PORT MAP(CLK => CLK,
@@ -513,8 +519,8 @@
 		 COLOUR_CLOCK => ANTIC_COLOUR_CLOCK_OUT,
 		 COLOUR_CLOCK_HIGHRES => ANTIC_HIGHRES_COLOUR_CLOCK_OUT,
 		 CONSOL_OUT => CONSOL_OUT,
-		 CONSOL_IN => '1'&CONSOL_OPTION&CONSOL_SELECT&CONSOL_START,
-		 TRIG => GTIA_TRIG,
+		 CONSOL_IN => CONSOL_IN,
+		 TRIG => GTIA_TRIG_MERGED,
 		 ADDR => PBI_ADDR_INT(4 DOWNTO 0),
 		 AN => ANTIC_AN,
 		 CPU_DATA_IN => WRITE_DATA(7 DOWNTO 0),
Index: common/a8core/atari800core_helloworld.vhd
===================================================================
--- common/a8core/atari800core_helloworld.vhd	(revision 197)
+++ common/a8core/atari800core_helloworld.vhd	(revision 198)
@@ -159,7 +159,8 @@
     		ROM_SELECT => "000001",
 		PAL => PAL,
 		HALT => '0',
-		THROTTLE_COUNT_6502 => THROTTLE_COUNT_6502
+		THROTTLE_COUNT_6502 => THROTTLE_COUNT_6502,
+		emulated_cartridge_select => (others=>'0')
 	);
 
 end vhdl;
Index: common/a8core/atari800core_simple_sdram.vhd
===================================================================
--- common/a8core/atari800core_simple_sdram.vhd	(revision 197)
+++ common/a8core/atari800core_simple_sdram.vhd	(revision 198)
@@ -135,7 +135,8 @@
     		ROM_SELECT : in std_logic_vector(5 downto 0); -- 16KB ROM Bank - 0 is illegal (slot used for BASIC!)
 		PAL :  in STD_LOGIC;
 		HALT : in std_logic;
-		THROTTLE_COUNT_6502 : in std_logic_vector(5 downto 0) -- standard speed is cycle_length-1
+		THROTTLE_COUNT_6502 : in std_logic_vector(5 downto 0); -- standard speed is cycle_length-1
+		emulated_cartridge_select: in std_logic_vector(5 downto 0)
 	);
 end atari800core_simple_sdram;
 
@@ -200,7 +201,7 @@
 ANTIC_LIGHTPEN <= JOY2_n(4) and JOY1_n(4);
 
 -- GTIA triggers
-GTIA_TRIG <= CART_RD5&"1"&JOY2_n(4)&JOY1_n(4);
+GTIA_TRIG <= "11"&JOY2_n(4)&JOY1_n(4);
 
 -- Cartridge not inserted
 CART_RD4 <= '0';
@@ -342,8 +343,7 @@
 
 		RAM_SELECT => RAM_SELECT,
 		ROM_SELECT => ROM_SELECT,
-		CART_EMULATION_SELECT => "0000000",
-		CART_EMULATION_ACTIVATE => '0',
+		CART_EMULATION_SELECT => emulated_cartridge_select,
 		PAL => PAL,
 		USE_SDRAM => USE_SDRAM,
 		ROM_IN_RAM => ROM_IN_RAM,
Index: common/a8core/cart_logic.vhd
===================================================================
--- common/a8core/cart_logic.vhd	(nonexistent)
+++ common/a8core/cart_logic.vhd	(revision 198)
@@ -0,0 +1,415 @@
+--  Cart bank switching and memory access core
+--
+--  Copyright (C) 2011-2014 Matthias Reichl <hias@horus.com>
+--
+--  This program is free software; you can redistribute it and/or modify
+--  it under the terms of the GNU General Public License as published by
+--  the Free Software Foundation; either version 2 of the License, or
+--  (at your option) any later version.
+--
+--  This program is distributed in the hope that it will be useful,
+--  but WITHOUT ANY WARRANTY; without even the implied warranty of
+--  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+--  GNU General Public License for more details.
+--
+--  You should have received a copy of the GNU General Public License
+--  along with this program; if not, write to the Free Software
+--  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+
+library IEEE;
+use IEEE.STD_LOGIC_1164.ALL;
+use IEEE.STD_LOGIC_ARITH.ALL;
+use IEEE.NUMERIC_STD.ALL;
+
+library work;
+
+entity CartLogic is
+    Port (	clk: in std_logic;
+		cart_mode: in std_logic_vector(5 downto 0);
+		a: in std_logic_vector (12 downto 0);
+		cctl_n: std_logic;
+		d_in: in std_logic_vector(7 downto 0);
+		rw: in std_logic;
+		s4_n: in std_logic;
+		s5_n: in std_logic;
+		s4_n_out: out std_logic;
+		s5_n_out: out std_logic;
+		rd4: out std_logic;
+		rd5: out std_logic;
+		cart_address: out std_logic_vector(20 downto 0);
+		cart_address_enable: out boolean;
+		cctl_dout: out std_logic_vector(7 downto 0);
+		cctl_dout_enable: out boolean
+	);
+		
+end CartLogic;
+
+architecture vhdl of CartLogic is
+
+-- general cart configuration
+signal cfg_bank: std_logic_vector(20 downto 13) := (others => '0');
+signal cfg_enable: std_logic := '1';
+
+subtype cart_mode_type is std_logic_vector(5 downto 0);
+-- 8k modes
+constant cart_mode_off:		cart_mode_type := "000000";
+constant cart_mode_8k:		cart_mode_type := "000001";
+constant cart_mode_atarimax1:	cart_mode_type := "000010";
+constant cart_mode_atarimax8:	cart_mode_type := "000011";
+constant cart_mode_oss:		cart_mode_type := "000100";
+
+constant cart_mode_sdx64:	cart_mode_type := "001000";
+constant cart_mode_diamond64:	cart_mode_type := "001001";
+constant cart_mode_express64:	cart_mode_type := "001010";
+
+constant cart_mode_atrax_128:	cart_mode_type := "001100";
+constant cart_mode_williams_64:	cart_mode_type := "001101";
+
+-- 16k modes
+--constant cart_mode_flexi:	cart_mode_type := "100000";
+constant cart_mode_16k:		cart_mode_type := "100001";
+constant cart_mode_megamax16:	cart_mode_type := "100010";
+constant cart_mode_blizzard_16:	cart_mode_type := "100011";
+constant cart_mode_sic:		cart_mode_type := "100100";
+
+constant cart_mode_mega_16:	cart_mode_type := "101000";
+constant cart_mode_mega_32:	cart_mode_type := "101001";
+constant cart_mode_mega_64:	cart_mode_type := "101010";
+constant cart_mode_mega_128:	cart_mode_type := "101011";
+constant cart_mode_mega_256:	cart_mode_type := "101100";
+constant cart_mode_mega_512:	cart_mode_type := "101101";
+constant cart_mode_mega_1024:	cart_mode_type := "101110";
+constant cart_mode_mega_2048:	cart_mode_type := "101111";
+
+constant cart_mode_xegs_32:	cart_mode_type := "110000";
+constant cart_mode_xegs_64:	cart_mode_type := "110001";
+constant cart_mode_xegs_128:	cart_mode_type := "110010";
+constant cart_mode_xegs_256:	cart_mode_type := "110011";
+constant cart_mode_xegs_512:	cart_mode_type := "110100";
+constant cart_mode_xegs_1024:	cart_mode_type := "110101";
+
+constant cart_mode_sxegs_32:	cart_mode_type := "111000";
+constant cart_mode_sxegs_64:	cart_mode_type := "111001";
+constant cart_mode_sxegs_128:	cart_mode_type := "111010";
+constant cart_mode_sxegs_256:	cart_mode_type := "111011";
+constant cart_mode_sxegs_512:	cart_mode_type := "111100";
+constant cart_mode_sxegs_1024:	cart_mode_type := "111101";
+
+signal cart_mode_prev: cart_mode_type := cart_mode_off;
+
+-- OSS cart emulation
+signal oss_bank: std_logic_vector(1 downto 0) := "00";
+
+-- sic cart 8xxx/axxx enable
+signal sic_8xxx_enable: std_logic := '0';
+signal sic_axxx_enable: std_logic := '1';
+
+signal access_8xxx: boolean;
+signal access_axxx: boolean;
+
+signal reset_n: std_logic := '1';
+
+begin
+
+access_8xxx <= ( s4_n = '0');
+access_axxx <= ( s5_n = '0');
+
+-- pass through s4/s5 if cart mode is off
+set_passthrough: process(s4_n, s5_n, cart_mode)
+begin
+	if (cart_mode = cart_mode_off) then
+		s4_n_out <= s4_n;
+		s5_n_out <= s5_n;
+	else
+		s4_n_out <= '1';
+		s5_n_out <= '1';
+	end if;
+end process set_passthrough;
+
+-- remember previous cartridge mode
+set_cart_mode_prev: process(clk)
+begin
+	if rising_edge(clk) then
+		cart_mode_prev <= cart_mode;
+	end if;
+end process set_cart_mode_prev;
+
+-- generate reset if cartridge mode has changed
+generate_reset: process(cart_mode, cart_mode_prev)
+begin
+	if (cart_mode = cart_mode_prev) then
+		reset_n <= '1';
+	else
+		reset_n <= '0';
+	end if;
+end process generate_reset;
+
+-- read back config registers
+config_io: process(a, rw, cctl_n,
+	cfg_bank,
+	cart_mode,
+	sic_8xxx_enable, sic_axxx_enable)
+begin
+	cctl_dout_enable <= false;
+	cctl_dout <= x"ff";
+
+	if (cctl_n = '0') then
+		-- sic register readback at $D500-$D51F
+		if (rw = '1') and (cart_mode = cart_mode_sic) and (a(7 downto 5) = "000") then
+			cctl_dout_enable <= true;
+			-- bit 7 = 0 means flash is write protected
+			cctl_dout <= "0" & (not sic_axxx_enable) & sic_8xxx_enable & cfg_bank(18 downto 14);
+		end if;
+	end if;
+end process config_io;
+
+set_config: process(clk)
+begin
+	if rising_edge(clk) then
+		if (reset_n = '0') then
+			cfg_bank <= (others => '0');
+			cfg_enable <= '1';
+			oss_bank <= "01";
+			sic_8xxx_enable <= '0';
+			sic_axxx_enable <= '1';
+
+			-- cart specific initialization
+			case cart_mode is
+			when cart_mode_atarimax8 =>
+				cfg_bank <= x"7F"; -- startup in last bank
+			when others => null;
+			end case;
+		else
+			if (cctl_n = '0') then
+				if (rw = '0') then
+					-- modes using data lines to switch banks
+					
+					-- (s)xegs bank select
+					if (cart_mode(5 downto 4) = cart_mode_xegs_32(5 downto 4)) then
+						-- sxegs disable via bit 7
+						if (cart_mode(3) = '1') then
+							cfg_enable <= not d_in(7);
+						end if;
+						case cart_mode is
+						when cart_mode_xegs_32 | cart_mode_sxegs_32 =>
+							cfg_bank(14 downto 13) <= d_in(1 downto 0);
+						when cart_mode_xegs_64 | cart_mode_sxegs_64 =>
+							cfg_bank(15 downto 13) <= d_in(2 downto 0);
+						when cart_mode_xegs_128 | cart_mode_sxegs_128 =>
+							cfg_bank(16 downto 13) <= d_in(3 downto 0);
+						when cart_mode_xegs_256 | cart_mode_sxegs_256 =>
+							cfg_bank(17 downto 13) <= d_in(4 downto 0);
+						when cart_mode_xegs_512 | cart_mode_sxegs_512 =>
+							cfg_bank(18 downto 13) <= d_in(5 downto 0);
+						when cart_mode_xegs_1024 | cart_mode_sxegs_1024 =>
+							cfg_bank(19 downto 13) <= d_in(6 downto 0);
+						when others =>
+							null;
+						end case;
+					end if;
+					-- megacart bank select
+					if (cart_mode(5 downto 3) = cart_mode_mega_32(5 downto 3)) then
+						-- disable via bit 7
+						cfg_enable <= not d_in(7);
+						case cart_mode is
+						when cart_mode_mega_32 =>
+							cfg_bank(14 downto 14) <= d_in(0 downto 0);
+						when cart_mode_mega_64 =>
+							cfg_bank(15 downto 14) <= d_in(1 downto 0);
+						when cart_mode_mega_128 =>
+							cfg_bank(16 downto 14) <= d_in(2 downto 0);
+						when cart_mode_mega_256 =>
+							cfg_bank(17 downto 14) <= d_in(3 downto 0);
+						when cart_mode_mega_512 =>
+							cfg_bank(18 downto 14) <= d_in(4 downto 0);
+						when cart_mode_mega_1024 =>
+							cfg_bank(19 downto 14) <= d_in(5 downto 0);
+						when cart_mode_mega_2048 =>
+							cfg_bank(20 downto 14) <= d_in(6 downto 0);
+						when others =>
+							null;
+						end case;
+					end if;
+					-- atrax 128
+					if (cart_mode = cart_mode_atrax_128) then
+						cfg_enable <= not d_in(7);
+						cfg_bank(16 downto 13)<= d_in(3 downto 0);
+					end if;
+					-- blizzard
+					if (cart_mode = cart_mode_blizzard_16) then
+						cfg_enable <= '0';
+					end if;
+					-- sic
+					if (cart_mode = cart_mode_sic) and (a(7 downto 5) = "000") then
+						sic_8xxx_enable <= d_in(5);
+						sic_axxx_enable <= not d_in(6);
+						cfg_bank(18 downto 14) <= d_in(4 downto 0);
+					end if;
+				end if; -- rw = 0
+				
+				-- cart config using addresses, ignore read/write
+				case cart_mode is
+				when cart_mode_oss =>
+					oss_bank <= a(0) & NOT a(3);
+				when cart_mode_atarimax1 =>
+					-- D500-D50F: set bank, enable
+					if (a(7 downto 4) = x"0") then
+						cfg_bank(16 downto 13) <= a(3 downto 0);
+						cfg_enable <= '1';
+					end if;
+					-- D510-D51F: disable
+					if (a(7 downto 4) = x"1") then
+						cfg_enable <= '0';
+					end if;
+				when cart_mode_atarimax8 =>
+					-- D500-D57F: set bank, enable
+					if (a(7) = '0') then
+						cfg_bank(19 downto 13) <= a(6 downto 0);
+						cfg_enable <= '1';
+					else
+					-- D580-D5FF: disable
+						cfg_enable <= '0';
+					end if;
+				when cart_mode_megamax16 =>
+					-- D500-D57F: set 16k bank, enable
+					if (a(7) = '0') then
+						cfg_bank(20 downto 14) <= a(6 downto 0);
+						cfg_enable <= '1';
+					else
+						cfg_enable <= '0';
+					end if;
+				when cart_mode_williams_64 =>
+					if (a(7 downto 4) = x"0") then
+						cfg_enable <= not a(3);
+						cfg_bank(15 downto 13) <= a(2 downto 0);
+					end if;
+				when cart_mode_sdx64 =>
+					if (a(7 downto 4) = x"E") then
+						cfg_enable <= not a(3);
+						cfg_bank(15 downto 13) <= not a(2 downto 0);
+					end if;
+				when cart_mode_diamond64 =>
+					if (a(7 downto 4) = x"D") then
+						cfg_enable <= not a(3);
+						cfg_bank(15 downto 13) <= not a(2 downto 0);
+					end if;
+				when cart_mode_express64 =>
+					if (a(7 downto 4) = x"7") then
+						cfg_enable <= not a(3);
+						cfg_bank(15 downto 13) <= not a(2 downto 0);
+					end if;
+				when others => null;
+				end case;
+			end if;
+		end if;
+	end if;
+end process set_config;
+
+access_cart_data: process(a, rw, access_8xxx, access_axxx,
+	cfg_bank, cfg_enable,
+	cart_mode,
+	oss_bank,
+	sic_8xxx_enable, sic_axxx_enable)
+
+variable bool_rd4: boolean;
+variable bool_rd5: boolean;
+begin
+	cart_address <= cfg_bank & a(12 downto 0);
+
+	bool_rd4 := false;
+	bool_rd5 := (cfg_enable = '1');
+	cart_address_enable <= (cfg_enable = '1') and access_axxx;
+
+	if (cart_mode(5) = '1') then	-- default for 16k carts
+		bool_rd4 := (cfg_enable = '1');
+		cart_address_enable <= (cfg_enable = '1') and (access_8xxx or access_axxx);
+	end if;
+
+	case cart_mode is
+	when cart_mode_8k |
+	     cart_mode_atarimax1 | cart_mode_atarimax8 | 
+	     cart_mode_atrax_128 | cart_mode_williams_64 |
+	     cart_mode_sdx64 | cart_mode_diamond64 | cart_mode_express64 =>
+		null;
+	when cart_mode_16k | cart_mode_megamax16 | cart_mode_blizzard_16 =>
+		if (access_8xxx) then
+			cart_address(13) <= '0';
+		else
+			cart_address(13) <= '1';
+		end if;
+	when cart_mode_oss =>
+		if (oss_bank = "00") then
+			bool_rd5 := false;
+			cart_address_enable <= false;
+		else
+			cart_address(13) <= oss_bank(1) and (not a(12));
+			cart_address(12) <= oss_bank(0) and (not a(12));
+		end if;
+	when cart_mode_xegs_32 |cart_mode_sxegs_32 =>
+		if (access_axxx) then
+			cart_address(14 downto 13) <= (others => '1');
+		end if;
+	when cart_mode_xegs_64 | cart_mode_sxegs_64 =>
+		if (access_axxx) then
+			cart_address(15 downto 13) <= (others => '1');
+		end if;
+	when cart_mode_xegs_128 | cart_mode_sxegs_128 =>
+		if (access_axxx) then
+			cart_address(16 downto 13) <= (others => '1');
+		end if;
+	when cart_mode_xegs_256 | cart_mode_sxegs_256 =>
+		if (access_axxx) then
+			cart_address(17 downto 13) <= (others => '1');
+		end if;
+	when cart_mode_xegs_512 | cart_mode_sxegs_512 =>
+		if (access_axxx) then
+			cart_address(18 downto 13) <= (others => '1');
+		end if;
+	when cart_mode_xegs_1024 | cart_mode_sxegs_1024 =>
+		if (access_axxx) then
+			cart_address(19 downto 13) <= (others => '1');
+		end if;
+	when cart_mode_mega_16 | cart_mode_mega_32 | cart_mode_mega_64 | cart_mode_mega_128 |
+	     cart_mode_mega_256 | cart_mode_mega_512 | cart_mode_mega_1024 | cart_mode_mega_2048 =>
+		if (access_8xxx) then
+			cart_address(13) <= '0';
+		else
+			cart_address(13) <= '1';
+		end if;
+	when cart_mode_sic =>
+		bool_rd4 := (cfg_enable = '1') and (sic_8xxx_enable = '1');
+		bool_rd5 := (cfg_enable = '1') and (sic_axxx_enable = '1');
+		cart_address_enable <= (access_8xxx and (cfg_enable = '1') and (sic_8xxx_enable = '1'))
+				or
+			     (access_axxx and (cfg_enable = '1') and (sic_axxx_enable = '1'));
+		if (access_8xxx) then
+			cart_address(13) <= '0';
+		else
+			cart_address(13) <= '1';
+		end if;
+	when others =>
+		bool_rd4 := false;
+		bool_rd5 := false;
+		cart_address_enable <= false;
+	end case;
+
+	if (bool_rd4) then
+		rd4 <= '1';
+	else
+		rd4 <= '0';
+	end if;
+
+	if (bool_rd5) then
+		rd5 <= '1';
+	else
+		rd5 <= '0';
+	end if;
+
+	-- disable writes
+	if  (rw = '0') then
+		cart_address_enable <= false;
+	end if;
+
+end process access_cart_data;
+
+end vhdl;
Index: common/romgen/createall
===================================================================
--- common/romgen/createall	(revision 197)
+++ common/romgen/createall	(revision 198)
@@ -4,6 +4,7 @@
 ./create_rom.pl 1 ATARIBAS.ROM basic > ../a8core/basic.vhdl
 ./create_rom.pl 1 5200.rom os_5200 > ../a8core/os_5200.vhdl
 ./create_rom.pl 4 ../../firmware/MCC216.bin zpu_rom 12 > ../../mcc216/zpu_rom.vhdl
+./create_rom.pl 4 ../../firmware/MCC216.bin zpu_rom 12 > ../../mcctv/zpu_rom.vhdl
 ./create_rom.pl 4 ../../firmware/MIST.bin zpu_rom 12 > ../../mist/zpu_rom.vhdl
 ./create_rom.pl 4 ../../firmware/MIST_5200.bin zpu_rom 12 > ../../mist_5200/zpu_rom.vhdl
 ./create_rom.pl 4 ../../firmware/DE1.bin zpu_rom 12 > ../../de1/zpu_rom.vhdl
Index: de1/atari800core.qsf
===================================================================
--- de1/atari800core.qsf	(revision 197)
+++ de1/atari800core.qsf	(revision 198)
@@ -571,6 +571,8 @@
 set_global_assignment -name VHDL_FILE i2c_loader.vhd
 set_global_assignment -name VHDL_FILE i2s_intf.vhd
 set_global_assignment -name VHDL_FILE i2sslave.vhdl
+set_global_assignment -name QIP_FILE pll_pal.qip
+set_global_assignment -name QIP_FILE pll_ntsc.qip
 set_global_assignment -name QIP_FILE pll.qip
 set_global_assignment -name VHDL_FILE sram.vhdl
 set_global_assignment -name VHDL_FILE sync_switches.vhd
Index: de1/atari800core_de1.vhd
===================================================================
--- de1/atari800core_de1.vhd	(revision 197)
+++ de1/atari800core_de1.vhd	(revision 198)
@@ -211,6 +211,7 @@
 	signal reset_atari : std_logic;
 	signal pause_atari : std_logic;
 	SIGNAL speed_6502 : std_logic_vector(5 downto 0);
+	signal emulated_cartridge_select: std_logic_vector(5 downto 0);
 
 	-- GPIO
 	signal GPIO_0_DIR_OUT : std_logic_vector(35 downto 0);
@@ -342,7 +343,7 @@
 
 -- GTIA triggers
 --GTIA_TRIG <= CART_RD5&"1"&JOY2_n(4)&JOY1_n(4);
-GTIA_TRIG <= CART_RD5&"1"&TRIGGERS(1 downto 0);
+GTIA_TRIG <= "11"&TRIGGERS(1 downto 0);
 
 -- Cartridge not inserted
 --CART_RD4 <= '0';
@@ -650,8 +651,7 @@
 
 		RAM_SELECT => ram_select,
 		ROM_SELECT => rom_select,
-		CART_EMULATION_SELECT => "0000000",
-		CART_EMULATION_ACTIVATE => '0',
+		CART_EMULATION_SELECT => emulated_cartridge_select,
 		PAL => SW(8),
 		USE_SDRAM => SW(9),
 		ROM_IN_RAM => '1',
@@ -720,6 +720,7 @@
 	speed_6502 <= zpu_out1(7 downto 2);
 	ram_select <= zpu_out1(10 downto 8);
 	rom_select <= zpu_out1(16 downto 11);
+	emulated_cartridge_select <= zpu_out1(22 downto 17);
 
 zpu_rom1: entity work.zpu_rom
 	port map(
Index: de1/build.sh
===================================================================
--- de1/build.sh	(revision 197)
+++ de1/build.sh	(revision 198)
@@ -1,25 +1,73 @@
-rm -rf build
-mkdir build
-cp atari800core_de1.vhd build
-cp pll.* build
-cp atari800core.sdc build
-cp hexdecoder.vhd build
-cp i2c_loader.vhd build
-cp i2sslave.vhdl build
-cp sram.vhdl build
-cp sync_switches.vhd build
-cp zpu_rom.vhdl build
-cp gpio.vhd build
+#!/usr/bin/perl -w
+use strict;
 
-mkdir build/common
-mkdir build/common/a8core
-mkdir build/common/components
-mkdir build/common/zpu
-cp ../common/a8core/* ./build/common/a8core
-cp ../common/components/* ./build/common/components
-cp ../common/zpu/* ./build/common/zpu
+my $wanted_variant = shift @ARGV;
 
-cd build
-../makeqsf ../atari800core.qsf ./common/a8core ./common/components ./common/zpu
+#variants...
+my $PAL = 1;
+my $NTSC = 0;
 
-quartus_sh --flow compile atari800core
+my $RGB = 1; # i.e. not scandoubled
+my $VGA = 2;
+
+#Added like this to the generated qsf
+#set_parameter -name TV 1
+
+my %variants = 
+(
+#	"PAL" => 
+#	{
+#		"TV" => $PAL
+#	},
+#	"NTSC" =>
+#	{
+#		"TV" => $NTSC
+#	},
+	"OLD" =>
+	{
+		"TV" => 2
+	}
+);
+
+if (not defined $wanted_variant or (not exists $variants{$wanted_variant} and $wanted_variant ne "ALL"))
+{
+	die "Provide variant of ALL or ".join ",",sort keys %variants;
+}
+
+foreach my $variant (sort keys %variants)
+{
+	next if ($wanted_variant ne $variant and $wanted_variant ne "ALL");
+	print "Building $variant\n";
+
+	my $dir = "build_$variant";
+	`rm -rf $dir`;
+	mkdir $dir;
+	`cp atari800core_de1.vhd $dir`;
+	`cp *pll*.* $dir`;
+	`cp *.v $dir`;
+	`cp *.vhd* $dir`;
+	`cp atari800core.sdc $dir`;
+	`mkdir $dir/common`;
+	`mkdir $dir/common/a8core`;
+	`mkdir $dir/common/components`;
+	`mkdir $dir/common/zpu`;
+	`cp ../common/a8core/* ./$dir/common/a8core`;
+	`cp ../common/components/* ./$dir/common/components`;
+	`cp ../common/zpu/* ./$dir/common/zpu`;
+
+	chdir $dir;
+	`../makeqsf ../atari800core.qsf ./common/a8core ./common/components ./common/zpu`;
+
+	foreach my $key (sort keys %{$variants{$variant}})
+	{
+		my $val = $variants{$variant}->{$key};
+		`echo set_parameter -name $key $val >> atari800core.qsf`;
+	}
+
+	`quartus_sh --flow compile atari800core > build.log 2> build.err`;
+
+	`quartus_cpf --convert ../output_file.cof`;
+	
+	chdir "..";
+}
+
Index: de1/gpio.vhd
===================================================================
--- de1/gpio.vhd	(revision 197)
+++ de1/gpio.vhd	(revision 198)
@@ -88,6 +88,10 @@
 	signal cart_data_read_async : std_logic_vector(7 downto 0);
 	signal rd4_async : std_logic;
 	signal rd5_async : std_logic;	
+
+	signal cart_complete_early : std_logic;
+	signal read_write_next : std_logic;
+	signal read_write_reg : std_logic;
 	
 	signal keyboard_response_async : std_logic_vector(1 downto 0);
 	signal keyboard_response_gpio : std_logic_vector(1 downto 0);
@@ -308,7 +312,31 @@
 	-- RD5 ROM present (in)
 	-- RD4 ROM present (in)
 	
-	read_write_n <= not(pbi_write_enable);
+	read_write_n <= read_write_reg;
+
+	process(clk)
+	begin
+		if (clk'event and clk='1') then
+			read_write_reg <= read_write_next;
+		end if;
+	end process;
+
+	process(pbi_write_enable, cart_request, cart_complete_early)
+	begin
+		read_write_next <= '1';
+
+		if (pbi_write_enable = '1' and cart_request = '1') then
+			read_write_next <= '0';
+		end if;
+
+		if (cart_complete_early = '1') then
+			read_write_next <= '1';
+		end if;
+	end process;
+
+	cart_delay2 : entity work.delay_line
+		generic map (COUNT=>cartridge_cycle_length-4)
+		port map(clk=>clk,sync_reset=>'0',data_in=>cart_request,enable=>'1',reset_n=>reset_n,data_out=>cart_complete_early);	
 	
 	cart_delay : entity work.delay_line
 		generic map (COUNT=>cartridge_cycle_length-1)
Index: de1/pll_ntsc.cmp
===================================================================
--- de1/pll_ntsc.cmp	(nonexistent)
+++ de1/pll_ntsc.cmp	(revision 198)
@@ -0,0 +1,25 @@
+--Copyright (C) 1991-2013 Altera Corporation
+--Your use of Altera Corporation's design tools, logic functions 
+--and other software and tools, and its AMPP partner logic 
+--functions, and any output files from any of the foregoing 
+--(including device programming or simulation files), and any 
+--associated documentation or information are expressly subject 
+--to the terms and conditions of the Altera Program License 
+--Subscription Agreement, Altera MegaCore Function License 
+--Agreement, or other applicable license agreement, including, 
+--without limitation, that your use is for the sole purpose of 
+--programming logic devices manufactured by Altera and sold by 
+--Altera or its authorized distributors.  Please refer to the 
+--applicable agreement for further details.
+
+
+component pll_ntsc
+	PORT
+	(
+		inclk0		: IN STD_LOGIC  := '0';
+		c0		: OUT STD_LOGIC ;
+		c1		: OUT STD_LOGIC ;
+		c2		: OUT STD_LOGIC ;
+		locked		: OUT STD_LOGIC 
+	);
+end component;
Index: de1/pll_ntsc.ppf
===================================================================
--- de1/pll_ntsc.ppf	(nonexistent)
+++ de1/pll_ntsc.ppf	(revision 198)
@@ -0,0 +1,12 @@
+<?xml version="1.0" encoding="UTF-8" ?>
+<!DOCTYPE pinplan>
+<pinplan intended_family="Cyclone II" variation_name="pll_ntsc" megafunction_name="ALTPLL" specifies="all_ports">
+<global>
+<pin name="inclk0" direction="input" scope="external" source="clock"  />
+<pin name="c0" direction="output" scope="external" source="clock"  />
+<pin name="c1" direction="output" scope="external" source="clock"  />
+<pin name="c2" direction="output" scope="external" source="clock"  />
+<pin name="locked" direction="output" scope="external"  />
+
+</global>
+</pinplan>
Index: de1/pll_ntsc.qip
===================================================================
--- de1/pll_ntsc.qip	(nonexistent)
+++ de1/pll_ntsc.qip	(revision 198)
@@ -0,0 +1,5 @@
+set_global_assignment -name IP_TOOL_NAME "ALTPLL"
+set_global_assignment -name IP_TOOL_VERSION "13.0"
+set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) "pll_ntsc.vhd"]
+set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "pll_ntsc.cmp"]
+set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "pll_ntsc.ppf"]
Index: de1/pll_ntsc.vhd
===================================================================
--- de1/pll_ntsc.vhd	(nonexistent)
+++ de1/pll_ntsc.vhd	(revision 198)
@@ -0,0 +1,427 @@
+-- megafunction wizard: %ALTPLL%
+-- GENERATION: STANDARD
+-- VERSION: WM1.0
+-- MODULE: altpll 
+
+-- ============================================================
+-- File Name: pll_ntsc.vhd
+-- Megafunction Name(s):
+-- 			altpll
+--
+-- Simulation Library Files(s):
+-- 			altera_mf
+-- ============================================================
+-- ************************************************************
+-- THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
+--
+-- 13.0.1 Build 232 06/12/2013 SP 1 SJ Web Edition
+-- ************************************************************
+
+
+--Copyright (C) 1991-2013 Altera Corporation
+--Your use of Altera Corporation's design tools, logic functions 
+--and other software and tools, and its AMPP partner logic 
+--functions, and any output files from any of the foregoing 
+--(including device programming or simulation files), and any 
+--associated documentation or information are expressly subject 
+--to the terms and conditions of the Altera Program License 
+--Subscription Agreement, Altera MegaCore Function License 
+--Agreement, or other applicable license agreement, including, 
+--without limitation, that your use is for the sole purpose of 
+--programming logic devices manufactured by Altera and sold by 
+--Altera or its authorized distributors.  Please refer to the 
+--applicable agreement for further details.
+
+
+LIBRARY ieee;
+USE ieee.std_logic_1164.all;
+
+LIBRARY altera_mf;
+USE altera_mf.all;
+
+ENTITY pll_ntsc IS
+	PORT
+	(
+		inclk0		: IN STD_LOGIC  := '0';
+		c0		: OUT STD_LOGIC ;
+		c1		: OUT STD_LOGIC ;
+		c2		: OUT STD_LOGIC ;
+		locked		: OUT STD_LOGIC 
+	);
+END pll_ntsc;
+
+
+ARCHITECTURE SYN OF pll_ntsc IS
+
+	SIGNAL sub_wire0	: STD_LOGIC_VECTOR (5 DOWNTO 0);
+	SIGNAL sub_wire1	: STD_LOGIC ;
+	SIGNAL sub_wire2	: STD_LOGIC ;
+	SIGNAL sub_wire3	: STD_LOGIC ;
+	SIGNAL sub_wire4	: STD_LOGIC ;
+	SIGNAL sub_wire5	: STD_LOGIC ;
+	SIGNAL sub_wire6	: STD_LOGIC_VECTOR (1 DOWNTO 0);
+	SIGNAL sub_wire7_bv	: BIT_VECTOR (0 DOWNTO 0);
+	SIGNAL sub_wire7	: STD_LOGIC_VECTOR (0 DOWNTO 0);
+
+
+
+	COMPONENT altpll
+	GENERIC (
+		clk0_divide_by		: NATURAL;
+		clk0_duty_cycle		: NATURAL;
+		clk0_multiply_by		: NATURAL;
+		clk0_phase_shift		: STRING;
+		clk1_divide_by		: NATURAL;
+		clk1_duty_cycle		: NATURAL;
+		clk1_multiply_by		: NATURAL;
+		clk1_phase_shift		: STRING;
+		clk2_divide_by		: NATURAL;
+		clk2_duty_cycle		: NATURAL;
+		clk2_multiply_by		: NATURAL;
+		clk2_phase_shift		: STRING;
+		compensate_clock		: STRING;
+		gate_lock_counter		: NATURAL;
+		gate_lock_signal		: STRING;
+		inclk0_input_frequency		: NATURAL;
+		intended_device_family		: STRING;
+		invalid_lock_multiplier		: NATURAL;
+		lpm_hint		: STRING;
+		lpm_type		: STRING;
+		operation_mode		: STRING;
+		port_activeclock		: STRING;
+		port_areset		: STRING;
+		port_clkbad0		: STRING;
+		port_clkbad1		: STRING;
+		port_clkloss		: STRING;
+		port_clkswitch		: STRING;
+		port_configupdate		: STRING;
+		port_fbin		: STRING;
+		port_inclk0		: STRING;
+		port_inclk1		: STRING;
+		port_locked		: STRING;
+		port_pfdena		: STRING;
+		port_phasecounterselect		: STRING;
+		port_phasedone		: STRING;
+		port_phasestep		: STRING;
+		port_phaseupdown		: STRING;
+		port_pllena		: STRING;
+		port_scanaclr		: STRING;
+		port_scanclk		: STRING;
+		port_scanclkena		: STRING;
+		port_scandata		: STRING;
+		port_scandataout		: STRING;
+		port_scandone		: STRING;
+		port_scanread		: STRING;
+		port_scanwrite		: STRING;
+		port_clk0		: STRING;
+		port_clk1		: STRING;
+		port_clk2		: STRING;
+		port_clk3		: STRING;
+		port_clk4		: STRING;
+		port_clk5		: STRING;
+		port_clkena0		: STRING;
+		port_clkena1		: STRING;
+		port_clkena2		: STRING;
+		port_clkena3		: STRING;
+		port_clkena4		: STRING;
+		port_clkena5		: STRING;
+		port_extclk0		: STRING;
+		port_extclk1		: STRING;
+		port_extclk2		: STRING;
+		port_extclk3		: STRING;
+		valid_lock_multiplier		: NATURAL
+	);
+	PORT (
+			clk	: OUT STD_LOGIC_VECTOR (5 DOWNTO 0);
+			inclk	: IN STD_LOGIC_VECTOR (1 DOWNTO 0);
+			locked	: OUT STD_LOGIC 
+	);
+	END COMPONENT;
+
+BEGIN
+	sub_wire7_bv(0 DOWNTO 0) <= "0";
+	sub_wire7    <= To_stdlogicvector(sub_wire7_bv);
+	sub_wire4    <= sub_wire0(2);
+	sub_wire3    <= sub_wire0(0);
+	sub_wire1    <= sub_wire0(1);
+	c1    <= sub_wire1;
+	locked    <= sub_wire2;
+	c0    <= sub_wire3;
+	c2    <= sub_wire4;
+	sub_wire5    <= inclk0;
+	sub_wire6    <= sub_wire7(0 DOWNTO 0) & sub_wire5;
+
+	altpll_component : altpll
+	GENERIC MAP (
+		clk0_divide_by => 4,
+		clk0_duty_cycle => 50,
+		clk0_multiply_by => 17,
+		clk0_phase_shift => "0",
+		clk1_divide_by => 8,
+		clk1_duty_cycle => 50,
+		clk1_multiply_by => 17,
+		clk1_phase_shift => "0",
+		clk2_divide_by => 4,
+		clk2_duty_cycle => 50,
+		clk2_multiply_by => 17,
+		clk2_phase_shift => "-1280",
+		compensate_clock => "CLK0",
+		gate_lock_counter => 1048575,
+		gate_lock_signal => "YES",
+		inclk0_input_frequency => 37037,
+		intended_device_family => "Cyclone II",
+		invalid_lock_multiplier => 5,
+		lpm_hint => "CBX_MODULE_PREFIX=pll_ntsc",
+		lpm_type => "altpll",
+		operation_mode => "NORMAL",
+		port_activeclock => "PORT_UNUSED",
+		port_areset => "PORT_UNUSED",
+		port_clkbad0 => "PORT_UNUSED",
+		port_clkbad1 => "PORT_UNUSED",
+		port_clkloss => "PORT_UNUSED",
+		port_clkswitch => "PORT_UNUSED",
+		port_configupdate => "PORT_UNUSED",
+		port_fbin => "PORT_UNUSED",
+		port_inclk0 => "PORT_USED",
+		port_inclk1 => "PORT_UNUSED",
+		port_locked => "PORT_USED",
+		port_pfdena => "PORT_UNUSED",
+		port_phasecounterselect => "PORT_UNUSED",
+		port_phasedone => "PORT_UNUSED",
+		port_phasestep => "PORT_UNUSED",
+		port_phaseupdown => "PORT_UNUSED",
+		port_pllena => "PORT_UNUSED",
+		port_scanaclr => "PORT_UNUSED",
+		port_scanclk => "PORT_UNUSED",
+		port_scanclkena => "PORT_UNUSED",
+		port_scandata => "PORT_UNUSED",
+		port_scandataout => "PORT_UNUSED",
+		port_scandone => "PORT_UNUSED",
+		port_scanread => "PORT_UNUSED",
+		port_scanwrite => "PORT_UNUSED",
+		port_clk0 => "PORT_USED",
+		port_clk1 => "PORT_USED",
+		port_clk2 => "PORT_USED",
+		port_clk3 => "PORT_UNUSED",
+		port_clk4 => "PORT_UNUSED",
+		port_clk5 => "PORT_UNUSED",
+		port_clkena0 => "PORT_UNUSED",
+		port_clkena1 => "PORT_UNUSED",
+		port_clkena2 => "PORT_UNUSED",
+		port_clkena3 => "PORT_UNUSED",
+		port_clkena4 => "PORT_UNUSED",
+		port_clkena5 => "PORT_UNUSED",
+		port_extclk0 => "PORT_UNUSED",
+		port_extclk1 => "PORT_UNUSED",
+		port_extclk2 => "PORT_UNUSED",
+		port_extclk3 => "PORT_UNUSED",
+		valid_lock_multiplier => 1
+	)
+	PORT MAP (
+		inclk => sub_wire6,
+		clk => sub_wire0,
+		locked => sub_wire2
+	);
+
+
+
+END SYN;
+
+-- ============================================================
+-- CNX file retrieval info
+-- ============================================================
+-- Retrieval info: PRIVATE: ACTIVECLK_CHECK STRING "0"
+-- Retrieval info: PRIVATE: BANDWIDTH STRING "1.000"
+-- Retrieval info: PRIVATE: BANDWIDTH_FEATURE_ENABLED STRING "0"
+-- Retrieval info: PRIVATE: BANDWIDTH_FREQ_UNIT STRING "MHz"
+-- Retrieval info: PRIVATE: BANDWIDTH_PRESET STRING "Low"
+-- Retrieval info: PRIVATE: BANDWIDTH_USE_AUTO STRING "1"
+-- Retrieval info: PRIVATE: BANDWIDTH_USE_CUSTOM STRING "0"
+-- Retrieval info: PRIVATE: BANDWIDTH_USE_PRESET STRING "0"
+-- Retrieval info: PRIVATE: CLKBAD_SWITCHOVER_CHECK STRING "0"
+-- Retrieval info: PRIVATE: CLKLOSS_CHECK STRING "0"
+-- Retrieval info: PRIVATE: CLKSWITCH_CHECK STRING "1"
+-- Retrieval info: PRIVATE: CNX_NO_COMPENSATE_RADIO STRING "0"
+-- Retrieval info: PRIVATE: CREATE_CLKBAD_CHECK STRING "0"
+-- Retrieval info: PRIVATE: CREATE_INCLK1_CHECK STRING "0"
+-- Retrieval info: PRIVATE: CUR_DEDICATED_CLK STRING "c0"
+-- Retrieval info: PRIVATE: CUR_FBIN_CLK STRING "c0"
+-- Retrieval info: PRIVATE: DEVICE_SPEED_GRADE STRING "7"
+-- Retrieval info: PRIVATE: DIV_FACTOR0 NUMERIC "4"
+-- Retrieval info: PRIVATE: DIV_FACTOR1 NUMERIC "8"
+-- Retrieval info: PRIVATE: DIV_FACTOR2 NUMERIC "4"
+-- Retrieval info: PRIVATE: DUTY_CYCLE0 STRING "50.00000000"
+-- Retrieval info: PRIVATE: DUTY_CYCLE1 STRING "50.00000000"
+-- Retrieval info: PRIVATE: DUTY_CYCLE2 STRING "50.00000000"
+-- Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE0 STRING "114.750000"
+-- Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE1 STRING "57.375000"
+-- Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE2 STRING "114.750000"
+-- Retrieval info: PRIVATE: EXPLICIT_SWITCHOVER_COUNTER STRING "0"
+-- Retrieval info: PRIVATE: EXT_FEEDBACK_RADIO STRING "0"
+-- Retrieval info: PRIVATE: GLOCKED_COUNTER_EDIT_CHANGED STRING "1"
+-- Retrieval info: PRIVATE: GLOCKED_FEATURE_ENABLED STRING "1"
+-- Retrieval info: PRIVATE: GLOCKED_MODE_CHECK STRING "1"
+-- Retrieval info: PRIVATE: GLOCK_COUNTER_EDIT NUMERIC "1048575"
+-- Retrieval info: PRIVATE: HAS_MANUAL_SWITCHOVER STRING "1"
+-- Retrieval info: PRIVATE: INCLK0_FREQ_EDIT STRING "27.000"
+-- Retrieval info: PRIVATE: INCLK0_FREQ_UNIT_COMBO STRING "MHz"
+-- Retrieval info: PRIVATE: INCLK1_FREQ_EDIT STRING "100.000"
+-- Retrieval info: PRIVATE: INCLK1_FREQ_EDIT_CHANGED STRING "1"
+-- Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_CHANGED STRING "1"
+-- Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_COMBO STRING "MHz"
+-- Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone II"
+-- Retrieval info: PRIVATE: INT_FEEDBACK__MODE_RADIO STRING "1"
+-- Retrieval info: PRIVATE: LOCKED_OUTPUT_CHECK STRING "1"
+-- Retrieval info: PRIVATE: LONG_SCAN_RADIO STRING "1"
+-- Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE STRING "Not Available"
+-- Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE_DIRTY NUMERIC "0"
+-- Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT0 STRING "deg"
+-- Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT1 STRING "ps"
+-- Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT2 STRING "ps"
+-- Retrieval info: PRIVATE: MIG_DEVICE_SPEED_GRADE STRING "Any"
+-- Retrieval info: PRIVATE: MIRROR_CLK0 STRING "0"
+-- Retrieval info: PRIVATE: MIRROR_CLK1 STRING "0"
+-- Retrieval info: PRIVATE: MIRROR_CLK2 STRING "0"
+-- Retrieval info: PRIVATE: MULT_FACTOR0 NUMERIC "17"
+-- Retrieval info: PRIVATE: MULT_FACTOR1 NUMERIC "17"
+-- Retrieval info: PRIVATE: MULT_FACTOR2 NUMERIC "17"
+-- Retrieval info: PRIVATE: NORMAL_MODE_RADIO STRING "1"
+-- Retrieval info: PRIVATE: OUTPUT_FREQ0 STRING "28.70000000"
+-- Retrieval info: PRIVATE: OUTPUT_FREQ1 STRING "28.70000000"
+-- Retrieval info: PRIVATE: OUTPUT_FREQ2 STRING "100.00000000"
+-- Retrieval info: PRIVATE: OUTPUT_FREQ_MODE0 STRING "0"
+-- Retrieval info: PRIVATE: OUTPUT_FREQ_MODE1 STRING "0"
+-- Retrieval info: PRIVATE: OUTPUT_FREQ_MODE2 STRING "0"
+-- Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT0 STRING "MHz"
+-- Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT1 STRING "MHz"
+-- Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT2 STRING "MHz"
+-- Retrieval info: PRIVATE: PHASE_RECONFIG_FEATURE_ENABLED STRING "0"
+-- Retrieval info: PRIVATE: PHASE_RECONFIG_INPUTS_CHECK STRING "0"
+-- Retrieval info: PRIVATE: PHASE_SHIFT0 STRING "0.00000000"
+-- Retrieval info: PRIVATE: PHASE_SHIFT1 STRING "0.00000000"
+-- Retrieval info: PRIVATE: PHASE_SHIFT2 STRING "-1.28000000"
+-- Retrieval info: PRIVATE: PHASE_SHIFT_STEP_ENABLED_CHECK STRING "0"
+-- Retrieval info: PRIVATE: PHASE_SHIFT_UNIT0 STRING "deg"
+-- Retrieval info: PRIVATE: PHASE_SHIFT_UNIT1 STRING "ns"
+-- Retrieval info: PRIVATE: PHASE_SHIFT_UNIT2 STRING "ns"
+-- Retrieval info: PRIVATE: PLL_ADVANCED_PARAM_CHECK STRING "0"
+-- Retrieval info: PRIVATE: PLL_ARESET_CHECK STRING "0"
+-- Retrieval info: PRIVATE: PLL_AUTOPLL_CHECK NUMERIC "1"
+-- Retrieval info: PRIVATE: PLL_ENA_CHECK STRING "0"
+-- Retrieval info: PRIVATE: PLL_ENHPLL_CHECK NUMERIC "0"
+-- Retrieval info: PRIVATE: PLL_FASTPLL_CHECK NUMERIC "0"
+-- Retrieval info: PRIVATE: PLL_FBMIMIC_CHECK STRING "0"
+-- Retrieval info: PRIVATE: PLL_LVDS_PLL_CHECK NUMERIC "0"
+-- Retrieval info: PRIVATE: PLL_PFDENA_CHECK STRING "0"
+-- Retrieval info: PRIVATE: PLL_TARGET_HARCOPY_CHECK NUMERIC "0"
+-- Retrieval info: PRIVATE: PRIMARY_CLK_COMBO STRING "inclk0"
+-- Retrieval info: PRIVATE: RECONFIG_FILE STRING "pll.mif"
+-- Retrieval info: PRIVATE: SACN_INPUTS_CHECK STRING "0"
+-- Retrieval info: PRIVATE: SCAN_FEATURE_ENABLED STRING "0"
+-- Retrieval info: PRIVATE: SELF_RESET_LOCK_LOSS STRING "0"
+-- Retrieval info: PRIVATE: SHORT_SCAN_RADIO STRING "0"
+-- Retrieval info: PRIVATE: SPREAD_FEATURE_ENABLED STRING "0"
+-- Retrieval info: PRIVATE: SPREAD_FREQ STRING "50.000"
+-- Retrieval info: PRIVATE: SPREAD_FREQ_UNIT STRING "KHz"
+-- Retrieval info: PRIVATE: SPREAD_PERCENT STRING "0.500"
+-- Retrieval info: PRIVATE: SPREAD_USE STRING "0"
+-- Retrieval info: PRIVATE: SRC_SYNCH_COMP_RADIO STRING "0"
+-- Retrieval info: PRIVATE: STICKY_CLK0 STRING "1"
+-- Retrieval info: PRIVATE: STICKY_CLK1 STRING "1"
+-- Retrieval info: PRIVATE: STICKY_CLK2 STRING "1"
+-- Retrieval info: PRIVATE: SWITCHOVER_COUNT_EDIT NUMERIC "1"
+-- Retrieval info: PRIVATE: SWITCHOVER_FEATURE_ENABLED STRING "1"
+-- Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0"
+-- Retrieval info: PRIVATE: USE_CLK0 STRING "1"
+-- Retrieval info: PRIVATE: USE_CLK1 STRING "1"
+-- Retrieval info: PRIVATE: USE_CLK2 STRING "1"
+-- Retrieval info: PRIVATE: USE_CLKENA0 STRING "0"
+-- Retrieval info: PRIVATE: USE_CLKENA1 STRING "0"
+-- Retrieval info: PRIVATE: USE_CLKENA2 STRING "0"
+-- Retrieval info: PRIVATE: USE_MIL_SPEED_GRADE NUMERIC "0"
+-- Retrieval info: PRIVATE: ZERO_DELAY_RADIO STRING "0"
+-- Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all
+-- Retrieval info: CONSTANT: CLK0_DIVIDE_BY NUMERIC "4"
+-- Retrieval info: CONSTANT: CLK0_DUTY_CYCLE NUMERIC "50"
+-- Retrieval info: CONSTANT: CLK0_MULTIPLY_BY NUMERIC "17"
+-- Retrieval info: CONSTANT: CLK0_PHASE_SHIFT STRING "0"
+-- Retrieval info: CONSTANT: CLK1_DIVIDE_BY NUMERIC "8"
+-- Retrieval info: CONSTANT: CLK1_DUTY_CYCLE NUMERIC "50"
+-- Retrieval info: CONSTANT: CLK1_MULTIPLY_BY NUMERIC "17"
+-- Retrieval info: CONSTANT: CLK1_PHASE_SHIFT STRING "0"
+-- Retrieval info: CONSTANT: CLK2_DIVIDE_BY NUMERIC "4"
+-- Retrieval info: CONSTANT: CLK2_DUTY_CYCLE NUMERIC "50"
+-- Retrieval info: CONSTANT: CLK2_MULTIPLY_BY NUMERIC "17"
+-- Retrieval info: CONSTANT: CLK2_PHASE_SHIFT STRING "-1280"
+-- Retrieval info: CONSTANT: COMPENSATE_CLOCK STRING "CLK0"
+-- Retrieval info: CONSTANT: GATE_LOCK_COUNTER NUMERIC "1048575"
+-- Retrieval info: CONSTANT: GATE_LOCK_SIGNAL STRING "YES"
+-- Retrieval info: CONSTANT: INCLK0_INPUT_FREQUENCY NUMERIC "37037"
+-- Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone II"
+-- Retrieval info: CONSTANT: INVALID_LOCK_MULTIPLIER NUMERIC "5"
+-- Retrieval info: CONSTANT: LPM_TYPE STRING "altpll"
+-- Retrieval info: CONSTANT: OPERATION_MODE STRING "NORMAL"
+-- Retrieval info: CONSTANT: PORT_ACTIVECLOCK STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_ARESET STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_CLKBAD0 STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_CLKBAD1 STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_CLKLOSS STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_CLKSWITCH STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_CONFIGUPDATE STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_FBIN STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_INCLK0 STRING "PORT_USED"
+-- Retrieval info: CONSTANT: PORT_INCLK1 STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_LOCKED STRING "PORT_USED"
+-- Retrieval info: CONSTANT: PORT_PFDENA STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_PHASECOUNTERSELECT STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_PHASEDONE STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_PHASESTEP STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_PHASEUPDOWN STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_PLLENA STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_SCANACLR STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_SCANCLK STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_SCANCLKENA STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_SCANDATA STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_SCANDATAOUT STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_SCANDONE STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_SCANREAD STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_SCANWRITE STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_clk0 STRING "PORT_USED"
+-- Retrieval info: CONSTANT: PORT_clk1 STRING "PORT_USED"
+-- Retrieval info: CONSTANT: PORT_clk2 STRING "PORT_USED"
+-- Retrieval info: CONSTANT: PORT_clk3 STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_clk4 STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_clk5 STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_clkena0 STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_clkena1 STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_clkena2 STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_clkena3 STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_clkena4 STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_clkena5 STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_extclk0 STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_extclk1 STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_extclk2 STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_extclk3 STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: VALID_LOCK_MULTIPLIER NUMERIC "1"
+-- Retrieval info: USED_PORT: @clk 0 0 6 0 OUTPUT_CLK_EXT VCC "@clk[5..0]"
+-- Retrieval info: USED_PORT: @extclk 0 0 4 0 OUTPUT_CLK_EXT VCC "@extclk[3..0]"
+-- Retrieval info: USED_PORT: @inclk 0 0 2 0 INPUT_CLK_EXT VCC "@inclk[1..0]"
+-- Retrieval info: USED_PORT: c0 0 0 0 0 OUTPUT_CLK_EXT VCC "c0"
+-- Retrieval info: USED_PORT: c1 0 0 0 0 OUTPUT_CLK_EXT VCC "c1"
+-- Retrieval info: USED_PORT: c2 0 0 0 0 OUTPUT_CLK_EXT VCC "c2"
+-- Retrieval info: USED_PORT: inclk0 0 0 0 0 INPUT_CLK_EXT GND "inclk0"
+-- Retrieval info: USED_PORT: locked 0 0 0 0 OUTPUT GND "locked"
+-- Retrieval info: CONNECT: @inclk 0 0 1 1 GND 0 0 0 0
+-- Retrieval info: CONNECT: @inclk 0 0 1 0 inclk0 0 0 0 0
+-- Retrieval info: CONNECT: c0 0 0 0 0 @clk 0 0 1 0
+-- Retrieval info: CONNECT: c1 0 0 0 0 @clk 0 0 1 1
+-- Retrieval info: CONNECT: c2 0 0 0 0 @clk 0 0 1 2
+-- Retrieval info: CONNECT: locked 0 0 0 0 @locked 0 0 0 0
+-- Retrieval info: GEN_FILE: TYPE_NORMAL pll_ntsc.vhd TRUE
+-- Retrieval info: GEN_FILE: TYPE_NORMAL pll_ntsc.ppf TRUE
+-- Retrieval info: GEN_FILE: TYPE_NORMAL pll_ntsc.inc FALSE
+-- Retrieval info: GEN_FILE: TYPE_NORMAL pll_ntsc.cmp TRUE
+-- Retrieval info: GEN_FILE: TYPE_NORMAL pll_ntsc.bsf FALSE
+-- Retrieval info: GEN_FILE: TYPE_NORMAL pll_ntsc_inst.vhd FALSE
+-- Retrieval info: LIB_FILE: altera_mf
+-- Retrieval info: CBX_MODULE_PREFIX: ON
Index: de1/pll_pal.cmp
===================================================================
--- de1/pll_pal.cmp	(nonexistent)
+++ de1/pll_pal.cmp	(revision 198)
@@ -0,0 +1,25 @@
+--Copyright (C) 1991-2013 Altera Corporation
+--Your use of Altera Corporation's design tools, logic functions 
+--and other software and tools, and its AMPP partner logic 
+--functions, and any output files from any of the foregoing 
+--(including device programming or simulation files), and any 
+--associated documentation or information are expressly subject 
+--to the terms and conditions of the Altera Program License 
+--Subscription Agreement, Altera MegaCore Function License 
+--Agreement, or other applicable license agreement, including, 
+--without limitation, that your use is for the sole purpose of 
+--programming logic devices manufactured by Altera and sold by 
+--Altera or its authorized distributors.  Please refer to the 
+--applicable agreement for further details.
+
+
+component pll_pal
+	PORT
+	(
+		inclk0		: IN STD_LOGIC  := '0';
+		c0		: OUT STD_LOGIC ;
+		c1		: OUT STD_LOGIC ;
+		c2		: OUT STD_LOGIC ;
+		locked		: OUT STD_LOGIC 
+	);
+end component;
Index: de1/pll_pal.ppf
===================================================================
--- de1/pll_pal.ppf	(nonexistent)
+++ de1/pll_pal.ppf	(revision 198)
@@ -0,0 +1,12 @@
+<?xml version="1.0" encoding="UTF-8" ?>
+<!DOCTYPE pinplan>
+<pinplan intended_family="Cyclone II" variation_name="pll_pal" megafunction_name="ALTPLL" specifies="all_ports">
+<global>
+<pin name="inclk0" direction="input" scope="external" source="clock"  />
+<pin name="c0" direction="output" scope="external" source="clock"  />
+<pin name="c1" direction="output" scope="external" source="clock"  />
+<pin name="c2" direction="output" scope="external" source="clock"  />
+<pin name="locked" direction="output" scope="external"  />
+
+</global>
+</pinplan>
Index: de1/pll_pal.qip
===================================================================
--- de1/pll_pal.qip	(nonexistent)
+++ de1/pll_pal.qip	(revision 198)
@@ -0,0 +1,5 @@
+set_global_assignment -name IP_TOOL_NAME "ALTPLL"
+set_global_assignment -name IP_TOOL_VERSION "13.0"
+set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) "pll_pal.vhd"]
+set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "pll_pal.cmp"]
+set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "pll_pal.ppf"]
Index: de1/pll_pal.vhd
===================================================================
--- de1/pll_pal.vhd	(nonexistent)
+++ de1/pll_pal.vhd	(revision 198)
@@ -0,0 +1,427 @@
+-- megafunction wizard: %ALTPLL%
+-- GENERATION: STANDARD
+-- VERSION: WM1.0
+-- MODULE: altpll 
+
+-- ============================================================
+-- File Name: pll_pal.vhd
+-- Megafunction Name(s):
+-- 			altpll
+--
+-- Simulation Library Files(s):
+-- 			altera_mf
+-- ============================================================
+-- ************************************************************
+-- THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
+--
+-- 13.0.1 Build 232 06/12/2013 SP 1 SJ Web Edition
+-- ************************************************************
+
+
+--Copyright (C) 1991-2013 Altera Corporation
+--Your use of Altera Corporation's design tools, logic functions 
+--and other software and tools, and its AMPP partner logic 
+--functions, and any output files from any of the foregoing 
+--(including device programming or simulation files), and any 
+--associated documentation or information are expressly subject 
+--to the terms and conditions of the Altera Program License 
+--Subscription Agreement, Altera MegaCore Function License 
+--Agreement, or other applicable license agreement, including, 
+--without limitation, that your use is for the sole purpose of 
+--programming logic devices manufactured by Altera and sold by 
+--Altera or its authorized distributors.  Please refer to the 
+--applicable agreement for further details.
+
+
+LIBRARY ieee;
+USE ieee.std_logic_1164.all;
+
+LIBRARY altera_mf;
+USE altera_mf.all;
+
+ENTITY pll_pal IS
+	PORT
+	(
+		inclk0		: IN STD_LOGIC  := '0';
+		c0		: OUT STD_LOGIC ;
+		c1		: OUT STD_LOGIC ;
+		c2		: OUT STD_LOGIC ;
+		locked		: OUT STD_LOGIC 
+	);
+END pll_pal;
+
+
+ARCHITECTURE SYN OF pll_pal IS
+
+	SIGNAL sub_wire0	: STD_LOGIC_VECTOR (5 DOWNTO 0);
+	SIGNAL sub_wire1	: STD_LOGIC ;
+	SIGNAL sub_wire2	: STD_LOGIC ;
+	SIGNAL sub_wire3	: STD_LOGIC ;
+	SIGNAL sub_wire4	: STD_LOGIC ;
+	SIGNAL sub_wire5	: STD_LOGIC ;
+	SIGNAL sub_wire6	: STD_LOGIC_VECTOR (1 DOWNTO 0);
+	SIGNAL sub_wire7_bv	: BIT_VECTOR (0 DOWNTO 0);
+	SIGNAL sub_wire7	: STD_LOGIC_VECTOR (0 DOWNTO 0);
+
+
+
+	COMPONENT altpll
+	GENERIC (
+		clk0_divide_by		: NATURAL;
+		clk0_duty_cycle		: NATURAL;
+		clk0_multiply_by		: NATURAL;
+		clk0_phase_shift		: STRING;
+		clk1_divide_by		: NATURAL;
+		clk1_duty_cycle		: NATURAL;
+		clk1_multiply_by		: NATURAL;
+		clk1_phase_shift		: STRING;
+		clk2_divide_by		: NATURAL;
+		clk2_duty_cycle		: NATURAL;
+		clk2_multiply_by		: NATURAL;
+		clk2_phase_shift		: STRING;
+		compensate_clock		: STRING;
+		gate_lock_counter		: NATURAL;
+		gate_lock_signal		: STRING;
+		inclk0_input_frequency		: NATURAL;
+		intended_device_family		: STRING;
+		invalid_lock_multiplier		: NATURAL;
+		lpm_hint		: STRING;
+		lpm_type		: STRING;
+		operation_mode		: STRING;
+		port_activeclock		: STRING;
+		port_areset		: STRING;
+		port_clkbad0		: STRING;
+		port_clkbad1		: STRING;
+		port_clkloss		: STRING;
+		port_clkswitch		: STRING;
+		port_configupdate		: STRING;
+		port_fbin		: STRING;
+		port_inclk0		: STRING;
+		port_inclk1		: STRING;
+		port_locked		: STRING;
+		port_pfdena		: STRING;
+		port_phasecounterselect		: STRING;
+		port_phasedone		: STRING;
+		port_phasestep		: STRING;
+		port_phaseupdown		: STRING;
+		port_pllena		: STRING;
+		port_scanaclr		: STRING;
+		port_scanclk		: STRING;
+		port_scanclkena		: STRING;
+		port_scandata		: STRING;
+		port_scandataout		: STRING;
+		port_scandone		: STRING;
+		port_scanread		: STRING;
+		port_scanwrite		: STRING;
+		port_clk0		: STRING;
+		port_clk1		: STRING;
+		port_clk2		: STRING;
+		port_clk3		: STRING;
+		port_clk4		: STRING;
+		port_clk5		: STRING;
+		port_clkena0		: STRING;
+		port_clkena1		: STRING;
+		port_clkena2		: STRING;
+		port_clkena3		: STRING;
+		port_clkena4		: STRING;
+		port_clkena5		: STRING;
+		port_extclk0		: STRING;
+		port_extclk1		: STRING;
+		port_extclk2		: STRING;
+		port_extclk3		: STRING;
+		valid_lock_multiplier		: NATURAL
+	);
+	PORT (
+			clk	: OUT STD_LOGIC_VECTOR (5 DOWNTO 0);
+			inclk	: IN STD_LOGIC_VECTOR (1 DOWNTO 0);
+			locked	: OUT STD_LOGIC 
+	);
+	END COMPONENT;
+
+BEGIN
+	sub_wire7_bv(0 DOWNTO 0) <= "0";
+	sub_wire7    <= To_stdlogicvector(sub_wire7_bv);
+	sub_wire4    <= sub_wire0(2);
+	sub_wire3    <= sub_wire0(0);
+	sub_wire1    <= sub_wire0(1);
+	c1    <= sub_wire1;
+	locked    <= sub_wire2;
+	c0    <= sub_wire3;
+	c2    <= sub_wire4;
+	sub_wire5    <= inclk0;
+	sub_wire6    <= sub_wire7(0 DOWNTO 0) & sub_wire5;
+
+	altpll_component : altpll
+	GENERIC MAP (
+		clk0_divide_by => 5,
+		clk0_duty_cycle => 50,
+		clk0_multiply_by => 21,
+		clk0_phase_shift => "0",
+		clk1_divide_by => 10,
+		clk1_duty_cycle => 50,
+		clk1_multiply_by => 21,
+		clk1_phase_shift => "0",
+		clk2_divide_by => 5,
+		clk2_duty_cycle => 50,
+		clk2_multiply_by => 21,
+		clk2_phase_shift => "-1280",
+		compensate_clock => "CLK0",
+		gate_lock_counter => 1048575,
+		gate_lock_signal => "YES",
+		inclk0_input_frequency => 37037,
+		intended_device_family => "Cyclone II",
+		invalid_lock_multiplier => 5,
+		lpm_hint => "CBX_MODULE_PREFIX=pll_pal",
+		lpm_type => "altpll",
+		operation_mode => "NORMAL",
+		port_activeclock => "PORT_UNUSED",
+		port_areset => "PORT_UNUSED",
+		port_clkbad0 => "PORT_UNUSED",
+		port_clkbad1 => "PORT_UNUSED",
+		port_clkloss => "PORT_UNUSED",
+		port_clkswitch => "PORT_UNUSED",
+		port_configupdate => "PORT_UNUSED",
+		port_fbin => "PORT_UNUSED",
+		port_inclk0 => "PORT_USED",
+		port_inclk1 => "PORT_UNUSED",
+		port_locked => "PORT_USED",
+		port_pfdena => "PORT_UNUSED",
+		port_phasecounterselect => "PORT_UNUSED",
+		port_phasedone => "PORT_UNUSED",
+		port_phasestep => "PORT_UNUSED",
+		port_phaseupdown => "PORT_UNUSED",
+		port_pllena => "PORT_UNUSED",
+		port_scanaclr => "PORT_UNUSED",
+		port_scanclk => "PORT_UNUSED",
+		port_scanclkena => "PORT_UNUSED",
+		port_scandata => "PORT_UNUSED",
+		port_scandataout => "PORT_UNUSED",
+		port_scandone => "PORT_UNUSED",
+		port_scanread => "PORT_UNUSED",
+		port_scanwrite => "PORT_UNUSED",
+		port_clk0 => "PORT_USED",
+		port_clk1 => "PORT_USED",
+		port_clk2 => "PORT_USED",
+		port_clk3 => "PORT_UNUSED",
+		port_clk4 => "PORT_UNUSED",
+		port_clk5 => "PORT_UNUSED",
+		port_clkena0 => "PORT_UNUSED",
+		port_clkena1 => "PORT_UNUSED",
+		port_clkena2 => "PORT_UNUSED",
+		port_clkena3 => "PORT_UNUSED",
+		port_clkena4 => "PORT_UNUSED",
+		port_clkena5 => "PORT_UNUSED",
+		port_extclk0 => "PORT_UNUSED",
+		port_extclk1 => "PORT_UNUSED",
+		port_extclk2 => "PORT_UNUSED",
+		port_extclk3 => "PORT_UNUSED",
+		valid_lock_multiplier => 1
+	)
+	PORT MAP (
+		inclk => sub_wire6,
+		clk => sub_wire0,
+		locked => sub_wire2
+	);
+
+
+
+END SYN;
+
+-- ============================================================
+-- CNX file retrieval info
+-- ============================================================
+-- Retrieval info: PRIVATE: ACTIVECLK_CHECK STRING "0"
+-- Retrieval info: PRIVATE: BANDWIDTH STRING "1.000"
+-- Retrieval info: PRIVATE: BANDWIDTH_FEATURE_ENABLED STRING "0"
+-- Retrieval info: PRIVATE: BANDWIDTH_FREQ_UNIT STRING "MHz"
+-- Retrieval info: PRIVATE: BANDWIDTH_PRESET STRING "Low"
+-- Retrieval info: PRIVATE: BANDWIDTH_USE_AUTO STRING "1"
+-- Retrieval info: PRIVATE: BANDWIDTH_USE_CUSTOM STRING "0"
+-- Retrieval info: PRIVATE: BANDWIDTH_USE_PRESET STRING "0"
+-- Retrieval info: PRIVATE: CLKBAD_SWITCHOVER_CHECK STRING "0"
+-- Retrieval info: PRIVATE: CLKLOSS_CHECK STRING "0"
+-- Retrieval info: PRIVATE: CLKSWITCH_CHECK STRING "1"
+-- Retrieval info: PRIVATE: CNX_NO_COMPENSATE_RADIO STRING "0"
+-- Retrieval info: PRIVATE: CREATE_CLKBAD_CHECK STRING "0"
+-- Retrieval info: PRIVATE: CREATE_INCLK1_CHECK STRING "0"
+-- Retrieval info: PRIVATE: CUR_DEDICATED_CLK STRING "c0"
+-- Retrieval info: PRIVATE: CUR_FBIN_CLK STRING "c0"
+-- Retrieval info: PRIVATE: DEVICE_SPEED_GRADE STRING "7"
+-- Retrieval info: PRIVATE: DIV_FACTOR0 NUMERIC "5"
+-- Retrieval info: PRIVATE: DIV_FACTOR1 NUMERIC "10"
+-- Retrieval info: PRIVATE: DIV_FACTOR2 NUMERIC "5"
+-- Retrieval info: PRIVATE: DUTY_CYCLE0 STRING "50.00000000"
+-- Retrieval info: PRIVATE: DUTY_CYCLE1 STRING "50.00000000"
+-- Retrieval info: PRIVATE: DUTY_CYCLE2 STRING "50.00000000"
+-- Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE0 STRING "113.400002"
+-- Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE1 STRING "56.700001"
+-- Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE2 STRING "113.400002"
+-- Retrieval info: PRIVATE: EXPLICIT_SWITCHOVER_COUNTER STRING "0"
+-- Retrieval info: PRIVATE: EXT_FEEDBACK_RADIO STRING "0"
+-- Retrieval info: PRIVATE: GLOCKED_COUNTER_EDIT_CHANGED STRING "1"
+-- Retrieval info: PRIVATE: GLOCKED_FEATURE_ENABLED STRING "1"
+-- Retrieval info: PRIVATE: GLOCKED_MODE_CHECK STRING "1"
+-- Retrieval info: PRIVATE: GLOCK_COUNTER_EDIT NUMERIC "1048575"
+-- Retrieval info: PRIVATE: HAS_MANUAL_SWITCHOVER STRING "1"
+-- Retrieval info: PRIVATE: INCLK0_FREQ_EDIT STRING "27.000"
+-- Retrieval info: PRIVATE: INCLK0_FREQ_UNIT_COMBO STRING "MHz"
+-- Retrieval info: PRIVATE: INCLK1_FREQ_EDIT STRING "100.000"
+-- Retrieval info: PRIVATE: INCLK1_FREQ_EDIT_CHANGED STRING "1"
+-- Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_CHANGED STRING "1"
+-- Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_COMBO STRING "MHz"
+-- Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone II"
+-- Retrieval info: PRIVATE: INT_FEEDBACK__MODE_RADIO STRING "1"
+-- Retrieval info: PRIVATE: LOCKED_OUTPUT_CHECK STRING "1"
+-- Retrieval info: PRIVATE: LONG_SCAN_RADIO STRING "1"
+-- Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE STRING "Not Available"
+-- Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE_DIRTY NUMERIC "0"
+-- Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT0 STRING "deg"
+-- Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT1 STRING "ps"
+-- Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT2 STRING "ps"
+-- Retrieval info: PRIVATE: MIG_DEVICE_SPEED_GRADE STRING "Any"
+-- Retrieval info: PRIVATE: MIRROR_CLK0 STRING "0"
+-- Retrieval info: PRIVATE: MIRROR_CLK1 STRING "0"
+-- Retrieval info: PRIVATE: MIRROR_CLK2 STRING "0"
+-- Retrieval info: PRIVATE: MULT_FACTOR0 NUMERIC "21"
+-- Retrieval info: PRIVATE: MULT_FACTOR1 NUMERIC "21"
+-- Retrieval info: PRIVATE: MULT_FACTOR2 NUMERIC "21"
+-- Retrieval info: PRIVATE: NORMAL_MODE_RADIO STRING "1"
+-- Retrieval info: PRIVATE: OUTPUT_FREQ0 STRING "28.70000000"
+-- Retrieval info: PRIVATE: OUTPUT_FREQ1 STRING "28.70000000"
+-- Retrieval info: PRIVATE: OUTPUT_FREQ2 STRING "100.00000000"
+-- Retrieval info: PRIVATE: OUTPUT_FREQ_MODE0 STRING "0"
+-- Retrieval info: PRIVATE: OUTPUT_FREQ_MODE1 STRING "0"
+-- Retrieval info: PRIVATE: OUTPUT_FREQ_MODE2 STRING "0"
+-- Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT0 STRING "MHz"
+-- Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT1 STRING "MHz"
+-- Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT2 STRING "MHz"
+-- Retrieval info: PRIVATE: PHASE_RECONFIG_FEATURE_ENABLED STRING "0"
+-- Retrieval info: PRIVATE: PHASE_RECONFIG_INPUTS_CHECK STRING "0"
+-- Retrieval info: PRIVATE: PHASE_SHIFT0 STRING "0.00000000"
+-- Retrieval info: PRIVATE: PHASE_SHIFT1 STRING "0.00000000"
+-- Retrieval info: PRIVATE: PHASE_SHIFT2 STRING "-1.28000000"
+-- Retrieval info: PRIVATE: PHASE_SHIFT_STEP_ENABLED_CHECK STRING "0"
+-- Retrieval info: PRIVATE: PHASE_SHIFT_UNIT0 STRING "deg"
+-- Retrieval info: PRIVATE: PHASE_SHIFT_UNIT1 STRING "ns"
+-- Retrieval info: PRIVATE: PHASE_SHIFT_UNIT2 STRING "ns"
+-- Retrieval info: PRIVATE: PLL_ADVANCED_PARAM_CHECK STRING "0"
+-- Retrieval info: PRIVATE: PLL_ARESET_CHECK STRING "0"
+-- Retrieval info: PRIVATE: PLL_AUTOPLL_CHECK NUMERIC "1"
+-- Retrieval info: PRIVATE: PLL_ENA_CHECK STRING "0"
+-- Retrieval info: PRIVATE: PLL_ENHPLL_CHECK NUMERIC "0"
+-- Retrieval info: PRIVATE: PLL_FASTPLL_CHECK NUMERIC "0"
+-- Retrieval info: PRIVATE: PLL_FBMIMIC_CHECK STRING "0"
+-- Retrieval info: PRIVATE: PLL_LVDS_PLL_CHECK NUMERIC "0"
+-- Retrieval info: PRIVATE: PLL_PFDENA_CHECK STRING "0"
+-- Retrieval info: PRIVATE: PLL_TARGET_HARCOPY_CHECK NUMERIC "0"
+-- Retrieval info: PRIVATE: PRIMARY_CLK_COMBO STRING "inclk0"
+-- Retrieval info: PRIVATE: RECONFIG_FILE STRING "pll.mif"
+-- Retrieval info: PRIVATE: SACN_INPUTS_CHECK STRING "0"
+-- Retrieval info: PRIVATE: SCAN_FEATURE_ENABLED STRING "0"
+-- Retrieval info: PRIVATE: SELF_RESET_LOCK_LOSS STRING "0"
+-- Retrieval info: PRIVATE: SHORT_SCAN_RADIO STRING "0"
+-- Retrieval info: PRIVATE: SPREAD_FEATURE_ENABLED STRING "0"
+-- Retrieval info: PRIVATE: SPREAD_FREQ STRING "50.000"
+-- Retrieval info: PRIVATE: SPREAD_FREQ_UNIT STRING "KHz"
+-- Retrieval info: PRIVATE: SPREAD_PERCENT STRING "0.500"
+-- Retrieval info: PRIVATE: SPREAD_USE STRING "0"
+-- Retrieval info: PRIVATE: SRC_SYNCH_COMP_RADIO STRING "0"
+-- Retrieval info: PRIVATE: STICKY_CLK0 STRING "1"
+-- Retrieval info: PRIVATE: STICKY_CLK1 STRING "1"
+-- Retrieval info: PRIVATE: STICKY_CLK2 STRING "1"
+-- Retrieval info: PRIVATE: SWITCHOVER_COUNT_EDIT NUMERIC "1"
+-- Retrieval info: PRIVATE: SWITCHOVER_FEATURE_ENABLED STRING "1"
+-- Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0"
+-- Retrieval info: PRIVATE: USE_CLK0 STRING "1"
+-- Retrieval info: PRIVATE: USE_CLK1 STRING "1"
+-- Retrieval info: PRIVATE: USE_CLK2 STRING "1"
+-- Retrieval info: PRIVATE: USE_CLKENA0 STRING "0"
+-- Retrieval info: PRIVATE: USE_CLKENA1 STRING "0"
+-- Retrieval info: PRIVATE: USE_CLKENA2 STRING "0"
+-- Retrieval info: PRIVATE: USE_MIL_SPEED_GRADE NUMERIC "0"
+-- Retrieval info: PRIVATE: ZERO_DELAY_RADIO STRING "0"
+-- Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all
+-- Retrieval info: CONSTANT: CLK0_DIVIDE_BY NUMERIC "5"
+-- Retrieval info: CONSTANT: CLK0_DUTY_CYCLE NUMERIC "50"
+-- Retrieval info: CONSTANT: CLK0_MULTIPLY_BY NUMERIC "21"
+-- Retrieval info: CONSTANT: CLK0_PHASE_SHIFT STRING "0"
+-- Retrieval info: CONSTANT: CLK1_DIVIDE_BY NUMERIC "10"
+-- Retrieval info: CONSTANT: CLK1_DUTY_CYCLE NUMERIC "50"
+-- Retrieval info: CONSTANT: CLK1_MULTIPLY_BY NUMERIC "21"
+-- Retrieval info: CONSTANT: CLK1_PHASE_SHIFT STRING "0"
+-- Retrieval info: CONSTANT: CLK2_DIVIDE_BY NUMERIC "5"
+-- Retrieval info: CONSTANT: CLK2_DUTY_CYCLE NUMERIC "50"
+-- Retrieval info: CONSTANT: CLK2_MULTIPLY_BY NUMERIC "21"
+-- Retrieval info: CONSTANT: CLK2_PHASE_SHIFT STRING "-1280"
+-- Retrieval info: CONSTANT: COMPENSATE_CLOCK STRING "CLK0"
+-- Retrieval info: CONSTANT: GATE_LOCK_COUNTER NUMERIC "1048575"
+-- Retrieval info: CONSTANT: GATE_LOCK_SIGNAL STRING "YES"
+-- Retrieval info: CONSTANT: INCLK0_INPUT_FREQUENCY NUMERIC "37037"
+-- Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone II"
+-- Retrieval info: CONSTANT: INVALID_LOCK_MULTIPLIER NUMERIC "5"
+-- Retrieval info: CONSTANT: LPM_TYPE STRING "altpll"
+-- Retrieval info: CONSTANT: OPERATION_MODE STRING "NORMAL"
+-- Retrieval info: CONSTANT: PORT_ACTIVECLOCK STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_ARESET STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_CLKBAD0 STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_CLKBAD1 STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_CLKLOSS STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_CLKSWITCH STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_CONFIGUPDATE STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_FBIN STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_INCLK0 STRING "PORT_USED"
+-- Retrieval info: CONSTANT: PORT_INCLK1 STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_LOCKED STRING "PORT_USED"
+-- Retrieval info: CONSTANT: PORT_PFDENA STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_PHASECOUNTERSELECT STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_PHASEDONE STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_PHASESTEP STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_PHASEUPDOWN STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_PLLENA STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_SCANACLR STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_SCANCLK STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_SCANCLKENA STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_SCANDATA STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_SCANDATAOUT STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_SCANDONE STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_SCANREAD STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_SCANWRITE STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_clk0 STRING "PORT_USED"
+-- Retrieval info: CONSTANT: PORT_clk1 STRING "PORT_USED"
+-- Retrieval info: CONSTANT: PORT_clk2 STRING "PORT_USED"
+-- Retrieval info: CONSTANT: PORT_clk3 STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_clk4 STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_clk5 STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_clkena0 STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_clkena1 STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_clkena2 STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_clkena3 STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_clkena4 STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_clkena5 STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_extclk0 STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_extclk1 STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_extclk2 STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_extclk3 STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: VALID_LOCK_MULTIPLIER NUMERIC "1"
+-- Retrieval info: USED_PORT: @clk 0 0 6 0 OUTPUT_CLK_EXT VCC "@clk[5..0]"
+-- Retrieval info: USED_PORT: @extclk 0 0 4 0 OUTPUT_CLK_EXT VCC "@extclk[3..0]"
+-- Retrieval info: USED_PORT: @inclk 0 0 2 0 INPUT_CLK_EXT VCC "@inclk[1..0]"
+-- Retrieval info: USED_PORT: c0 0 0 0 0 OUTPUT_CLK_EXT VCC "c0"
+-- Retrieval info: USED_PORT: c1 0 0 0 0 OUTPUT_CLK_EXT VCC "c1"
+-- Retrieval info: USED_PORT: c2 0 0 0 0 OUTPUT_CLK_EXT VCC "c2"
+-- Retrieval info: USED_PORT: inclk0 0 0 0 0 INPUT_CLK_EXT GND "inclk0"
+-- Retrieval info: USED_PORT: locked 0 0 0 0 OUTPUT GND "locked"
+-- Retrieval info: CONNECT: @inclk 0 0 1 1 GND 0 0 0 0
+-- Retrieval info: CONNECT: @inclk 0 0 1 0 inclk0 0 0 0 0
+-- Retrieval info: CONNECT: c0 0 0 0 0 @clk 0 0 1 0
+-- Retrieval info: CONNECT: c1 0 0 0 0 @clk 0 0 1 1
+-- Retrieval info: CONNECT: c2 0 0 0 0 @clk 0 0 1 2
+-- Retrieval info: CONNECT: locked 0 0 0 0 @locked 0 0 0 0
+-- Retrieval info: GEN_FILE: TYPE_NORMAL pll_pal.vhd TRUE
+-- Retrieval info: GEN_FILE: TYPE_NORMAL pll_pal.ppf TRUE
+-- Retrieval info: GEN_FILE: TYPE_NORMAL pll_pal.inc FALSE
+-- Retrieval info: GEN_FILE: TYPE_NORMAL pll_pal.cmp TRUE
+-- Retrieval info: GEN_FILE: TYPE_NORMAL pll_pal.bsf FALSE
+-- Retrieval info: GEN_FILE: TYPE_NORMAL pll_pal_inst.vhd FALSE
+-- Retrieval info: LIB_FILE: altera_mf
+-- Retrieval info: CBX_MODULE_PREFIX: ON
Index: de1/zpu_rom.vhdl
===================================================================
--- de1/zpu_rom.vhdl	(revision 197)
+++ de1/zpu_rom.vhdl	(revision 198)
@@ -180,8 +180,8 @@
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@@ -228,7 +228,7 @@
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+X"05085283",
+X"e08c0888",
+X"050851bd",
+X"3f83e080",
+X"087083e0",
 X"8c08f805",
-X"0c83e08c",
+X"0c5483e0",
+X"8c08fc05",
+X"08802e90",
+X"3883e08c",
 X"08f80508",
-X"7083e080",
-X"0c54873d",
-X"0d83e08c",
-X"0c0483e0",
-X"8c080283",
-X"e08c0cfd",
-X"3d0d810b",
+X"3083e08c",
+X"08f8050c",
 X"83e08c08",
-X"fc050c80",
+X"f8050870",
+X"83e0800c",
+X"54873d0d",
+X"83e08c0c",
+X"0483e08c",
+X"080283e0",
+X"8c0cfd3d",
+X"0d810b83",
+X"e08c08fc",
+X"050c800b",
+X"83e08c08",
+X"f8050c83",
+X"e08c088c",
+X"050883e0",
+X"8c088805",
+X"0827b938",
+X"83e08c08",
+X"fc050880",
+X"2eae3880",
 X"0b83e08c",
-X"08f8050c",
+X"088c0508",
+X"24a23883",
+X"e08c088c",
+X"05081083",
+X"e08c088c",
+X"050c83e0",
+X"8c08fc05",
+X"081083e0",
+X"8c08fc05",
+X"0cffb839",
 X"83e08c08",
+X"fc050880",
+X"2e80e138",
+X"83e08c08",
 X"8c050883",
 X"e08c0888",
-X"050827b9",
+X"050826ad",
 X"3883e08c",
-X"08fc0508",
-X"802eae38",
-X"800b83e0",
-X"8c088c05",
-X"0824a238",
+X"08880508",
 X"83e08c08",
-X"8c050810",
+X"8c050831",
 X"83e08c08",
-X"8c050c83",
-X"e08c08fc",
-X"05081083",
-X"e08c08fc",
-X"050cffb8",
-X"3983e08c",
+X"88050c83",
+X"e08c08f8",
+X"050883e0",
+X"8c08fc05",
+X"080783e0",
+X"8c08f805",
+X"0c83e08c",
 X"08fc0508",
-X"802e80e1",
-X"3883e08c",
+X"812a83e0",
+X"8c08fc05",
+X"0c83e08c",
 X"088c0508",
+X"812a83e0",
+X"8c088c05",
+X"0cff9539",
 X"83e08c08",
-X"88050826",
-X"ad3883e0",
-X"8c088805",
-X"0883e08c",
-X"088c0508",
-X"3183e08c",
-X"0888050c",
+X"90050880",
+X"2e933883",
+X"e08c0888",
+X"05087083",
+X"e08c08f4",
+X"050c5191",
+X"3983e08c",
+X"08f80508",
+X"7083e08c",
+X"08f4050c",
+X"5183e08c",
+X"08f40508",
+X"83e0800c",
+X"853d0d83",
+X"e08c0c04",
 X"83e08c08",
-X"f8050883",
+X"0283e08c",
+X"0cff3d0d",
+X"800b83e0",
+X"8c08fc05",
+X"0c83e08c",
+X"08880508",
+X"8106ff11",
+X"70097083",
+X"e08c088c",
+X"05080683",
 X"e08c08fc",
-X"05080783",
-X"e08c08f8",
+X"05081183",
+X"e08c08fc",
 X"050c83e0",
-X"8c08fc05",
+X"8c088805",
 X"08812a83",
-X"e08c08fc",
+X"e08c0888",
 X"050c83e0",
 X"8c088c05",
-X"08812a83",
-X"e08c088c",
-X"050cff95",
-X"3983e08c",
-X"08900508",
-X"802e9338",
-X"83e08c08",
-X"88050870",
-X"83e08c08",
-X"f4050c51",
-X"913983e0",
-X"8c08f805",
-X"087083e0",
-X"8c08f405",
-X"0c5183e0",
-X"8c08f405",
-X"0883e080",
-X"0c853d0d",
-X"83e08c0c",
-X"0483e08c",
-X"080283e0",
-X"8c0cff3d",
-X"0d800b83",
+X"081083e0",
+X"8c088c05",
+X"0c515151",
+X"5183e08c",
+X"08880508",
+X"802e8438",
+X"ffab3983",
 X"e08c08fc",
-X"050c83e0",
-X"8c088805",
-X"088106ff",
-X"11700970",
-X"83e08c08",
-X"8c050806",
-X"83e08c08",
-X"fc050811",
-X"83e08c08",
-X"fc050c83",
-X"e08c0888",
-X"0508812a",
-X"83e08c08",
-X"88050c83",
-X"e08c088c",
-X"05081083",
-X"e08c088c",
-X"050c5151",
-X"515183e0",
-X"8c088805",
-X"08802e84",
-X"38ffab39",
-X"83e08c08",
-X"fc050870",
-X"83e0800c",
-X"51833d0d",
-X"83e08c0c",
-X"04fc3d0d",
-X"7670797b",
-X"55555555",
-X"8f72278c",
-X"38727507",
-X"83065170",
-X"802ea938",
-X"ff125271",
-X"ff2e9838",
-X"72708105",
-X"54337470",
-X"81055634",
-X"ff125271",
-X"ff2e0981",
-X"06ea3874",
-X"83e0800c",
-X"863d0d04",
-X"74517270",
-X"84055408",
-X"71708405",
-X"530c7270",
-X"84055408",
-X"71708405",
-X"530c7270",
-X"84055408",
-X"71708405",
-X"530c7270",
-X"84055408",
-X"71708405",
-X"530cf012",
-X"52718f26",
-X"c9388372",
-X"27953872",
-X"70840554",
-X"08717084",
-X"05530cfc",
-X"12527183",
-X"26ed3870",
-X"54ff8139",
+X"05087083",
+X"e0800c51",
+X"833d0d83",
+X"e08c0c04",
 X"00ffffff",
 X"ff00ffff",
 X"ffff00ff",
@@ -3895,24 +3893,15 @@
 X"f4f5f6f7",
 X"f8f9fafb",
 X"fcfdfeff",
-X"70704740",
-X"2c704268",
-X"2c020202",
-X"02020202",
-X"02020202",
-X"02020202",
-X"02020202",
-X"02020241",
-X"00060000",
-X"00002af7",
-X"00002b38",
-X"00002b5a",
-X"00002b79",
-X"00002b79",
-X"00002b79",
-X"00002b79",
+X"00002b5f",
+X"00002ba0",
+X"00002bc2",
 X"00002be9",
-X"00002c1a",
+X"00002be9",
+X"00002be9",
+X"00002be9",
+X"00002c5a",
+X"00002cac",
 X"25732025",
 X"73000000",
 X"2e2e0000",
@@ -3919,8 +3908,6 @@
 X"41545200",
 X"58464400",
 X"58455800",
-X"524f4d00",
-X"42494e00",
 X"43686f6f",
 X"73652000",
 X"66696c65",
@@ -3961,11 +3948,11 @@
 X"65202564",
 X"3a257320",
 X"25730000",
+X"4e4f4e45",
+X"00000000",
 X"43617274",
-X"72696467",
-X"6520386b",
-X"2073696d",
-X"706c6500",
+X"3a202573",
+X"00000000",
 X"45786974",
 X"00000000",
 X"61746172",
@@ -3975,18 +3962,59 @@
 X"69626173",
 X"2e726f6d",
 X"00000000",
+X"524f4d00",
+X"42494e00",
+X"43415200",
 X"6e616d65",
 X"20000000",
 X"00000000",
 X"00000000",
-X"00003d1c",
-X"00003d20",
+X"01010008",
+X"02210010",
+X"080d0040",
+X"090a0040",
+X"0a090040",
+X"0b080040",
+X"0c300020",
+X"0d310040",
+X"0e320080",
+X"0f040010",
+X"110c0080",
+X"17330100",
+X"18340200",
+X"1a280010",
+X"1b290020",
+X"1c2a0040",
+X"1d2b0080",
+X"1e2c0100",
+X"1f2d0200",
+X"21380020",
+X"22390040",
+X"233a0080",
+X"243b0100",
+X"253c0200",
+X"28230010",
+X"29020080",
+X"2a030400",
+X"38240200",
+X"00000000",
+X"70704740",
+X"2c704268",
+X"2c020202",
+X"02020202",
+X"02020202",
+X"02020202",
+X"02020202",
+X"02020241",
+X"00060000",
+X"00003ce8",
+X"00003cec",
+X"00003cf4",
+X"00003d00",
+X"00003d0c",
+X"00003d18",
+X"00003d24",
 X"00003d28",
-X"00003d34",
-X"00003d40",
-X"00003d4c",
-X"00003d58",
-X"00003d5c",
 X"72025f07",
 X"f807a900",
 X"8d04038d",
@@ -4086,34 +4114,6 @@
 X"65720000",
 X"00000000",
 X"00000000",
-X"00000000",
-X"00000000",
-X"00000000",
-X"00000000",
-X"00000000",
-X"00000000",
-X"00000000",
-X"00000000",
-X"00000000",
-X"00000000",
-X"00000000",
-X"00000000",
-X"00000000",
-X"00000000",
-X"00000000",
-X"00000000",
-X"00000000",
-X"00000000",
-X"00000000",
-X"00000000",
-X"00000000",
-X"00000000",
-X"00000000",
-X"00000000",
-X"00000000",
-X"00000000",
-X"00000000",
-X"00000000",
 X"00000000"
 
 );
Index: de1_5200/build.sh
===================================================================
--- de1_5200/build.sh	(revision 197)
+++ de1_5200/build.sh	(revision 198)
@@ -4,7 +4,7 @@
 my $wanted_variant = shift @ARGV;
 
 #variants...
-my $PAL = 1;
+##my $PAL = 1;
 my $NTSC = 0;
 
 my $RGB = 1; # i.e. not scandoubled
@@ -15,10 +15,10 @@
 
 my %variants = 
 (
-	"PAL" => 
-	{
-		"TV" => $PAL
-	},
+#	"PAL" => 
+#	{
+#		"TV" => $PAL
+#	},
 	"NTSC" =>
 	{
 		"TV" => $NTSC
Index: mcc216/atari800core_mcc.vhd
===================================================================
--- mcc216/atari800core_mcc.vhd	(revision 197)
+++ mcc216/atari800core_mcc.vhd	(revision 198)
@@ -334,6 +334,7 @@
 	signal reset_atari : std_logic;
 	signal pause_atari : std_logic;
 	SIGNAL speed_6502 : std_logic_vector(5 downto 0);
+	signal emulated_cartridge_select: std_logic_vector(5 downto 0);
 
 BEGIN 
 
@@ -524,7 +525,8 @@
     		ROM_SELECT => rom_select,
 		PAL => PAL,
 		HALT => pause_atari,
-		THROTTLE_COUNT_6502 => speed_6502
+		THROTTLE_COUNT_6502 => speed_6502,
+		emulated_cartridge_select => emulated_cartridge_select
 	);
 
 	process(clk_sdram,sdram_reset_ctrl_n_reg)
@@ -870,6 +872,7 @@
 	speed_6502 <= zpu_out1(7 downto 2);
 	ram_select <= zpu_out1(10 downto 8);
 	rom_select <= zpu_out1(16 downto 11);
+	emulated_cartridge_select <= zpu_out1(22 downto 17);
 
 zpu_rom1: entity work.zpu_rom
 	port map(
Index: mcctv/atari800core_mcc.vhd
===================================================================
--- mcctv/atari800core_mcc.vhd	(revision 197)
+++ mcctv/atari800core_mcc.vhd	(revision 198)
@@ -347,6 +347,7 @@
 	signal reset_atari : std_logic;
 	signal pause_atari : std_logic;
 	SIGNAL speed_6502 : std_logic_vector(5 downto 0);
+	signal emulated_cartridge_select: std_logic_vector(5 downto 0);
 
 	-- USB joystick
 	SIGNAL joyright1_2  			: STD_LOGIC := '1';
@@ -547,7 +548,8 @@
     		ROM_SELECT => rom_select,
 		PAL => PAL,
 		HALT => pause_atari,
-		THROTTLE_COUNT_6502 => speed_6502
+		THROTTLE_COUNT_6502 => speed_6502,
+		emulated_cartridge_select => emulated_cartridge_select
 	);
 
 	process(clk_sdram,sdram_reset_ctrl_n_reg)
@@ -841,6 +843,7 @@
 	speed_6502 <= zpu_out1(7 downto 2);
 	ram_select <= zpu_out1(10 downto 8);
 	rom_select <= zpu_out1(16 downto 11);
+	emulated_cartridge_select <= zpu_out1(22 downto 17);
 
 zpu_rom1: entity work.zpu_rom
 	port map(
Index: mist/atari800core_mist.vhd
===================================================================
--- mist/atari800core_mist.vhd	(revision 197)
+++ mist/atari800core_mist.vhd	(revision 198)
@@ -195,6 +195,7 @@
 	signal reset_atari : std_logic;
 	signal pause_atari : std_logic;
 	SIGNAL speed_6502 : std_logic_vector(5 downto 0);
+	signal emulated_cartridge_select: std_logic_vector(5 downto 0);
 
 	-- mist sector
 	signal ZPU_ROM_DATA_MUX :  std_logic_vector(31 downto 0);
@@ -501,7 +502,8 @@
     		ROM_SELECT => rom_select,
 		PAL => PAL,
 		HALT => pause_atari,
-		THROTTLE_COUNT_6502 => speed_6502
+		THROTTLE_COUNT_6502 => speed_6502,
+		emulated_cartridge_select => emulated_cartridge_select
 	);
 
 sdram_adaptor : entity work.sdram_statemachine
@@ -660,6 +662,7 @@
 	speed_6502 <= zpu_out1(7 downto 2);
 	ram_select <= zpu_out1(10 downto 8);
 	rom_select <= zpu_out1(16 downto 11);
+	emulated_cartridge_select <= zpu_out1(22 downto 17);
 
 zpu_rom1: entity work.zpu_rom
 	port map(
Index: mist_5200/zpu_rom.vhdl
===================================================================
--- mist_5200/zpu_rom.vhdl	(revision 197)
+++ mist_5200/zpu_rom.vhdl	(revision 198)
@@ -180,8 +180,8 @@
 X"00000000",
 X"00000000",
 X"71fc0608",
-X"0b0b80dc",
-X"e0738306",
+X"0b0b80de",
+X"bc738306",
 X"10100508",
 X"060b0b0b",
 X"88a20400",
@@ -227,8 +227,8 @@
 X"00000000",
 X"00000000",
 X"00000000",
-X"810b80df",
-X"fc0c5104",
+X"810b80e1",
+X"dc0c5104",
 X"00000000",
 X"00000000",
 X"00000000",
@@ -300,8 +300,8 @@
 X"83e08008",
 X"83e08408",
 X"83e08808",
-X"757580d7",
-X"902d5050",
+X"757580d8",
+X"e92d5050",
 X"83e08008",
 X"5683e088",
 X"0c83e084",
@@ -310,7 +310,7 @@
 X"e0800883",
 X"e0840883",
 X"e0880875",
-X"7580d5a4",
+X"7580d6fd",
 X"2d505083",
 X"e0800856",
 X"83e0880c",
@@ -319,1146 +319,1166 @@
 X"51040000",
 X"800489aa",
 X"0489aa0b",
-X"80cef804",
-X"fc3d0d76",
-X"705255b3",
-X"f33f83e0",
-X"800815ff",
-X"05547375",
-X"2e8e3873",
-X"335372ae",
-X"2e8638ff",
-X"1454ef39",
-X"77528114",
-X"51b38b3f",
-X"83e08008",
-X"307083e0",
-X"80080780",
-X"2583e080",
-X"0c53863d",
+X"80d0b404",
+X"f23d0d60",
+X"913dec11",
+X"56565990",
+X"53f01552",
+X"78519488",
+X"3f83e080",
+X"0880e538",
+X"7a902e09",
+X"810680dc",
+X"3802b305",
+X"3380e1e4",
+X"0b80e1e4",
+X"33575757",
+X"8c397477",
+X"2e8a3884",
+X"16703356",
+X"5674f338",
+X"75337058",
+X"5574802e",
+X"80cf3880",
+X"0b821722",
+X"70832a57",
+X"58587775",
+X"27bb3896",
+X"800a5790",
+X"3dec0554",
+X"80c08053",
+X"76527851",
+X"93aa3f83",
+X"e0800888",
+X"387a80c0",
+X"802e8538",
+X"80579a39",
+X"811880c0",
+X"80188218",
+X"2270832a",
+X"585c5858",
+X"747826cb",
+X"38811633",
+X"577683e0",
+X"800c903d",
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-X"559aac3f",
+X"55b3c63f",
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-X"54815383",
-X"e0800880",
-X"c7387451",
-X"99ef3f83",
-X"e080080b",
-X"0b80dec0",
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-X"c4527251",
-X"fefe3f83",
-X"e0800894",
-X"380b0b80",
-X"dec85272",
-X"51feed3f",
+X"15ff0554",
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+X"72ae2e86",
+X"38ff1454",
+X"ef397752",
+X"811451b2",
+X"de3f83e0",
+X"80083070",
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-X"81547353",
-X"7283e080",
-X"0c863d0d",
-X"04fd3d0d",
-X"75705254",
-X"99c53f81",
+X"07802583",
+X"e0800c53",
+X"863d0d04",
+X"fc3d0d76",
+X"70525599",
+X"ff3f83e0",
+X"80085481",
 X"5383e080",
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-X"51998e3f",
-X"0b0b80de",
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-X"800851fe",
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-X"99387351",
-X"98db3f0b",
-X"0b80ded0",
-X"5283e080",
-X"0851fe80",
+X"0880c738",
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-X"5184c639",
-X"7d527851",
-X"92833f84",
-X"d0397d51",
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-X"427a415f",
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-X"8438ff1b",
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-X"09709f2c",
-X"72067bff",
-X"125a5a52",
-X"55558075",
-X"25953876",
-X"5197b33f",
+X"a5380b0b",
+X"80e0a052",
+X"7251fefe",
+X"3f83e080",
+X"0894380b",
+X"0b80e0a4",
+X"527251fe",
+X"ed3f83e0",
+X"8008802e",
+X"83388154",
+X"73537283",
+X"e0800c86",
+X"3d0d04fd",
+X"3d0d7570",
+X"52549998",
+X"3f815383",
+X"e0800898",
+X"38735198",
+X"e13f83e0",
+X"a0085283",
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+X"feb43f83",
+X"e0800853",
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+X"0c853d0d",
+X"04e03d0d",
+X"a33d0870",
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